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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass8e85e3c2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +090028
Masahiro Yamadacd5cf8e2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczake5fa1212015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glass71fa5b42020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewski1e4450c2019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glasse200ee22015-02-13 12:20:48 -070038
Igor Opaniuk964f2322021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Simon Glass0e01c622023-02-22 09:34:06 -070050config TPL_DM_I2C
51 bool "Enable Driver Model for I2C drivers in TPL"
52 depends on TPL_DM && DM_I2C
53 help
54 Enable driver model for I2C. The I2C uclass interface: probe, read,
55 write and speed, is implemented with the bus drivers operations,
56 which provide methods for bus setting and data transfer. Each chip
57 device (bus child) info is kept as parent platdata. The interface
58 is defined in include/i2c.h.
59
Simon Glasse7ca7da2022-04-30 00:56:53 -060060config VPL_DM_I2C
61 bool "Enable Driver Model for I2C drivers in VPL"
62 depends on VPL_DM && DM_I2C
63 default y
64 help
65 Enable driver model for I2C. The I2C uclass interface: probe, read,
66 write and speed, is implemented with the bus drivers operations,
67 which provide methods for bus setting and data transfer. Each chip
68 device (bus child) info is kept as parent platdata. The interface
69 is defined in include/i2c.h.
70
Tom Rini52b2e262021-08-18 23:12:24 -040071config SYS_I2C_LEGACY
72 bool "Enable legacy I2C subsystem and drivers"
73 depends on !DM_I2C
74 help
75 Enable the legacy I2C subsystem and drivers. While this is
76 deprecated in U-Boot itself, this can be useful in some situations
77 in SPL or TPL.
78
79config SPL_SYS_I2C_LEGACY
80 bool "Enable legacy I2C subsystem and drivers in SPL"
81 depends on SUPPORT_SPL && !SPL_DM_I2C
82 help
83 Enable the legacy I2C subsystem and drivers in SPL. This is useful
84 in some size constrained situations.
85
86config TPL_SYS_I2C_LEGACY
87 bool "Enable legacy I2C subsystem and drivers in TPL"
88 depends on SUPPORT_TPL && !SPL_DM_I2C
89 help
90 Enable the legacy I2C subsystem and drivers in TPL. This is useful
91 in some size constrained situations.
92
Tom Rini714482a2021-08-18 23:12:25 -040093config SYS_I2C_EARLY_INIT
94 bool "Enable legacy I2C subsystem early in boot"
95 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
96 help
97 Add the function prototype for i2c_early_init_f which is called in
98 board_early_init_f.
99
Simon Glass9ad07af2015-08-03 08:19:23 -0600100config I2C_CROS_EC_TUNNEL
101 tristate "Chrome OS EC tunnel I2C bus"
102 depends on CROS_EC
103 help
104 This provides an I2C bus that will tunnel i2c commands through to
105 the other side of the Chrome OS EC to the I2C bus connected there.
106 This will work whatever the interface used to talk to the EC (SPI,
107 I2C or LPC). Some Chromebooks use this when the hardware design
108 does not allow direct access to the main PMIC from the AP.
109
Simon Glasseb2cc512015-08-03 08:19:24 -0600110config I2C_CROS_EC_LDO
111 bool "Provide access to LDOs on the Chrome OS EC"
112 depends on CROS_EC
113 ---help---
114 On many Chromebooks the main PMIC is inaccessible to the AP. This is
115 often dealt with by using an I2C pass-through interface provided by
116 the EC. On some unfortunate models (e.g. Spring) the pass-through
117 is not available, and an LDO message is available instead. This
118 option enables a driver which provides very basic access to those
119 regulators, via the EC. We implement this as an I2C bus which
120 emulates just the TPS65090 messages we know about. This is done to
121 avoid duplicating the logic in the TPS65090 regulator driver for
122 enabling/disabling an LDO.
Simon Glass9ad07af2015-08-03 08:19:23 -0600123
Lukasz Majewski0a556272017-03-21 12:08:25 +0100124config I2C_SET_DEFAULT_BUS_NUM
125 bool "Set default I2C bus number"
126 depends on DM_I2C
127 help
128 Set default number of I2C bus to be accessed. This option provides
129 behaviour similar to old (i.e. pre DM) I2C bus driver.
130
131config I2C_DEFAULT_BUS_NUMBER
132 hex "I2C default bus number"
133 depends on I2C_SET_DEFAULT_BUS_NUM
134 default 0x0
135 help
136 Number of default I2C bus to use
137
Przemyslaw Marczakd3aa7e12015-03-31 18:57:18 +0200138config DM_I2C_GPIO
139 bool "Enable Driver Model for software emulated I2C bus driver"
140 depends on DM_I2C && DM_GPIO
141 help
142 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
143 configuration is given by the device tree. Kernel-style device tree
144 bindings are supported.
145 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
146
Igor Opaniuk964f2322021-02-09 13:52:43 +0200147config SPL_DM_I2C_GPIO
148 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass035939e2021-07-10 21:14:30 -0600149 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniuk964f2322021-02-09 13:52:43 +0200150 default y
151 help
152 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
153 configuration is given by the device tree. Kernel-style device tree
154 bindings are supported.
155 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
156
Nathan Barrett-Morrison3ce44bc2025-02-26 12:30:28 -0500157config SYS_I2C_ADI
158 bool "ADI I2C driver"
159 depends on DM_I2C && ARCH_SC5XX
160 help
161 Add support for the ADI (Analog Devices) I2C driver as used
162 in SC57X, SC58X, SC59X, SC59X_64.
163
Songjun Wu26d88282016-06-20 13:22:38 +0800164config SYS_I2C_AT91
165 bool "Atmel I2C driver"
166 depends on DM_I2C && ARCH_AT91
167 help
168 Add support for the Atmel I2C driver. A serious problem is that there
169 is no documented way to issue repeated START conditions for more than
170 two messages, as needed to support combined I2C messages. Use the
171 i2c-gpio driver unless your system can cope with this limitation.
172 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
173
Rayagonda Kokatanurd5dc36f2020-04-08 11:12:27 +0530174config SYS_I2C_IPROC
175 bool "Broadcom I2C driver"
176 depends on DM_I2C
177 help
178 Broadcom I2C driver.
179 Add support for Broadcom I2C driver.
180 Say yes here to to enable the Broadco I2C driver.
181
mario.six@gdsys.cc349686c2016-04-25 08:31:09 +0200182config SYS_I2C_FSL
183 bool "Freescale I2C bus driver"
mario.six@gdsys.cc349686c2016-04-25 08:31:09 +0200184 help
185 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
186 MPC85xx processors.
187
Tom Rinibe94c762021-08-18 23:12:35 -0400188if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
189config SYS_FSL_I2C_OFFSET
190 hex "Offset from the IMMR of the address of the first I2C controller"
191
192config SYS_FSL_HAS_I2C2_OFFSET
193 bool "Support a second I2C controller"
194
195config SYS_FSL_I2C2_OFFSET
196 hex "Offset from the IMMR of the address of the second I2C controller"
197 depends on SYS_FSL_HAS_I2C2_OFFSET
198
199config SYS_FSL_HAS_I2C3_OFFSET
200 bool "Support a third I2C controller"
201
202config SYS_FSL_I2C3_OFFSET
203 hex "Offset from the IMMR of the address of the third I2C controller"
204 depends on SYS_FSL_HAS_I2C3_OFFSET
205
206config SYS_FSL_HAS_I2C4_OFFSET
207 bool "Support a fourth I2C controller"
208
209config SYS_FSL_I2C4_OFFSET
210 hex "Offset from the IMMR of the address of the fourth I2C controller"
211 depends on SYS_FSL_HAS_I2C4_OFFSET
212endif
213
Moritz Fischer0075dac2015-12-28 09:47:11 -0800214config SYS_I2C_CADENCE
215 tristate "Cadence I2C Controller"
Michal Simekc28665d2020-08-06 15:18:36 +0200216 depends on DM_I2C
Moritz Fischer0075dac2015-12-28 09:47:11 -0800217 help
218 Say yes here to select Cadence I2C Host Controller. This controller is
219 e.g. used by Xilinx Zynq.
220
Arthur Life661ba2020-06-01 12:56:31 -0700221config SYS_I2C_CA
222 tristate "Cortina-Access I2C Controller"
223 depends on DM_I2C && CORTINA_PLATFORM
Arthur Life661ba2020-06-01 12:56:31 -0700224 help
225 Add support for the Cortina Access I2C host controller.
226 Say yes here to select Cortina-Access I2C Host Controller.
227
Adam Forddecc8952018-08-10 05:05:22 -0500228config SYS_I2C_DAVINCI
229 bool "Davinci I2C Controller"
230 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
231 help
232 Say yes here to add support for Davinci and Keystone I2C controller
233
Stefan Roeseb71955f2016-04-28 09:47:17 +0200234config SYS_I2C_DW
235 bool "Designware I2C Controller"
Stefan Roeseb71955f2016-04-28 09:47:17 +0200236 help
237 Say yes here to select the Designware I2C Host Controller. This
238 controller is used in various SoCs, e.g. the ST SPEAr, Altera
239 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
240
Minda Chen375be332023-07-25 17:46:47 +0800241config SYS_I2C_DW_PCI
242 bool "Designware PCI I2C Controller"
243 depends on SYS_I2C_DW && PCI && ACPIGEN
244 default y
245 help
246 Say yes here to select the Designware PCI I2C Host Controller.
247 This PCI I2C controller is the base on Desigware I2C host
248 controller.
249
Ryan Chen0c7132a2023-01-30 14:19:24 +0800250config SYS_I2C_AST2600
251 bool "AST2600 I2C Controller"
252 depends on DM_I2C && ARCH_ASPEED
253 help
254 Say yes here to select AST2600 I2C Host Controller. The driver
255 support AST2600 I2C new mode register. This I2C controller supports:
256 _Standard-mode (up to 100 kHz)
257 _Fast-mode (up to 400 kHz)
258 _Fast-mode Plus (up to 1 MHz)
259
maxims@google.com7f613312017-04-17 12:00:30 -0700260config SYS_I2C_ASPEED
261 bool "Aspeed I2C Controller"
262 depends on DM_I2C && ARCH_ASPEED
263 help
264 Say yes here to select Aspeed I2C Host Controller. The driver
265 supports AST2500 and AST2400 controllers, but is very limited.
266 Only single master mode is supported and only byte-by-byte
267 synchronous reads and writes are supported, no Pool Buffers or DMA.
268
Simon Glass5e66fdc2016-01-17 16:11:44 -0700269config SYS_I2C_INTEL
270 bool "Intel I2C/SMBUS driver"
271 depends on DM_I2C
272 help
273 Add support for the Intel SMBUS driver. So far this driver is just
274 a stub which perhaps some basic init. There is no implementation of
275 the I2C API meaning that any I2C operations will immediately fail
276 for now.
277
Peng Fand684adb2017-02-24 09:54:18 +0800278config SYS_I2C_IMX_LPI2C
279 bool "NXP i.MX LPI2C driver"
Peng Fand684adb2017-02-24 09:54:18 +0800280 help
281 Add support for the NXP i.MX LPI2C driver.
282
Trevor Woerner5f37e502021-06-10 22:37:08 -0400283config SYS_I2C_LPC32XX
284 bool "LPC32XX I2C driver"
285 depends on ARCH_LPC32XX
286 help
287 Enable support for the LPC32xx I2C driver.
288
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100289config SYS_I2C_MESON
290 bool "Amlogic Meson I2C driver"
291 depends on DM_I2C && ARCH_MESON
292 help
Beniamino Galvani83b153d2017-11-26 17:40:54 +0100293 Add support for the I2C controller available in Amlogic Meson
294 SoCs. The controller supports programmable bus speed including
295 standard (100kbits/s) and fast (400kbit/s) speed and allows the
296 software to define a flexible format of the bit streams. It has an
297 internal buffer holding up to 8 bytes for transfers and supports
298 both 7-bit and 10-bit addresses.
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100299
developer301212f2022-09-09 19:59:48 +0800300config SYS_I2C_MTK
301 bool "MediaTek I2C driver"
302 help
303 This selects the MediaTek Integrated Inter Circuit bus driver.
304 The I2C bus adapter is the base for some other I2C client,
305 eg: touch, sensors.
306 If you want to use MediaTek I2C interface, say Y here.
307 If unsure, say N.
308
Padmarao Begari7ddb4ec2021-11-17 18:21:16 +0530309config SYS_I2C_MICROCHIP
310 bool "Microchip I2C driver"
311 help
312 Add support for the Microchip I2C driver. This is operating on
313 standard mode up to 100 kbits/s and fast mode up to 400 kbits/s.
314
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100315config SYS_I2C_MXC
Sriram Dash7122a0c2018-02-06 11:26:30 +0530316 bool "NXP MXC I2C driver"
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100317 help
Chris Packham94d0d3d2019-01-13 22:13:25 +1300318 Add support for the NXP I2C driver. This supports up to four bus
319 channels and operating on standard mode up to 100 kbits/s and fast
320 mode up to 400 kbits/s.
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100321
Tom Rini1a195882021-08-18 23:12:33 -0400322if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
Sriram Dash7122a0c2018-02-06 11:26:30 +0530323config SYS_I2C_MXC_I2C1
324 bool "NXP MXC I2C1"
325 help
326 Add support for NXP MXC I2C Controller 1.
327 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
328
329config SYS_I2C_MXC_I2C2
330 bool "NXP MXC I2C2"
331 help
332 Add support for NXP MXC I2C Controller 2.
333 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
334
335config SYS_I2C_MXC_I2C3
336 bool "NXP MXC I2C3"
337 help
338 Add support for NXP MXC I2C Controller 3.
339 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
340
341config SYS_I2C_MXC_I2C4
342 bool "NXP MXC I2C4"
343 help
344 Add support for NXP MXC I2C Controller 4.
345 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dasha64aa192018-02-06 11:26:31 +0530346
347config SYS_I2C_MXC_I2C5
348 bool "NXP MXC I2C5"
349 help
350 Add support for NXP MXC I2C Controller 5.
351 Required for SoCs which have I2C MXC controller 5 eg LX2160A
352
353config SYS_I2C_MXC_I2C6
354 bool "NXP MXC I2C6"
355 help
356 Add support for NXP MXC I2C Controller 6.
357 Required for SoCs which have I2C MXC controller 6 eg LX2160A
358
359config SYS_I2C_MXC_I2C7
360 bool "NXP MXC I2C7"
361 help
362 Add support for NXP MXC I2C Controller 7.
363 Required for SoCs which have I2C MXC controller 7 eg LX2160A
364
365config SYS_I2C_MXC_I2C8
366 bool "NXP MXC I2C8"
367 help
368 Add support for NXP MXC I2C Controller 8.
369 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash7122a0c2018-02-06 11:26:30 +0530370endif
371
372if SYS_I2C_MXC_I2C1
373config SYS_MXC_I2C1_SPEED
374 int "I2C Channel 1 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500375 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530376 default 100000
377 help
378 MXC I2C Channel 1 speed
379
380config SYS_MXC_I2C1_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400381 hex "I2C1 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400382 default 0x0
Sriram Dash7122a0c2018-02-06 11:26:30 +0530383 help
384 MXC I2C1 Slave
385endif
386
387if SYS_I2C_MXC_I2C2
388config SYS_MXC_I2C2_SPEED
389 int "I2C Channel 2 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500390 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530391 default 100000
392 help
393 MXC I2C Channel 2 speed
394
395config SYS_MXC_I2C2_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400396 hex "I2C2 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400397 default 0x0
Sriram Dash7122a0c2018-02-06 11:26:30 +0530398 help
399 MXC I2C2 Slave
400endif
401
402if SYS_I2C_MXC_I2C3
403config SYS_MXC_I2C3_SPEED
404 int "I2C Channel 3 speed"
405 default 100000
406 help
407 MXC I2C Channel 3 speed
408
409config SYS_MXC_I2C3_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400410 hex "I2C3 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400411 default 0x0
Sriram Dash7122a0c2018-02-06 11:26:30 +0530412 help
413 MXC I2C3 Slave
414endif
415
416if SYS_I2C_MXC_I2C4
417config SYS_MXC_I2C4_SPEED
418 int "I2C Channel 4 speed"
419 default 100000
420 help
421 MXC I2C Channel 4 speed
422
423config SYS_MXC_I2C4_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400424 hex "I2C4 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400425 default 0x0
Sriram Dash7122a0c2018-02-06 11:26:30 +0530426 help
427 MXC I2C4 Slave
428endif
429
Sriram Dasha64aa192018-02-06 11:26:31 +0530430if SYS_I2C_MXC_I2C5
431config SYS_MXC_I2C5_SPEED
432 int "I2C Channel 5 speed"
433 default 100000
434 help
435 MXC I2C Channel 5 speed
436
437config SYS_MXC_I2C5_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400438 hex "I2C5 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400439 default 0x0
Sriram Dasha64aa192018-02-06 11:26:31 +0530440 help
441 MXC I2C5 Slave
442endif
443
444if SYS_I2C_MXC_I2C6
445config SYS_MXC_I2C6_SPEED
446 int "I2C Channel 6 speed"
447 default 100000
448 help
449 MXC I2C Channel 6 speed
450
451config SYS_MXC_I2C6_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400452 hex "I2C6 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400453 default 0x0
Sriram Dasha64aa192018-02-06 11:26:31 +0530454 help
455 MXC I2C6 Slave
456endif
457
458if SYS_I2C_MXC_I2C7
459config SYS_MXC_I2C7_SPEED
460 int "I2C Channel 7 speed"
461 default 100000
462 help
463 MXC I2C Channel 7 speed
464
465config SYS_MXC_I2C7_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400466 hex "I2C7 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400467 default 0x0
Sriram Dasha64aa192018-02-06 11:26:31 +0530468 help
469 MXC I2C7 Slave
470endif
471
472if SYS_I2C_MXC_I2C8
473config SYS_MXC_I2C8_SPEED
474 int "I2C Channel 8 speed"
475 default 100000
476 help
477 MXC I2C Channel 8 speed
478
479config SYS_MXC_I2C8_SLAVE
Tom Rini1a195882021-08-18 23:12:33 -0400480 hex "I2C8 Slave"
Tom Rinif18679c2023-08-02 11:09:43 -0400481 default 0x0
Sriram Dasha64aa192018-02-06 11:26:31 +0530482 help
483 MXC I2C8 Slave
484endif
485
Stefan Bosch9d85dfb2020-07-10 19:07:28 +0200486config SYS_I2C_NEXELL
487 bool "Nexell I2C driver"
488 depends on DM_I2C
489 help
490 Add support for the Nexell I2C driver. This is used with various
491 Nexell parts such as S5Pxx18 series SoCs. All chips
492 have several I2C ports and all are provided, controlled by the
493 device tree.
494
Jim Liub84426c2022-06-23 13:31:42 +0800495config SYS_I2C_NPCM
496 bool "Nuvoton NPCM I2C driver"
497 help
498 Support for Nuvoton I2C controller driver.
499
Pragnesh Patel1cfbd7a2020-11-14 14:42:34 +0530500config SYS_I2C_OCORES
501 bool "ocores I2C driver"
502 depends on DM_I2C
503 help
504 Add support for ocores I2C controller. For details see
505 https://opencores.org/projects/i2c
506
Adam Ford85901162017-08-07 13:11:34 -0500507config SYS_I2C_OMAP24XX
508 bool "TI OMAP2+ I2C driver"
Vignesh R64d4f552019-06-04 18:08:11 -0500509 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Ford85901162017-08-07 13:11:34 -0500510 help
511 Add support for the OMAP2+ I2C driver.
512
Marek Vasut27165962018-04-21 18:57:28 +0200513config SYS_I2C_RCAR_I2C
Marek Vasutaf8f0742024-12-11 08:30:29 +0100514 bool "Renesas R-Car I2C driver"
Hai Phamf39867d32023-02-28 22:25:51 +0100515 depends on (RCAR_GEN2 || RCAR_64) && DM_I2C
Marek Vasut27165962018-04-21 18:57:28 +0200516 help
Marek Vasutaf8f0742024-12-11 08:30:29 +0100517 Support for Renesas R-Car I2C controller.
Marek Vasut27165962018-04-21 18:57:28 +0200518
Marek Vasut125d8df2017-11-28 08:02:27 +0100519config SYS_I2C_RCAR_IIC
Marek Vasutaf8f0742024-12-11 08:30:29 +0100520 bool "Renesas R-Car Gen3 IIC driver"
Marek Vasutc3909092023-02-28 00:03:45 +0100521 depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C
Marek Vasut125d8df2017-11-28 08:02:27 +0100522 help
Marek Vasutaf8f0742024-12-11 08:30:29 +0100523 Support for Renesas R-Car Gen3 IIC controller.
Marek Vasut125d8df2017-11-28 08:02:27 +0100524
Simon Glass3595f952015-08-30 16:55:39 -0600525config SYS_I2C_ROCKCHIP
526 bool "Rockchip I2C driver"
527 depends on DM_I2C
528 help
529 Add support for the Rockchip I2C driver. This is used with various
530 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham94d0d3d2019-01-13 22:13:25 +1300531 have several I2C ports and all are provided, controlled by the
Simon Glass3595f952015-08-30 16:55:39 -0600532 device tree.
533
Paul Barker7fe0e0a2024-02-27 20:40:30 +0000534config SYS_I2C_RZ_RIIC
535 bool "Renesas RZ/G2L RIIC driver"
536 depends on RZG2L && DM_I2C
537 help
538 Support for the I2C controller (RIIC) on the Renesas RZ/G2L SoC
539 family.
540
Simon Glass39bc3be2015-03-06 13:19:04 -0700541config SYS_I2C_SANDBOX
542 bool "Sandbox I2C driver"
543 depends on SANDBOX && DM_I2C
Simon Glass0e01c622023-02-22 09:34:06 -0700544 default y
545 help
546 Enable I2C support for sandbox. This is an emulation of a real I2C
547 bus. Devices can be attached to the bus using the device tree
548 which specifies the driver to use. See sandbox.dts as an example.
549
550config SPL_SYS_I2C_SANDBOX
551 bool "Sandbox I2C driver (SPL)"
552 depends on SPL && SANDBOX && DM_I2C
553 default y
Simon Glass39bc3be2015-03-06 13:19:04 -0700554 help
555 Enable I2C support for sandbox. This is an emulation of a real I2C
556 bus. Devices can be attached to the bus using the device tree
Masahiro Yamada8d8371d2017-02-11 12:39:55 +0900557 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass39bc3be2015-03-06 13:19:04 -0700558
Tom Rinib9a254d2021-08-18 23:12:34 -0400559config SYS_I2C_SH
560 bool "Legacy SuperH I2C interface"
Marek Vasut6468c4c2024-02-27 17:05:55 +0100561 depends on ARCH_RENESAS && SYS_I2C_LEGACY
Tom Rinib9a254d2021-08-18 23:12:34 -0400562 help
563 Enable the legacy SuperH I2C interface.
564
565if SYS_I2C_SH
566config SYS_I2C_SH_NUM_CONTROLLERS
567 int
568 default 5
569
570config SYS_I2C_SH_BASE0
571 hex
572 default 0xE6820000
573
574config SYS_I2C_SH_BASE1
575 hex
576 default 0xE6822000
577
578config SYS_I2C_SH_BASE2
579 hex
580 default 0xE6824000
581
582config SYS_I2C_SH_BASE3
583 hex
584 default 0xE6826000
585
586config SYS_I2C_SH_BASE4
587 hex
588 default 0xE6828000
589
590config SH_I2C_8BIT
591 bool
592 default y
593
594config SH_I2C_DATA_HIGH
595 int
596 default 4
597
598config SH_I2C_DATA_LOW
599 int
600 default 5
601
602config SH_I2C_CLOCK
603 int
604 default 104000000
605endif
606
Tom Rini5817ff02021-08-17 17:59:46 -0400607config SYS_I2C_SOFT
608 bool "Legacy software I2C interface"
609 help
610 Enable the legacy software defined I2C interface
611
612config SYS_I2C_SOFT_SPEED
613 int "Software I2C bus speed"
614 depends on SYS_I2C_SOFT
615 default 100000
616 help
617 Speed of the software I2C bus
618
619config SYS_I2C_SOFT_SLAVE
620 hex "Software I2C slave address"
621 depends on SYS_I2C_SOFT
622 default 0xfe
623 help
624 Slave address of the software I2C bus
625
Suneel Garapatic6baea22020-05-26 14:13:07 +0200626config SYS_I2C_OCTEON
627 bool "Octeon II/III/TX/TX2 I2C driver"
628 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
629 default y
630 help
631 Add support for the Marvell Octeon I2C driver. This is used with
632 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
633 chips have several I2C ports and all are provided, controlled by
634 the device tree.
635
Sumit Garg77e4c4e2023-02-01 19:29:00 +0530636config SYS_I2C_QUP
637 bool "Qualcomm QUP I2C controller"
638 depends on ARCH_SNAPDRAGON
639 help
640 Support for Qualcomm QUP I2C controller based on Qualcomm Universal
641 Peripherals (QUP) engine. The QUP engine is an advanced high
642 performance slave port that provides a common data path (an output
643 FIFO and an input FIFO) for I2C and SPI interfaces. The I2C/SPI QUP
644 controller is publicly documented in the Snapdragon 410E (APQ8016E)
645 Technical Reference Manual, chapter "6.1 Qualcomm Universal
646 Peripherals Engine (QUP)".
647
Neil Armstrong32325852024-04-22 11:33:52 +0200648config SYS_I2C_GENI
649 bool "Qualcomm Generic Interface (GENI) I2C controller"
650 depends on ARCH_SNAPDRAGON
651 help
652 Support for the Qualcomm Generic Interface (GENI) I2C interface.
653 The Generic Interface (GENI) is a firmware based Qualcomm Universal
654 Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
655 bus protocols depending on the firmware type loaded at early boot time
656 based on system configuration.
657
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900658config SYS_I2C_S3C24X0
659 bool "Samsung I2C driver"
David Virage2ec1422024-08-02 21:19:16 +0200660 depends on DM_I2C
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900661 help
662 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass39bc3be2015-03-06 13:19:04 -0700663
Patrice Chotardebf442d2017-08-09 14:45:27 +0200664config SYS_I2C_STM32F7
665 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay85b53972018-03-12 10:46:10 +0100666 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotardebf442d2017-08-09 14:45:27 +0200667 help
668 Enable this option to add support for STM32 I2C controller
669 introduced with STM32F7/H7 SoCs. This I2C controller supports :
670 _ Slave and master modes
671 _ Multimaster capability
672 _ Standard-mode (up to 100 kHz)
673 _ Fast-mode (up to 400 kHz)
674 _ Fast-mode Plus (up to 1 MHz)
675 _ 7-bit and 10-bit addressing mode
676 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
677 _ All 7-bit addresses acknowledge mode
678 _ General call
679 _ Programmable setup and hold times
680 _ Easy to use event management
681 _ Optional clock stretching
682 _ Software reset
683
Samuel Holland60d49282021-10-08 00:17:20 -0500684config SYS_I2C_SUN6I_P2WI
685 bool "Allwinner sun6i P2WI controller"
686 depends on ARCH_SUNXI
687 help
688 Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded
689 in the Allwinner A31 and A31s SOCs. This interface is used to connect
690 to specific devices like the X-Powers AXP221 PMIC.
691
Samuel Hollandb348efb2021-10-08 00:17:21 -0500692config SYS_I2C_SUN8I_RSB
693 bool "Allwinner sun8i Reduced Serial Bus controller"
694 depends on ARCH_SUNXI
695 help
696 Support for Allwinner's Reduced Serial Bus (RSB) controller. This
697 controller is responsible for communicating with various RSB based
698 devices, such as X-Powers AXPxxx PMICs and AC100/AC200 CODEC ICs.
699
Jassi Brar23325cf2021-06-04 18:44:48 +0900700config SYS_I2C_SYNQUACER
701 bool "Socionext SynQuacer I2C controller"
702 depends on ARCH_SYNQUACER && DM_I2C
703 help
704 Support for Socionext Synquacer I2C controller. This I2C controller
705 will be used for RTC and LS-connector on DeveloperBox.
706
Peter Robinson12d37d82019-02-20 12:17:26 +0000707config SYS_I2C_TEGRA
708 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400709 depends on ARCH_TEGRA
Peter Robinson12d37d82019-02-20 12:17:26 +0000710 help
711 Support for NVIDIA I2C controller available in Tegra SoCs.
712
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900713config SYS_I2C_UNIPHIER
714 bool "UniPhier I2C driver"
715 depends on ARCH_UNIPHIER && DM_I2C
716 default y
717 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900718 Support for UniPhier I2C controller driver. This I2C controller
719 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900720
721config SYS_I2C_UNIPHIER_F
722 bool "UniPhier FIFO-builtin I2C driver"
723 depends on ARCH_UNIPHIER && DM_I2C
724 default y
725 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900726 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900727 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass2a80c402015-08-03 08:19:21 -0600728
Heiko Schochera37c1962018-10-11 07:26:33 +0200729config SYS_I2C_VERSATILE
730 bool "Arm Ltd Versatile I2C bus driver"
Tom Rini5af921e2021-02-20 20:05:47 -0500731 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochera37c1962018-10-11 07:26:33 +0200732 help
733 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
734 controller is present in the development boards manufactured by Arm Ltd.
735
Marek BehĂșn53929db2021-10-09 19:33:37 +0200736config SYS_I2C_MV
737 bool "Marvell PXA (Armada 3720) I2C driver"
738 help
739 Support for PXA based I2C controller used on Armada 3720 SoC.
740 In Linux, this driver is called i2c-pxa.
741
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200742config SYS_I2C_MVTWSI
743 bool "Marvell I2C driver"
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200744 help
745 Support for Marvell I2C controllers as used on the orion5x and
746 kirkwood SoC families.
747
Stephen Warren67a83482016-08-08 11:28:27 -0600748config TEGRA186_BPMP_I2C
749 bool "Enable Tegra186 BPMP-based I2C driver"
750 depends on TEGRA186_BPMP
751 help
752 Support for Tegra I2C controllers managed by the BPMP (Boot and
753 Power Management Processor). On Tegra186, some I2C controllers are
754 directly controlled by the main CPU, whereas others are controlled
755 by the BPMP, and can only be accessed by the main CPU via IPC
756 requests to the BPMP. This driver covers the latter case.
757
Tom Rinia6e29232021-08-18 23:12:32 -0400758config SYS_I2C_SLAVE
759 hex "I2C Slave address channel (all buses)"
760 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
761 default 0xfe
762 help
763 I2C Slave address channel 0 for all buses in the legacy drivers.
764 Many boards/controllers/drivers don't support an I2C slave
765 interface so provide a default slave address for them for use in
766 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
767 defined for any board which does support a slave interface and
768 this default used otherwise.
769
770config SYS_I2C_SPEED
771 int "I2C Slave channel 0 speed (all buses)"
772 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
773 default 100000
774 help
775 I2C Slave speed channel 0 for all buses in the legacy drivers.
776
Adam Fordfa1dd3d2017-08-11 06:39:34 -0500777config SYS_I2C_BUS_MAX
778 int "Max I2C busses"
Tom Rinia2359f52022-06-27 13:35:50 -0400779 depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
Tom Rinia2359f52022-06-27 13:35:50 -0400780 default 3 if OMAP34XX || AM33XX || AM43XX
Tom Rini8c6b4372024-07-15 13:35:53 -0600781 default 4 if ARCH_SOCFPGA
Adam Fordfa1dd3d2017-08-11 06:39:34 -0500782 default 5 if OMAP54XX
783 help
784 Define the maximum number of available I2C buses.
785
Marek Vasut9de0e2a2018-12-19 12:26:27 +0100786config SYS_I2C_XILINX_XIIC
787 bool "Xilinx AXI I2C driver"
788 depends on DM_I2C
789 help
790 Support for Xilinx AXI I2C controller.
791
Mario Six3bb409c2018-01-15 11:08:11 +0100792config SYS_I2C_IHS
793 bool "gdsys IHS I2C driver"
794 depends on DM_I2C
795 help
796 Support for gdsys IHS I2C driver on FPGA bus.
797
Simon Glass2a80c402015-08-03 08:19:21 -0600798source "drivers/i2c/muxes/Kconfig"
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900799
Simon Glass8e85e3c2021-07-10 21:14:35 -0600800endif