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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass8e85e3c2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +090028
Masahiro Yamadacd5cf8e2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczake5fa1212015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glass71fa5b42020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewski1e4450c2019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glasse200ee22015-02-13 12:20:48 -070038
Igor Opaniuk964f2322021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Tom Rini52b2e262021-08-18 23:12:24 -040050config SYS_I2C_LEGACY
51 bool "Enable legacy I2C subsystem and drivers"
52 depends on !DM_I2C
53 help
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
56 in SPL or TPL.
57
58config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
61 help
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
64
65config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
68 help
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
71
Simon Glass9ad07af2015-08-03 08:19:23 -060072config I2C_CROS_EC_TUNNEL
73 tristate "Chrome OS EC tunnel I2C bus"
74 depends on CROS_EC
75 help
76 This provides an I2C bus that will tunnel i2c commands through to
77 the other side of the Chrome OS EC to the I2C bus connected there.
78 This will work whatever the interface used to talk to the EC (SPI,
79 I2C or LPC). Some Chromebooks use this when the hardware design
80 does not allow direct access to the main PMIC from the AP.
81
Simon Glasseb2cc512015-08-03 08:19:24 -060082config I2C_CROS_EC_LDO
83 bool "Provide access to LDOs on the Chrome OS EC"
84 depends on CROS_EC
85 ---help---
86 On many Chromebooks the main PMIC is inaccessible to the AP. This is
87 often dealt with by using an I2C pass-through interface provided by
88 the EC. On some unfortunate models (e.g. Spring) the pass-through
89 is not available, and an LDO message is available instead. This
90 option enables a driver which provides very basic access to those
91 regulators, via the EC. We implement this as an I2C bus which
92 emulates just the TPS65090 messages we know about. This is done to
93 avoid duplicating the logic in the TPS65090 regulator driver for
94 enabling/disabling an LDO.
Simon Glass9ad07af2015-08-03 08:19:23 -060095
Lukasz Majewski0a556272017-03-21 12:08:25 +010096config I2C_SET_DEFAULT_BUS_NUM
97 bool "Set default I2C bus number"
98 depends on DM_I2C
99 help
100 Set default number of I2C bus to be accessed. This option provides
101 behaviour similar to old (i.e. pre DM) I2C bus driver.
102
103config I2C_DEFAULT_BUS_NUMBER
104 hex "I2C default bus number"
105 depends on I2C_SET_DEFAULT_BUS_NUM
106 default 0x0
107 help
108 Number of default I2C bus to use
109
Przemyslaw Marczakd3aa7e12015-03-31 18:57:18 +0200110config DM_I2C_GPIO
111 bool "Enable Driver Model for software emulated I2C bus driver"
112 depends on DM_I2C && DM_GPIO
113 help
114 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
115 configuration is given by the device tree. Kernel-style device tree
116 bindings are supported.
117 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
118
Igor Opaniuk964f2322021-02-09 13:52:43 +0200119config SPL_DM_I2C_GPIO
120 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass035939e2021-07-10 21:14:30 -0600121 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniuk964f2322021-02-09 13:52:43 +0200122 default y
123 help
124 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
125 configuration is given by the device tree. Kernel-style device tree
126 bindings are supported.
127 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
128
Songjun Wu26d88282016-06-20 13:22:38 +0800129config SYS_I2C_AT91
130 bool "Atmel I2C driver"
131 depends on DM_I2C && ARCH_AT91
132 help
133 Add support for the Atmel I2C driver. A serious problem is that there
134 is no documented way to issue repeated START conditions for more than
135 two messages, as needed to support combined I2C messages. Use the
136 i2c-gpio driver unless your system can cope with this limitation.
137 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
138
Rayagonda Kokatanurd5dc36f2020-04-08 11:12:27 +0530139config SYS_I2C_IPROC
140 bool "Broadcom I2C driver"
141 depends on DM_I2C
142 help
143 Broadcom I2C driver.
144 Add support for Broadcom I2C driver.
145 Say yes here to to enable the Broadco I2C driver.
146
mario.six@gdsys.cc349686c2016-04-25 08:31:09 +0200147config SYS_I2C_FSL
148 bool "Freescale I2C bus driver"
149 depends on DM_I2C
150 help
151 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
152 MPC85xx processors.
153
Moritz Fischer0075dac2015-12-28 09:47:11 -0800154config SYS_I2C_CADENCE
155 tristate "Cadence I2C Controller"
Michal Simekc28665d2020-08-06 15:18:36 +0200156 depends on DM_I2C
Moritz Fischer0075dac2015-12-28 09:47:11 -0800157 help
158 Say yes here to select Cadence I2C Host Controller. This controller is
159 e.g. used by Xilinx Zynq.
160
Arthur Life661ba2020-06-01 12:56:31 -0700161config SYS_I2C_CA
162 tristate "Cortina-Access I2C Controller"
163 depends on DM_I2C && CORTINA_PLATFORM
164 default n
165 help
166 Add support for the Cortina Access I2C host controller.
167 Say yes here to select Cortina-Access I2C Host Controller.
168
Adam Forddecc8952018-08-10 05:05:22 -0500169config SYS_I2C_DAVINCI
170 bool "Davinci I2C Controller"
171 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
172 help
173 Say yes here to add support for Davinci and Keystone I2C controller
174
Stefan Roeseb71955f2016-04-28 09:47:17 +0200175config SYS_I2C_DW
176 bool "Designware I2C Controller"
177 default n
178 help
179 Say yes here to select the Designware I2C Host Controller. This
180 controller is used in various SoCs, e.g. the ST SPEAr, Altera
181 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
182
maxims@google.com7f613312017-04-17 12:00:30 -0700183config SYS_I2C_ASPEED
184 bool "Aspeed I2C Controller"
185 depends on DM_I2C && ARCH_ASPEED
186 help
187 Say yes here to select Aspeed I2C Host Controller. The driver
188 supports AST2500 and AST2400 controllers, but is very limited.
189 Only single master mode is supported and only byte-by-byte
190 synchronous reads and writes are supported, no Pool Buffers or DMA.
191
Simon Glass5e66fdc2016-01-17 16:11:44 -0700192config SYS_I2C_INTEL
193 bool "Intel I2C/SMBUS driver"
194 depends on DM_I2C
195 help
196 Add support for the Intel SMBUS driver. So far this driver is just
197 a stub which perhaps some basic init. There is no implementation of
198 the I2C API meaning that any I2C operations will immediately fail
199 for now.
200
Peng Fand684adb2017-02-24 09:54:18 +0800201config SYS_I2C_IMX_LPI2C
202 bool "NXP i.MX LPI2C driver"
Peng Fand684adb2017-02-24 09:54:18 +0800203 help
204 Add support for the NXP i.MX LPI2C driver.
205
Trevor Woerner5f37e502021-06-10 22:37:08 -0400206config SYS_I2C_LPC32XX
207 bool "LPC32XX I2C driver"
208 depends on ARCH_LPC32XX
209 help
210 Enable support for the LPC32xx I2C driver.
211
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100212config SYS_I2C_MESON
213 bool "Amlogic Meson I2C driver"
214 depends on DM_I2C && ARCH_MESON
215 help
Beniamino Galvani83b153d2017-11-26 17:40:54 +0100216 Add support for the I2C controller available in Amlogic Meson
217 SoCs. The controller supports programmable bus speed including
218 standard (100kbits/s) and fast (400kbit/s) speed and allows the
219 software to define a flexible format of the bit streams. It has an
220 internal buffer holding up to 8 bytes for transfers and supports
221 both 7-bit and 10-bit addresses.
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100222
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100223config SYS_I2C_MXC
Sriram Dash7122a0c2018-02-06 11:26:30 +0530224 bool "NXP MXC I2C driver"
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100225 help
Chris Packham94d0d3d2019-01-13 22:13:25 +1300226 Add support for the NXP I2C driver. This supports up to four bus
227 channels and operating on standard mode up to 100 kbits/s and fast
228 mode up to 400 kbits/s.
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100229
Trent Piepho92ebcba2019-05-08 23:30:06 +0000230# These settings are not used with DM_I2C, however SPL doesn't use
231# DM_I2C even if DM_I2C is enabled, and so might use these settings even
232# when main u-boot does not!
233if SYS_I2C_MXC && (!DM_I2C || SPL)
Sriram Dash7122a0c2018-02-06 11:26:30 +0530234config SYS_I2C_MXC_I2C1
235 bool "NXP MXC I2C1"
236 help
237 Add support for NXP MXC I2C Controller 1.
238 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
239
240config SYS_I2C_MXC_I2C2
241 bool "NXP MXC I2C2"
242 help
243 Add support for NXP MXC I2C Controller 2.
244 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
245
246config SYS_I2C_MXC_I2C3
247 bool "NXP MXC I2C3"
248 help
249 Add support for NXP MXC I2C Controller 3.
250 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
251
252config SYS_I2C_MXC_I2C4
253 bool "NXP MXC I2C4"
254 help
255 Add support for NXP MXC I2C Controller 4.
256 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dasha64aa192018-02-06 11:26:31 +0530257
258config SYS_I2C_MXC_I2C5
259 bool "NXP MXC I2C5"
260 help
261 Add support for NXP MXC I2C Controller 5.
262 Required for SoCs which have I2C MXC controller 5 eg LX2160A
263
264config SYS_I2C_MXC_I2C6
265 bool "NXP MXC I2C6"
266 help
267 Add support for NXP MXC I2C Controller 6.
268 Required for SoCs which have I2C MXC controller 6 eg LX2160A
269
270config SYS_I2C_MXC_I2C7
271 bool "NXP MXC I2C7"
272 help
273 Add support for NXP MXC I2C Controller 7.
274 Required for SoCs which have I2C MXC controller 7 eg LX2160A
275
276config SYS_I2C_MXC_I2C8
277 bool "NXP MXC I2C8"
278 help
279 Add support for NXP MXC I2C Controller 8.
280 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash7122a0c2018-02-06 11:26:30 +0530281endif
282
283if SYS_I2C_MXC_I2C1
284config SYS_MXC_I2C1_SPEED
285 int "I2C Channel 1 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500286 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530287 default 100000
288 help
289 MXC I2C Channel 1 speed
290
291config SYS_MXC_I2C1_SLAVE
292 int "I2C1 Slave"
293 default 0
294 help
295 MXC I2C1 Slave
296endif
297
298if SYS_I2C_MXC_I2C2
299config SYS_MXC_I2C2_SPEED
300 int "I2C Channel 2 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500301 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530302 default 100000
303 help
304 MXC I2C Channel 2 speed
305
306config SYS_MXC_I2C2_SLAVE
307 int "I2C2 Slave"
308 default 0
309 help
310 MXC I2C2 Slave
311endif
312
313if SYS_I2C_MXC_I2C3
314config SYS_MXC_I2C3_SPEED
315 int "I2C Channel 3 speed"
316 default 100000
317 help
318 MXC I2C Channel 3 speed
319
320config SYS_MXC_I2C3_SLAVE
321 int "I2C3 Slave"
322 default 0
323 help
324 MXC I2C3 Slave
325endif
326
327if SYS_I2C_MXC_I2C4
328config SYS_MXC_I2C4_SPEED
329 int "I2C Channel 4 speed"
330 default 100000
331 help
332 MXC I2C Channel 4 speed
333
334config SYS_MXC_I2C4_SLAVE
335 int "I2C4 Slave"
336 default 0
337 help
338 MXC I2C4 Slave
339endif
340
Sriram Dasha64aa192018-02-06 11:26:31 +0530341if SYS_I2C_MXC_I2C5
342config SYS_MXC_I2C5_SPEED
343 int "I2C Channel 5 speed"
344 default 100000
345 help
346 MXC I2C Channel 5 speed
347
348config SYS_MXC_I2C5_SLAVE
349 int "I2C5 Slave"
350 default 0
351 help
352 MXC I2C5 Slave
353endif
354
355if SYS_I2C_MXC_I2C6
356config SYS_MXC_I2C6_SPEED
357 int "I2C Channel 6 speed"
358 default 100000
359 help
360 MXC I2C Channel 6 speed
361
362config SYS_MXC_I2C6_SLAVE
363 int "I2C6 Slave"
364 default 0
365 help
366 MXC I2C6 Slave
367endif
368
369if SYS_I2C_MXC_I2C7
370config SYS_MXC_I2C7_SPEED
371 int "I2C Channel 7 speed"
372 default 100000
373 help
374 MXC I2C Channel 7 speed
375
376config SYS_MXC_I2C7_SLAVE
377 int "I2C7 Slave"
378 default 0
379 help
380 MXC I2C7 Slave
381endif
382
383if SYS_I2C_MXC_I2C8
384config SYS_MXC_I2C8_SPEED
385 int "I2C Channel 8 speed"
386 default 100000
387 help
388 MXC I2C Channel 8 speed
389
390config SYS_MXC_I2C8_SLAVE
391 int "I2C8 Slave"
392 default 0
393 help
394 MXC I2C8 Slave
395endif
396
Stefan Bosch9d85dfb2020-07-10 19:07:28 +0200397config SYS_I2C_NEXELL
398 bool "Nexell I2C driver"
399 depends on DM_I2C
400 help
401 Add support for the Nexell I2C driver. This is used with various
402 Nexell parts such as S5Pxx18 series SoCs. All chips
403 have several I2C ports and all are provided, controlled by the
404 device tree.
405
Pragnesh Patel1cfbd7a2020-11-14 14:42:34 +0530406config SYS_I2C_OCORES
407 bool "ocores I2C driver"
408 depends on DM_I2C
409 help
410 Add support for ocores I2C controller. For details see
411 https://opencores.org/projects/i2c
412
Adam Ford85901162017-08-07 13:11:34 -0500413config SYS_I2C_OMAP24XX
414 bool "TI OMAP2+ I2C driver"
Vignesh R64d4f552019-06-04 18:08:11 -0500415 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Ford85901162017-08-07 13:11:34 -0500416 help
417 Add support for the OMAP2+ I2C driver.
418
Adam Forded3b0822018-01-24 15:21:21 -0600419if SYS_I2C_OMAP24XX
420config SYS_OMAP24_I2C_SLAVE
421 int "I2C Slave addr channel 0"
422 default 1
423 help
424 OMAP24xx I2C Slave address channel 0
425
426config SYS_OMAP24_I2C_SPEED
427 int "I2C Slave channel 0 speed"
428 default 100000
429 help
430 OMAP24xx Slave speed channel 0
431endif
432
Marek Vasut27165962018-04-21 18:57:28 +0200433config SYS_I2C_RCAR_I2C
434 bool "Renesas RCar I2C driver"
435 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
436 help
437 Support for Renesas RCar I2C controller.
438
Marek Vasut125d8df2017-11-28 08:02:27 +0100439config SYS_I2C_RCAR_IIC
440 bool "Renesas RCar Gen3 IIC driver"
Marek Vasut4bc57a32018-02-17 02:17:40 +0100441 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut125d8df2017-11-28 08:02:27 +0100442 help
443 Support for Renesas RCar Gen3 IIC controller.
444
Simon Glass3595f952015-08-30 16:55:39 -0600445config SYS_I2C_ROCKCHIP
446 bool "Rockchip I2C driver"
447 depends on DM_I2C
448 help
449 Add support for the Rockchip I2C driver. This is used with various
450 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham94d0d3d2019-01-13 22:13:25 +1300451 have several I2C ports and all are provided, controlled by the
Simon Glass3595f952015-08-30 16:55:39 -0600452 device tree.
453
Simon Glass39bc3be2015-03-06 13:19:04 -0700454config SYS_I2C_SANDBOX
455 bool "Sandbox I2C driver"
456 depends on SANDBOX && DM_I2C
457 help
458 Enable I2C support for sandbox. This is an emulation of a real I2C
459 bus. Devices can be attached to the bus using the device tree
Masahiro Yamada8d8371d2017-02-11 12:39:55 +0900460 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass39bc3be2015-03-06 13:19:04 -0700461
Tom Rini5817ff02021-08-17 17:59:46 -0400462config SYS_I2C_SOFT
463 bool "Legacy software I2C interface"
464 help
465 Enable the legacy software defined I2C interface
466
467config SYS_I2C_SOFT_SPEED
468 int "Software I2C bus speed"
469 depends on SYS_I2C_SOFT
470 default 100000
471 help
472 Speed of the software I2C bus
473
474config SYS_I2C_SOFT_SLAVE
475 hex "Software I2C slave address"
476 depends on SYS_I2C_SOFT
477 default 0xfe
478 help
479 Slave address of the software I2C bus
480
Suneel Garapatic6baea22020-05-26 14:13:07 +0200481config SYS_I2C_OCTEON
482 bool "Octeon II/III/TX/TX2 I2C driver"
483 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
484 default y
485 help
486 Add support for the Marvell Octeon I2C driver. This is used with
487 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
488 chips have several I2C ports and all are provided, controlled by
489 the device tree.
490
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900491config SYS_I2C_S3C24X0
492 bool "Samsung I2C driver"
Tom Rinifc917de2021-08-17 17:59:42 -0400493 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900494 help
495 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass39bc3be2015-03-06 13:19:04 -0700496
Patrice Chotardebf442d2017-08-09 14:45:27 +0200497config SYS_I2C_STM32F7
498 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay85b53972018-03-12 10:46:10 +0100499 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotardebf442d2017-08-09 14:45:27 +0200500 help
501 Enable this option to add support for STM32 I2C controller
502 introduced with STM32F7/H7 SoCs. This I2C controller supports :
503 _ Slave and master modes
504 _ Multimaster capability
505 _ Standard-mode (up to 100 kHz)
506 _ Fast-mode (up to 400 kHz)
507 _ Fast-mode Plus (up to 1 MHz)
508 _ 7-bit and 10-bit addressing mode
509 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
510 _ All 7-bit addresses acknowledge mode
511 _ General call
512 _ Programmable setup and hold times
513 _ Easy to use event management
514 _ Optional clock stretching
515 _ Software reset
516
Jassi Brar23325cf2021-06-04 18:44:48 +0900517config SYS_I2C_SYNQUACER
518 bool "Socionext SynQuacer I2C controller"
519 depends on ARCH_SYNQUACER && DM_I2C
520 help
521 Support for Socionext Synquacer I2C controller. This I2C controller
522 will be used for RTC and LS-connector on DeveloperBox.
523
Peter Robinson12d37d82019-02-20 12:17:26 +0000524config SYS_I2C_TEGRA
525 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400526 depends on ARCH_TEGRA
Peter Robinson12d37d82019-02-20 12:17:26 +0000527 help
528 Support for NVIDIA I2C controller available in Tegra SoCs.
529
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900530config SYS_I2C_UNIPHIER
531 bool "UniPhier I2C driver"
532 depends on ARCH_UNIPHIER && DM_I2C
533 default y
534 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900535 Support for UniPhier I2C controller driver. This I2C controller
536 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900537
538config SYS_I2C_UNIPHIER_F
539 bool "UniPhier FIFO-builtin I2C driver"
540 depends on ARCH_UNIPHIER && DM_I2C
541 default y
542 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900543 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900544 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass2a80c402015-08-03 08:19:21 -0600545
Heiko Schochera37c1962018-10-11 07:26:33 +0200546config SYS_I2C_VERSATILE
547 bool "Arm Ltd Versatile I2C bus driver"
Tom Rini5af921e2021-02-20 20:05:47 -0500548 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochera37c1962018-10-11 07:26:33 +0200549 help
550 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
551 controller is present in the development boards manufactured by Arm Ltd.
552
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200553config SYS_I2C_MVTWSI
554 bool "Marvell I2C driver"
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200555 help
556 Support for Marvell I2C controllers as used on the orion5x and
557 kirkwood SoC families.
558
Stephen Warren67a83482016-08-08 11:28:27 -0600559config TEGRA186_BPMP_I2C
560 bool "Enable Tegra186 BPMP-based I2C driver"
561 depends on TEGRA186_BPMP
562 help
563 Support for Tegra I2C controllers managed by the BPMP (Boot and
564 Power Management Processor). On Tegra186, some I2C controllers are
565 directly controlled by the main CPU, whereas others are controlled
566 by the BPMP, and can only be accessed by the main CPU via IPC
567 requests to the BPMP. This driver covers the latter case.
568
Adam Fordfa1dd3d2017-08-11 06:39:34 -0500569config SYS_I2C_BUS_MAX
570 int "Max I2C busses"
571 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
572 default 2 if TI816X
573 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
574 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
575 default 5 if OMAP54XX
576 help
577 Define the maximum number of available I2C buses.
578
Marek Vasut9de0e2a2018-12-19 12:26:27 +0100579config SYS_I2C_XILINX_XIIC
580 bool "Xilinx AXI I2C driver"
581 depends on DM_I2C
582 help
583 Support for Xilinx AXI I2C controller.
584
Mario Six3bb409c2018-01-15 11:08:11 +0100585config SYS_I2C_IHS
586 bool "gdsys IHS I2C driver"
587 depends on DM_I2C
588 help
589 Support for gdsys IHS I2C driver on FPGA bus.
590
Simon Glass2a80c402015-08-03 08:19:21 -0600591source "drivers/i2c/muxes/Kconfig"
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900592
Simon Glass8e85e3c2021-07-10 21:14:35 -0600593endif