blob: 89d2a499e48b1f711b4f726cd487525e0f726916 [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Stephen Warren905752c2016-09-13 10:46:00 -060025 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070026 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070027 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070028 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070029 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060030 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060031 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060033 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060037 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070038 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070039 select VIDCONSOLE_AS_LCD if DM_VIDEO
Simon Glass7a99a872017-01-23 13:31:20 -070040 select BOARD_EARLY_INIT_F
Daniel Thompsona9e2c672017-05-19 17:26:58 +010041 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070042
Stephen Warren905752c2016-09-13 10:46:00 -060043config TEGRA_NO_BPMP
44 bool "Tegra common options for SoCs without BPMP"
45 select TEGRA_CAR
46 select TEGRA_CAR_CLOCK
47 select TEGRA_CAR_RESET
48
Stephen Warren8c29e652015-11-23 10:32:01 -070049config TEGRA_ARMV7_COMMON
50 bool "Tegra 32-bit common options"
51 select CPU_V7
52 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080053 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070054 select SUPPORT_SPL
55 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060056 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -060057 select TEGRA_NO_BPMP
Stephen Warren8c29e652015-11-23 10:32:01 -070058
59config TEGRA_ARMV8_COMMON
60 bool "Tegra 64-bit common options"
61 select ARM64
62 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070063
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090064choice
65 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050066 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090067
68config TEGRA20
69 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050070 select ARM_ERRATA_716044
71 select ARM_ERRATA_742230
72 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070073 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090074
75config TEGRA30
76 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050077 select ARM_ERRATA_743622
78 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070079 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090080
81config TEGRA114
82 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070083 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090084
85config TEGRA124
86 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070087 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090088
Tom Warrenab0cc6b2015-03-04 16:36:00 -070089config TEGRA210
90 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -060091 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070092 select TEGRA_ARMV8_COMMON
Stephen Warren905752c2016-09-13 10:46:00 -060093 select TEGRA_NO_BPMP
Tom Warrenab0cc6b2015-03-04 16:36:00 -070094
Stephen Warren03667eb2016-05-12 13:32:55 -060095config TEGRA186
96 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -060097 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -060098 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -060099 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600100 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600101 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600102 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600103 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600104 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600105
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900106endchoice
107
Stephen Warren5a44ab42016-01-26 10:59:42 -0700108config TEGRA_DISCONNECT_UDC_ON_BOOT
109 bool "Disconnect USB device mode controller on boot"
110 default y
111 help
112 When loading U-Boot into RAM over USB protocols using tools such as
113 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
114 mode controller is initialized and enumerated by the host PC running
115 the tool. Unfortunately, these tools do not shut down the USB
116 controller before executing the downloaded code, and so the host PC
117 does not "de-enumerate" the USB device. This option shuts down the
118 USB controller when U-Boot boots to avoid leaving a stale USB device
119 present.
120
Simon Glass838723b2015-02-11 16:32:59 -0700121config SYS_MALLOC_F_LEN
122 default 0x1800
123
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900124source "arch/arm/mach-tegra/tegra20/Kconfig"
125source "arch/arm/mach-tegra/tegra30/Kconfig"
126source "arch/arm/mach-tegra/tegra114/Kconfig"
127source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700128source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600129source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900130
Simon Glassbd74b032017-05-17 03:25:11 -0600131config CMD_ENTERRCM
132 bool "Enable 'enterrcm' command"
133 default y
134 help
135 Tegra's boot ROM supports a mode whereby code may be downloaded and
136 flash-programmed over a USB connection. On dev boards, this is
137 typically entered by holding down a "force recovery" button and
138 resetting the CPU. However, not all boards have such a button (one
139 example is the Compulab Trimslice), so a method to enter RCM from
140 software is useful.
141
142 Even on boards other than Trimslice, controlling this over a UART
143 may be useful, e.g. to allow simple remote control without the need
144 for mechanical button actuators, or hooking up relays/... to the
145 button.
146
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900147endif