- c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 9 months ago
- bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 9 months ago
- 7029c3a Merge "fconf: Fix misra issues" into integration by Sandrine Bailleux · 4 years, 9 months ago
- 2711cc8 fconf: Fix misra issues by Louis Mayencourt · 4 years, 9 months ago
- e5a6fef Read-only xlat tables for BL31 memory by Petre-Ionut Tudor · 5 years ago
- 0fc5403 Merge "Add Matterhorn CPU lib" into integration by joanna.farley · 4 years, 9 months ago
- c9a45ed Merge "Add CPULib for Klein Core" into integration by joanna.farley · 4 years, 9 months ago
- 0a176e3 include: move MHZ_TICKS_PER_SEC to utils_def.h by Varun Wadekar · 4 years, 9 months ago
- 5ee3abc cpus: higher performance non-cacheable load forwarding by Varun Wadekar · 6 years ago
- 91d8061 coverity: fix MISRA violations by Zelalem · 4 years, 9 months ago
- d904ac1 Add Matterhorn CPU lib by Jimmy Brisson · 4 years, 10 months ago
- 2463f9d Add CPULib for Klein Core by Jimmy Brisson · 5 years ago
- 5b9055f fconf: Add mbedtls shared heap as property by Louis Mayencourt · 5 years ago
- 4da9b31 fconf: Add TBBR disable_authentication property by Louis Mayencourt · 5 years ago
- 6d2b573 fconf: Add dynamic config DTBs info as property by Louis Mayencourt · 5 years ago
- 81bd916 fconf: Populate properties from dtb during bl2 setup by Louis Mayencourt · 5 years ago
- 5a15b2d fconf: Load config dtb from bl1 by Louis Mayencourt · 5 years ago
- 944ade8 fconf: initial commit by Louis Mayencourt · 5 years ago
- ff46037 Merge "Use correct type when reading SCR register" into integration by Alexei Fedorov · 4 years, 10 months ago
- d57f1d2 Merge changes I0fb7cf79,Ia8eb4710 into integration by Soby Mathew · 4 years, 10 months ago
- 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · 4 years, 10 months ago
- 3880a36 Neovers N1: added support to update presence of External LLC by Manish Pandey · 4 years, 10 months ago
- f3a6839 qemu: Implement qemu_system_off via semihosting. by Andrew Walbran · 4 years, 10 months ago
- a265ade lib: utils_def: add CLAMP macro by Lionel Debieve · 4 years, 11 months ago
- 025b1d2 Merge "Unify type of "cpu_idx" across PSCI module." into integration by Mark Dykes · 4 years, 10 months ago
- 4287c0c Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · 5 years ago
- 71e66b4 Merge "smccc: add get smc function id num macro" into integration by Mark Dykes · 4 years, 10 months ago
- 304b7f9 smccc: add get smc function id num macro by Olivier Deprez · 5 years ago
- a091d04 Simplify PMF helper macro definitions across header files by Madhukar Pappireddy · 4 years, 10 months ago
- c74aa31 Merge "Workaround for Hercules erratum 1688305" into integration by Manish Pandey · 4 years, 11 months ago
- 4efede7 Workaround for Hercules erratum 1688305 by Madhukar Pappireddy · 5 years ago
- 9ab98aa lib: cpu: Add additional field definition for A72 L2 control by Sheetal Tigadoli · 6 years ago
- ce9af96 Merge "debugfs: add SMC channel" into integration by Mark Dykes · 5 years ago
- 40b88bd Merge "debugfs: add 9p device interface" into integration by Mark Dykes · 5 years ago
- db4e25a spm: Remove SPM Alpha 1 prototype and support files by Paul Beesley · 5 years ago
- aa4fd60 Merge changes from topic "bs/pmf32" into integration by György Szing · 5 years ago
- 9660dc1 debugfs: add SMC channel by Ambroise Vincent · 5 years ago
- f8cee2d Merge "arm: gicv3: Fix compiler dependent behavior" into integration by Soby Mathew · 5 years ago
- 78dc10c pmf: Make the runtime instrumentation work on AArch32 by Bence Szépkúti · 5 years ago
- cb4c562 debugfs: add 9p device interface by Olivier Deprez · 5 years ago
- cf17578 libc: Fix SIZE_MAX on AArch32 by Bence Szépkúti · 5 years ago
- 94606d6 Merge "libc: add memrchr" into integration by Alexei Fedorov · 5 years ago
- 35248f2 libc: add memrchr by Ambroise Vincent · 5 years ago
- 67dd93e arm: gicv3: Fix compiler dependent behavior by Ambroise Vincent · 5 years ago
- e5ed19c Merge changes from topic "bs/libc" into integration by Soby Mathew · 5 years ago
- 92410c9 libc: Consolidate the size_t and NULL definitions by Bence Szépkúti · 5 years ago
- fddf518 libc: Consolidate unified definitions by Bence Szépkúti · 5 years ago
- d52c9da libc: Unify intmax_t and uintmax_t on AArch32/64 by Bence Szépkúti · 5 years ago
- 20be077 Changes to support updated register usage in SMCCC v1.2 by Madhukar Pappireddy · 5 years ago
- b669361 Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__ by Balint Dobszay · 5 years ago
- 2fbce24 Merge "Neoverse N1 Errata Workaround 1542419" into integration by Soby Mathew · 5 years ago
- 94accd3 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · 5 years ago
- 584410e Introducing support for Cortex-A65AE by Imre Kis · 5 years ago
- 05e4d22 Introducing support for Cortex-A65 by Imre Kis · 5 years ago
- fea97f7 Cortex_hercules: Add support for Hercules-AE by Artsem Artsemenka · 5 years ago
- 33bd514 Adding new optional PSCI hook pwr_domain_on_finish_late by Madhukar Pappireddy · 5 years ago
- 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · 5 years ago
- f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 5 years ago
- 09a3b8d Merge changes I08cf22df,I535ee414,Ie84cfc96,I8c35ce4e,If7649764, ... into integration by Soby Mathew · 5 years ago
- 9180af2 Merge "libc: fix sparse warning for __assert()" into integration by Soby Mathew · 5 years ago
- 77389b2 libc: fix sparse warning for __assert() by Masahiro Yamada · 5 years ago
- a21d47e mediatek: mt8183: support CPU hotplug by developer · 6 years ago
- 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
- 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · 5 years ago
- 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
- db2ec85 Enable AMU for Cortex-Hercules by Balint Dobszay · 5 years ago
- 4047728 Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration by Soby Mathew · 5 years ago
- 2a231e3 Factor out cross-BL API into export headers suitable for 3rd party code by Julius Werner · 5 years ago
- dbba2b3 Introduce lightweight BL platform parameter library by Julius Werner · 5 years ago
- f57f108 Cortex_hercules: Introduce preliminary cpu support by Louis Mayencourt · 6 years ago
- 5ecfb39 Merge "AArch64: Add 128-bit integer types definitions" into integration by Sandrine Bailleux · 5 years ago
- abf08e1 AArch64: Add 128-bit integer types definitions by Alexei Fedorov · 5 years ago
- cc94264 Rename Cortex-Deimos to Cortex-A77 by Balint Dobszay · 5 years ago
- 00396bf Workaround for Neoverse N1 erratum 1262888 by lauwal01 · 5 years ago
- 42771af Workaround for Neoverse N1 erratum 1262606 by lauwal01 · 5 years ago
- 07c2a23 Workaround for Neoverse N1 erratum 1257314 by lauwal01 · 5 years ago
- 197f14c Workaround for Neoverse N1 erratum 1220197 by lauwal01 · 5 years ago
- e159044 Workaround for Neoverse N1 erratum 1207823 by lauwal01 · 5 years ago
- f2adb13 Workaround for Neoverse N1 erratum 1165347 by lauwal01 · 5 years ago
- 363ee3c Workaround for Neoverse N1 erratum 1130799 by lauwal01 · 5 years ago
- bd555f4 Workaround for Neoverse N1 erratum 1073348 by lauwal01 · 5 years ago
- b934740 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · 5 years ago
- db737bb Merge "Cortex-A55: workarounds for errata 1221012" into integration by Paul Beesley · 5 years ago
- b72fe7a Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · 5 years ago
- 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
- 1d3ba1c Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112 by Soby Mathew · 6 years ago
- b58142b Neoverse N1: Forces cacheable atomic to near by Louis Mayencourt · 6 years ago
- 4498b15 DSU: Implement workaround for errata 798953 by Louis Mayencourt · 6 years ago
- 254f6f0 DSU: Small fix and reformat on errata framework by Louis Mayencourt · 6 years ago
- 8a06127 Cortex-A35: Implement workaround for errata 855472 by Louis Mayencourt · 6 years ago
- 1601a15 Merge "cpus: Fix Cortex-A12 MIDR mask" into integration by Antonio Niño Díaz · 6 years ago
- 4800943 Add support for Cortex-A76AE CPU by Alexei Fedorov · 6 years ago
- 68a8d2b cpus: Fix Cortex-A12 MIDR mask by Heiko Stuebner · 6 years ago
- 987c20a Merge pull request #1894 from jts-arm/e1_midr by Soby Mathew · 6 years ago
- a5447ec Fix wrong MIDR_EL1 value for Neoverse E1 by John Tsichritzis · 6 years ago
- 6deaf9c Introduce preliminary support for Neoverse Zeus by John Tsichritzis · 6 years ago
- 8cf9eef Cortex-A17: Implement workaround for errata 852421 by Ambroise Vincent · 6 years ago
- 68b3812 Cortex-A15: Implement workaround for errata 827671 by Ambroise Vincent · 6 years ago
- fb6f2fc Merge pull request #1751 from vwadekar/tegra-scatter-file-support by Antonio Niño Díaz · 6 years ago