commit | 1c819c38eaf6dae8d52506e189d52c15f15543ee | [log] [tgz] |
---|---|---|
author | Louis Mayencourt <louis.mayencourt@arm.com> | Fri Jan 24 13:30:28 2020 +0000 |
committer | Louis Mayencourt <louis.mayencourt@arm.com> | Tue Jan 28 11:10:48 2020 +0000 |
tree | 17f863ee4f3f43cbeaa35e70e72e514774815642 | |
parent | 8ce82ac7cb62458a434845fc65c1791291c5dce7 [diff] |
Use correct type when reading SCR register The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>