1. b934740 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · 5 years ago
  2. b72fe7a Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · 5 years ago
  3. 1d3ba1c Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112 by Soby Mathew · 5 years ago
  4. b58142b Neoverse N1: Forces cacheable atomic to near by Louis Mayencourt · 5 years ago
  5. 4498b15 DSU: Implement workaround for errata 798953 by Louis Mayencourt · 5 years ago
  6. 254f6f0 DSU: Small fix and reformat on errata framework by Louis Mayencourt · 5 years ago
  7. 8a06127 Cortex-A35: Implement workaround for errata 855472 by Louis Mayencourt · 5 years ago
  8. 1601a15 Merge "cpus: Fix Cortex-A12 MIDR mask" into integration by Antonio Niño Díaz · 5 years ago
  9. 4800943 Add support for Cortex-A76AE CPU by Alexei Fedorov · 5 years ago
  10. 68a8d2b cpus: Fix Cortex-A12 MIDR mask by Heiko Stuebner · 5 years ago
  11. 987c20a Merge pull request #1894 from jts-arm/e1_midr by Soby Mathew · 5 years ago
  12. a5447ec Fix wrong MIDR_EL1 value for Neoverse E1 by John Tsichritzis · 5 years ago
  13. 6deaf9c Introduce preliminary support for Neoverse Zeus by John Tsichritzis · 6 years ago
  14. 8cf9eef Cortex-A17: Implement workaround for errata 852421 by Ambroise Vincent · 5 years ago
  15. 68b3812 Cortex-A15: Implement workaround for errata 827671 by Ambroise Vincent · 5 years ago
  16. cd5a55e Merge pull request #1849 from loumay-arm/lm/a73_errata by Antonio Niño Díaz · 5 years ago
  17. f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · 5 years ago
  18. d69722c Cortex-A73: Implement workaround for errata 852427 by Louis Mayencourt · 5 years ago
  19. 1b0db76 Cortex-A57: Implement workaround for erratum 814670 by Ambroise Vincent · 5 years ago
  20. 6a77f05 Cortex-A55: Implement workaround for erratum 798797 by Ambroise Vincent · 5 years ago
  21. 6f31960 Cortex-A55: Implement workaround for erratum 778703 by Ambroise Vincent · 5 years ago
  22. 7927fa0 Cortex-A55: Implement workaround for erratum 768277 by Ambroise Vincent · 5 years ago
  23. 59fa218 Add workaround for errata 1073348 for Cortex-A76 by Louis Mayencourt · 5 years ago
  24. adda9d4 Add workaround for errata 1220197 for Cortex-A76 by Louis Mayencourt · 5 years ago
  25. 4405de6 Add workaround for errata 855423 of Cortex-A73 by Louis Mayencourt · 5 years ago
  26. 947fea0 Merge pull request #1835 from jts-arm/rename by Antonio Niño Díaz · 5 years ago
  27. 16e6d9f Rename Cortex-Helios to Neoverse E1 by John Tsichritzis · 5 years ago
  28. 3d417ac Rename Cortex-Helios filenames to Neoverse E1 by John Tsichritzis · 5 years ago
  29. 56369c1 Rename Cortex-Ares to Neoverse N1 by John Tsichritzis · 5 years ago
  30. 97ff6d0 Rename Cortex-Ares filenames to Neoverse N1 by John Tsichritzis · 5 years ago
  31. a904487 Update macro to check need for CVE-2017-5715 mitigation by Antonio Nino Diaz · 5 years ago
  32. 5e79cfe cpus: Add casts to all definitions in CPU headers by Antonio Nino Diaz · 5 years ago
  33. 96f1631 cpus: Fix some incorrect definitions in CPU headers by Antonio Nino Diaz · 5 years ago
  34. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  35. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  36. 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 6 years ago
  37. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · 6 years ago
  38. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · 6 years ago
  39. b561536 plat/arm: relocate the jump_if_cpu_midr macro. by Deepak Pandey · 6 years ago
  40. dc9fab1 Remove all other deprecated interfaces and files by Antonio Nino Diaz · 6 years ago
  41. cd38e6e cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · 6 years ago
  42. 2b91412 cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · 6 years ago
  43. 4daa1de DSU erratum 936184 workaround by John Tsichritzis · 6 years ago
  44. f7f6041 Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 by danh-arm · 6 years ago
  45. 9eb5cf4 lib: cpu: Add L2 cache aux control register definition to CA72 by Konstantin Porotchkin · 6 years ago
  46. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · 6 years ago
  47. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · 6 years ago
  48. 26b8589 Remove integrity check in declare_cpu_ops_base by Roberto Vargas · 6 years ago
  49. 67762d9 Remove .struct directive by Roberto Vargas · 6 years ago
  50. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 6 years ago
  51. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 6 years ago
  52. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · 6 years ago
  53. ea84d6b Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 7 years ago
  54. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  55. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  56. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  57. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  58. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 6 years ago
  59. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 6 years ago
  60. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  61. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · 6 years ago
  62. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 6 years ago
  63. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 6 years ago
  64. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · 6 years ago
  65. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · 6 years ago
  66. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 6 years ago
  67. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 6 years ago
  68. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  69. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  70. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 7 years ago
  71. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  72. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  73. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  74. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  75. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  76. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  77. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  78. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  79. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  80. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  81. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · 7 years ago
  82. ac838c5 aarch32: Fix L2CTRL definition for Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  83. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  84. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  85. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  86. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  87. 9326b90 Cortex-A53: add some bit definitions by Haojian Zhuang · 7 years ago
  88. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  89. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 7 years ago
  90. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 7 years ago
  91. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  92. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  93. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  94. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 8 years ago
  95. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  96. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  97. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  98. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  99. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  100. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago