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Paul Beesley97743022019-07-12 11:37:07 +01001TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10 .. code:: shell
11
Mark Dykesef3a4562020-01-08 20:37:18 +000012 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
Paul Beesley97743022019-07-12 11:37:07 +010013
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18 .. code:: shell
19
20 > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25 .. note::
26
27 *u-boot.bin* should be used and not *u-boot-spl.bin*
28
Pali Rohár56c58d42022-11-06 23:07:22 +010029Set MSS/SCP image path (mandatory only for A7K/A8K/CN913x when MSS_SUPPORT=1)
Paul Beesley97743022019-07-12 11:37:07 +010030
31 .. code:: shell
32
33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40 .. code:: shell
41
42 > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46 .. code:: shell
47
48 > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
Pali Rohár179b6732021-02-01 12:22:37 +010054- PLAT
55
56 Supported Marvell platforms are:
57
58 - a3700 - A3720 DB, EspressoBin and Turris MOX
59 - a70x0
60 - a70x0_amc - AMC board
Robert Marko9c523ec2021-10-11 16:25:49 +020061 - a70x0_mochabin - Globalscale MOCHAbin
Pali Rohár179b6732021-02-01 12:22:37 +010062 - a80x0
63 - a80x0_mcbin - MacchiatoBin
64 - a80x0_puzzle - IEI Puzzle-M801
65 - t9130 - CN913x
Marcin Wojtase3ade602021-06-22 23:44:26 +020066 - t9130_cex7_eval - CN913x CEx7 Evaluation Board
Pali Rohár179b6732021-02-01 12:22:37 +010067
Paul Beesley97743022019-07-12 11:37:07 +010068- DEBUG
69
70 Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
Pali Rohár9bff57e2022-03-16 12:38:43 +010071 Can be enabled also when building UART recovery images, there is no issue with it.
72
73 Production TF-A images should be built without this debug option!
Paul Beesley97743022019-07-12 11:37:07 +010074
75- LOG_LEVEL
76
77 Defines the level of logging which will be purged to the default output port.
78
Pali Rohár8dc46a02020-10-29 17:44:27 +010079 - 0 - LOG_LEVEL_NONE
80 - 10 - LOG_LEVEL_ERROR
81 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0)
82 - 30 - LOG_LEVEL_WARNING
83 - 40 - LOG_LEVEL_INFO (default for DEBUG=1)
84 - 50 - LOG_LEVEL_VERBOSE
Paul Beesley97743022019-07-12 11:37:07 +010085
86- USE_COHERENT_MEM
87
88 This flag determines whether to include the coherent memory region in the
Pali Rohár8dc46a02020-10-29 17:44:27 +010089 BL memory map or not. Enabled by default.
Paul Beesley97743022019-07-12 11:37:07 +010090
91- LLC_ENABLE
92
93 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
94
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +030095- LLC_SRAM
96
Konstantin Porotchkin28503262019-04-15 16:32:59 +030097 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
98 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
99 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
100 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
101 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
102 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +0300103
Paul Beesley97743022019-07-12 11:37:07 +0100104- MARVELL_SECURE_BOOT
105
106 Build trusted(=1)/non trusted(=0) image, default is non trusted.
Pali Rohár3278e7e2021-07-20 17:42:24 +0200107 This parameter is used only for ``mrvl_flash`` and ``mrvl_uart`` targets.
Paul Beesley97743022019-07-12 11:37:07 +0100108
109- MV_DDR_PATH
110
Pali Rohárcf44b122021-06-28 15:27:25 +0200111 This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets.
Pali Rohár56c58d42022-11-06 23:07:22 +0100112 For A7K/A8K/CN913x it is used for BLE build and for Armada37x0 it used
Pali Rohár111a0122021-07-07 12:14:20 +0200113 for ddr_tool build.
Pali Rohárcf44b122021-06-28 15:27:25 +0200114
Pali Rohár111a0122021-07-07 12:14:20 +0200115 Specify path to the full checkout of Marvell mv-ddr-marvell git
116 repository. Checkout must contain also .git subdirectory because
117 mv-ddr build process calls git commands.
Paul Beesley97743022019-07-12 11:37:07 +0100118
Pali Rohár111a0122021-07-07 12:14:20 +0200119 Do not remove any parts of git checkout becuase build process and other
120 applications need them for correct building and version determination.
Pali Rohár88f225a2021-01-26 10:44:07 +0100121
Pali Rohár3278e7e2021-07-20 17:42:24 +0200122
123CN913x specific build options:
124
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200125- CP_NUM
126
127 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
128 the build uses the default number of CPs, which is a number of embedded CPs inside the
129 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
130 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
131 values with CP_NUM are in a range of 1 to 3.
132
Pali Rohár3278e7e2021-07-20 17:42:24 +0200133
Pali Rohár56c58d42022-11-06 23:07:22 +0100134A7K/A8K/CN913x specific build options:
Pali Rohár3278e7e2021-07-20 17:42:24 +0200135
136- BLE_PATH
137
138 Points to BLE (Binary ROM extension) sources folder.
139 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``
140 which uses TF-A in-tree BLE implementation.
141
Pali Rohár6a194cc2021-08-20 14:35:08 +0200142- MSS_SUPPORT
143
144 When ``MSS_SUPPORT=1``, then TF-A includes support for Management SubSystem (MSS).
145 When enabled it is required to specify path to the MSS firmware image via ``SCP_BL2``
146 option.
147
148 This option is by default enabled.
149
150- SCP_BL2
151
152 Specify path to the MSS fimware image binary which will run on Cortex-M3 coprocessor.
153 It is available in Marvell binaries-marvell git repository. Required when ``MSS_SUPPORT=1``.
154
Robert Marko9c523ec2021-10-11 16:25:49 +0200155Globalscale MOCHAbin specific build options:
156
157- DDR_TOPOLOGY
158
159 The DDR topology map index/name, default is 0.
160
161 Supported Options:
162 - 0 - DDR4 1CS 2GB
163 - 1 - DDR4 1CS 4GB
164 - 2 - DDR4 2CS 8GB
Pali Rohár3278e7e2021-07-20 17:42:24 +0200165
166Armada37x0 specific build options:
167
Manish Pandey0e3379d2022-10-10 11:43:08 +0100168- HANDLE_EA_EL3_FIRST_NS
Pali Rohár76f38492021-07-09 15:10:27 +0200169
Manish Pandey0e3379d2022-10-10 11:43:08 +0100170 When ``HANDLE_EA_EL3_FIRST_NS=1``, External Aborts and SError Interrupts, resulting from errors
171 in NS world, will be always trapped in TF-A. TF-A in this case enables dirty hack / workaround for
172 a bug found in U-Boot and Linux kernel PCIe controller driver pci-aardvark.c, traps and then masks
173 SError interrupt caused by AXI SLVERR on external access (syndrome 0xbf000002).
Pali Rohár76f38492021-07-09 15:10:27 +0200174
Manish Pandey0e3379d2022-10-10 11:43:08 +0100175 Otherwise when ``HANDLE_EA_EL3_FIRST_NS=0``, these exceptions will be trapped in the current
Pali Rohár76f38492021-07-09 15:10:27 +0200176 exception level (or in EL1 if the current exception level is EL0). So exceptions caused by
177 U-Boot will be trapped in U-Boot, exceptions caused by Linux kernel (or user applications)
178 will be trapped in Linux kernel.
179
180 Mentioned bug in pci-aardvark.c driver is fixed in U-Boot version v2021.07 and Linux kernel
181 version v5.13 (workarounded since Linux kernel version 5.9) and also backported in Linux
182 kernel stable releases since versions v5.12.13, v5.10.46, v5.4.128, v4.19.198, v4.14.240.
183
184 If target system has already patched version of U-Boot and Linux kernel then it is strongly
185 recommended to not enable this workaround as it disallows propagating of all External Aborts
186 to running Linux kernel and makes correctable errors as fatal aborts.
187
Manish Pandey0e3379d2022-10-10 11:43:08 +0100188 This option is now disabled by default. In past this option has different name "HANDLE_EA_EL3_FIRST" and
189 was enabled by default in TF-A versions v2.2, v2.3, v2.4 and v2.5.
Pali Rohár76f38492021-07-09 15:10:27 +0200190
Pali Rohár3278e7e2021-07-20 17:42:24 +0200191- CM3_SYSTEM_RESET
192
193 When ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will be used for system reset.
194
195 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the
196 Cortex-M3 secure coprocessor.
197 The firmware running in the coprocessor must either implement this functionality or
198 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell
199 repository). If this option is enabled but the firmware does not support this command,
200 an error message will be printed prior trying to reboot via the usual way.
201
202 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to
203 sometime hang the board.
204
205- A3720_DB_PM_WAKEUP_SRC
206
207 For Armada 3720 Development Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``,
208 TF-A will setup PM wake up src configuration. This option is disabled by default.
209
210
211Armada37x0 specific build options for ``mrvl_flash`` and ``mrvl_uart`` targets:
212
Paul Beesley97743022019-07-12 11:37:07 +0100213- DDR_TOPOLOGY
214
Pali Rohár3278e7e2021-07-20 17:42:24 +0200215 The DDR topology map index/name, default is 0.
Paul Beesley97743022019-07-12 11:37:07 +0100216
217 Supported Options:
Pali Rohár38686c22021-02-01 12:23:31 +0100218 - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
219 - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular)
220 - 2 - DDR3 2CS 1GB (EspressoBin V3-V5)
221 - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular)
222 - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
223 - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra)
224 - 6 - DDR4 2CS 2GB (EspressoBin V7)
225 - 7 - DDR3 2CS 2GB (EspressoBin V3-V5)
226 - CUST - CUSTOMER BOARD (Customer board settings)
Paul Beesley97743022019-07-12 11:37:07 +0100227
228- CLOCKSPRESET
229
Pali Rohár3278e7e2021-07-20 17:42:24 +0200230 The clock tree configuration preset including CPU and DDR frequency,
Paul Beesley97743022019-07-12 11:37:07 +0100231 default is CPU_800_DDR_800.
232
Pali Rohár8dc46a02020-10-29 17:44:27 +0100233 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
234 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
235 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
236 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
Paul Beesley97743022019-07-12 11:37:07 +0100237
Pali Rohár35142872021-02-01 12:24:42 +0100238 Look at Armada37x0 chip package marking on board to identify correct CPU frequency.
239 The last line on package marking (next line after the 88F37x0 line) should contain:
240
241 - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800``
242 - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800``
243 - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750``
244
Paul Beesley97743022019-07-12 11:37:07 +0100245- BOOTDEV
246
Pali Rohár3278e7e2021-07-20 17:42:24 +0200247 The flash boot device, default is ``SPINOR``.
Paul Beesley97743022019-07-12 11:37:07 +0100248
249 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
250
251 - SPINOR - SPI NOR flash boot
252 - SPINAND - SPI NAND flash boot
253 - EMMCNORM - eMMC Download Mode
254
255 Download boot loader or program code from eMMC flash into CM3 or CA53
256 Requires full initialization and command sequence
257
258 - SATA - SATA device boot
259
Pali Rohára0747422021-01-28 13:09:36 +0100260 Image needs to be stored at disk LBA 0 or at disk partition with
261 MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with
Pali Rohár3e67cc72022-02-14 18:27:32 +0100262 GPT partition type GUID ``6828311A-BA55-42A4-BCDE-A89BB5EDECAE``.
Pali Rohára0747422021-01-28 13:09:36 +0100263
Paul Beesley97743022019-07-12 11:37:07 +0100264- PARTNUM
265
Pali Rohár3278e7e2021-07-20 17:42:24 +0200266 The boot partition number, default is 0.
Paul Beesley97743022019-07-12 11:37:07 +0100267
268 To boot from eMMC, the value should be aligned with the parameter in
269 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
270 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
271 build instructions.
272
273- WTMI_IMG
274
Pali Rohár3278e7e2021-07-20 17:42:24 +0200275 The path of the binary can point to an image which
Paul Beesley97743022019-07-12 11:37:07 +0100276 does nothing, an image which supports EFUSE or a customized CM3 firmware
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100277 binary. The default image is ``fuse.bin`` that built from sources in WTP
Paul Beesley97743022019-07-12 11:37:07 +0100278 folder, which is the next option. If the default image is OK, then this
279 option should be skipped.
280
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100281 Please note that this is not a full WTMI image, just a main loop without
282 hardware initialization code. Final WTMI image is built from this WTMI_IMG
283 binary and sys-init code from the WTP directory which sets DDR and CPU
284 clocks according to DDR_TOPOLOGY and CLOCKSPRESET options.
285
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200286 CZ.NIC as part of Turris project released free and open source WTMI
287 application firmware ``wtmi_app.bin`` for all Armada 3720 devices.
288 This firmware includes additional features like access to Hardware
289 Random Number Generator of Armada 3720 SoC which original Marvell's
290 ``fuse.bin`` image does not have.
291
292 CZ.NIC's Armada 3720 Secure Firmware is available at website:
293
294 https://gitlab.nic.cz/turris/mox-boot-builder/
295
Paul Beesley97743022019-07-12 11:37:07 +0100296- WTP
297
Pali Rohár111a0122021-07-07 12:14:20 +0200298 Specify path to the full checkout of Marvell A3700-utils-marvell git
299 repository. Checkout must contain also .git subdirectory because WTP
300 build process calls git commands.
301
302 WTP build process uses also Marvell mv-ddr-marvell git repository
303 specified in MV_DDR_PATH option.
Paul Beesley97743022019-07-12 11:37:07 +0100304
Pali Rohár111a0122021-07-07 12:14:20 +0200305 Do not remove any parts of git checkout becuase build process and other
306 applications need them for correct building and version determination.
Pali Rohár88f225a2021-01-26 10:44:07 +0100307
Pali Rohár8dc46a02020-10-29 17:44:27 +0100308- CRYPTOPP_PATH
Paul Beesley97743022019-07-12 11:37:07 +0100309
Pali Rohár3278e7e2021-07-20 17:42:24 +0200310 Use this parameter to point to Crypto++ source code
Pali Rohára304cf52021-01-26 10:44:07 +0100311 directory. If this option is specified then Crypto++ source code in
312 CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library
313 is required for building WTP image tool. Either CRYPTOPP_PATH or
314 CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0.
315
316- CRYPTOPP_LIBDIR
317
Pali Rohár3278e7e2021-07-20 17:42:24 +0200318 Use this parameter to point to the directory with
Pali Rohára304cf52021-01-26 10:44:07 +0100319 compiled Crypto++ library. By default it points to the CRYPTOPP_PATH.
320
Pali Rohára3359862022-02-16 15:15:42 +0100321 On Debian systems it is possible to install system-wide Crypto++ library
322 via command ``apt install libcrypto++-dev`` and specify CRYPTOPP_LIBDIR
323 to ``/usr/lib/``.
324
Pali Rohára304cf52021-01-26 10:44:07 +0100325- CRYPTOPP_INCDIR
326
Pali Rohár3278e7e2021-07-20 17:42:24 +0200327 Use this parameter to point to the directory with
Pali Rohára304cf52021-01-26 10:44:07 +0100328 header files of Crypto++ library. By default it points to the CRYPTOPP_PATH.
Paul Beesley97743022019-07-12 11:37:07 +0100329
Pali Rohára3359862022-02-16 15:15:42 +0100330 On Debian systems it is possible to install system-wide Crypto++ library
331 via command ``apt install libcrypto++-dev`` and specify CRYPTOPP_INCDIR
332 to ``/usr/include/crypto++/``.
333
Paul Beesley97743022019-07-12 11:37:07 +0100334
Pali Rohár8dc46a02020-10-29 17:44:27 +0100335For example, in order to build the image in debug mode with log level up to 'notice' level run
Paul Beesley97743022019-07-12 11:37:07 +0100336
Pali Rohár8dc46a02020-10-29 17:44:27 +0100337.. code:: shell
338
339 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash
Paul Beesley97743022019-07-12 11:37:07 +0100340
Pali Rohár8dc46a02020-10-29 17:44:27 +0100341And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
342the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
343the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
344line is as following
Paul Beesley97743022019-07-12 11:37:07 +0100345
Pali Rohár8dc46a02020-10-29 17:44:27 +0100346.. code:: shell
347
348 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
349 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
350 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
351 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
Pali Rohár9e737b62021-01-26 10:44:07 +0100352 all fip mrvl_bootimage mrvl_flash mrvl_uart
Pali Rohár8dc46a02020-10-29 17:44:27 +0100353
354To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command:
355
356.. code:: shell
357
Marek Behún19d85782021-01-05 14:01:05 +0100358 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \
359 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage
Pali Rohár8dc46a02020-10-29 17:44:27 +0100360
Pali Rohár0c0d2652021-02-01 12:32:36 +0100361Here is full example how to build production release of Marvell firmware image (concatenated
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200362binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
363EspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and
3641GB DDR4 RAM (DDR_TOPOLOGY=5):
Luka Kovaciceb498352021-01-14 14:25:15 +0100365
366.. code:: shell
367
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200368 > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
369 > git clone https://source.denx.de/u-boot/u-boot.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100370 > git clone https://github.com/weidai11/cryptopp.git
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200371 > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
372 > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
373 > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100374 > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200375 > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin
Pali Rohár0c0d2652021-02-01 12:32:36 +0100376 > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \
377 USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200378 MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \
379 CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \
380 WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash
Luka Kovaciceb498352021-01-14 14:25:15 +0100381
Pali Rohár0c0d2652021-02-01 12:32:36 +0100382Produced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin``
Paul Beesley97743022019-07-12 11:37:07 +0100383
384Special Build Flags
385--------------------
386
387- PLAT_RECOVERY_IMAGE_ENABLE
388 When set this option to enable secondary recovery function when build atf.
389 In order to build UART recovery image this operation should be disabled for
Pali Rohár56c58d42022-11-06 23:07:22 +0100390 A7K/A8K/CN913x because of hardware limitation (boot from secondary image
Paul Beesley97743022019-07-12 11:37:07 +0100391 can interrupt UART recovery process). This MACRO definition is set in
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100392 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
Paul Beesley97743022019-07-12 11:37:07 +0100393
Alex Leiboviched2fb472019-02-25 12:24:29 +0200394- DDR32
395 In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
396 this flag should be set to 1.
397
Paul Beesleyd2fcc4e2019-05-29 13:59:40 +0100398For more information about build options, please refer to the
399:ref:`Build Options` document.
Paul Beesley97743022019-07-12 11:37:07 +0100400
401
402Build output
403------------
Pali Rohár8dc46a02020-10-29 17:44:27 +0100404Marvell's TF-A compilation generates 8 files:
Paul Beesley97743022019-07-12 11:37:07 +0100405
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100406 - ble.bin - BLe image (not available for Armada37x0)
Paul Beesley97743022019-07-12 11:37:07 +0100407 - bl1.bin - BL1 image
408 - bl2.bin - BL2 image
409 - bl31.bin - BL31 image
410 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
411 - boot-image.bin - TF-A image (contains BL1 and FIP images)
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100412 - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it
413 contains TIM, WTMI and boot-image.bin images. For other platforms it contains
414 BLe and boot-image.bin images. Should be placed on the boot flash/device.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100415 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images
416 for booting via UART. Could be loaded via Marvell's WtpDownload tool from
417 A3700-utils-marvell repository.
Paul Beesley97743022019-07-12 11:37:07 +0100418
Pali Rohár9e737b62021-01-26 10:44:07 +0100419Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target
420``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart``
421produce ``uart-images.tgz.bin`` file.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100422
Paul Beesley97743022019-07-12 11:37:07 +0100423
424Tools and external components installation
425------------------------------------------
426
Pali Rohár3278e7e2021-07-20 17:42:24 +0200427Armada37x0 Builds require installation of additional components
428~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Paul Beesley97743022019-07-12 11:37:07 +0100429
430(1) ARM cross compiler capable of building images for the service CPU (CM3).
431 This component is usually included in the Linux host packages.
432 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
433 using the following command
434
435 .. code:: shell
436
437 > sudo apt-get install gcc-arm-linux-gnueabi
438
439 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
440 overwritten using the environment variable ``CROSS_CM3``.
441 Example for BASH shell
442
443 .. code:: shell
444
445 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
446
447(2) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100448 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100449
450 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
451
Pali Rohár65c8d112020-10-07 11:01:00 +0200452(3) Armada3700 tools available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100453 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100454
455 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
456
Pali Rohár8dc46a02020-10-29 17:44:27 +0100457(4) Crypto++ library available at the following repository:
458
459 https://github.com/weidai11/cryptopp.git
460
Pali Rohár3278e7e2021-07-20 17:42:24 +0200461(5) Optional CZ.NIC's Armada 3720 Secure Firmware:
462
463 https://gitlab.nic.cz/turris/mox-boot-builder.git
464
Pali Rohár6a194cc2021-08-20 14:35:08 +0200465Armada70x0, Armada80x0 and CN913x Builds require installation of additional components
466~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Paul Beesley97743022019-07-12 11:37:07 +0100467
468(1) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100469 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100470
471 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
Pali Rohár6a194cc2021-08-20 14:35:08 +0200472
473(2) MSS Management SubSystem Firmware available at the following repository
474 (use the "binaries-marvell-armada-SDK10.0.1.0" branch):
475
476 https://github.com/MarvellEmbeddedProcessors/binaries-marvell.git