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Paul Beesley97743022019-07-12 11:37:07 +01001TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10 .. code:: shell
11
Mark Dykesef3a4562020-01-08 20:37:18 +000012 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
Paul Beesley97743022019-07-12 11:37:07 +010013
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18 .. code:: shell
19
20 > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25 .. note::
26
27 *u-boot.bin* should be used and not *u-boot-spl.bin*
28
Konstantin Porotchkin23099612020-10-12 18:13:07 +030029Set MSS/SCP image path (mandatory only for A7K/8K/CN913x when MSS_SUPPORT=1)
Paul Beesley97743022019-07-12 11:37:07 +010030
31 .. code:: shell
32
33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40 .. code:: shell
41
42 > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46 .. code:: shell
47
48 > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
Pali Rohár179b6732021-02-01 12:22:37 +010054- PLAT
55
56 Supported Marvell platforms are:
57
58 - a3700 - A3720 DB, EspressoBin and Turris MOX
59 - a70x0
60 - a70x0_amc - AMC board
61 - a80x0
62 - a80x0_mcbin - MacchiatoBin
63 - a80x0_puzzle - IEI Puzzle-M801
64 - t9130 - CN913x
65
Paul Beesley97743022019-07-12 11:37:07 +010066- DEBUG
67
68 Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
69 Must be disabled when building UART recovery images due to current console driver
70 implementation that is not compatible with Xmodem protocol used for boot image download.
71
72- LOG_LEVEL
73
74 Defines the level of logging which will be purged to the default output port.
75
Pali Rohár8dc46a02020-10-29 17:44:27 +010076 - 0 - LOG_LEVEL_NONE
77 - 10 - LOG_LEVEL_ERROR
78 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0)
79 - 30 - LOG_LEVEL_WARNING
80 - 40 - LOG_LEVEL_INFO (default for DEBUG=1)
81 - 50 - LOG_LEVEL_VERBOSE
Paul Beesley97743022019-07-12 11:37:07 +010082
83- USE_COHERENT_MEM
84
85 This flag determines whether to include the coherent memory region in the
Pali Rohár8dc46a02020-10-29 17:44:27 +010086 BL memory map or not. Enabled by default.
Paul Beesley97743022019-07-12 11:37:07 +010087
88- LLC_ENABLE
89
90 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
91
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +030092- LLC_SRAM
93
Konstantin Porotchkin28503262019-04-15 16:32:59 +030094 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
95 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
96 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
97 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
98 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
99 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +0300100
Marek Behún19d85782021-01-05 14:01:05 +0100101- CM3_SYSTEM_RESET
102
103 For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will
104 be used for system reset.
105 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the
106 Cortex-M3 secure coprocessor.
107 The firmware running in the coprocessor must either implement this functionality or
108 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell
109 repository). If this option is enabled but the firmware does not support this command,
110 an error message will be printed prior trying to reboot via the usual way.
111
112 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to
113 sometime hang the board.
114
Pali Roháre7704b02021-04-06 19:18:30 +0200115- A3720_DB_PM_WAKEUP_SRC
116
117 For Armada 3720 Develpment Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``,
118 TF-A will setup PM wake up src configuration. This option is disabled by default.
119
Paul Beesley97743022019-07-12 11:37:07 +0100120- MARVELL_SECURE_BOOT
121
122 Build trusted(=1)/non trusted(=0) image, default is non trusted.
123
124- BLE_PATH
125
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200126 Points to BLE (Binary ROM extension) sources folder.
127 Only required for A7K/8K/CN913x builds.
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100128 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``.
Paul Beesley97743022019-07-12 11:37:07 +0100129
130- MV_DDR_PATH
131
Pali Rohárcf44b122021-06-28 15:27:25 +0200132 This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets.
133
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200134 For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
Paul Beesley97743022019-07-12 11:37:07 +0100135 it is used for ddr_tool build.
136
137 Usage example: MV_DDR_PATH=path/to/mv_ddr
138
Paul Beesley97743022019-07-12 11:37:07 +0100139 For the mv_ddr source location, check the section "Tools and external components installation"
140
Pali Rohár88f225a2021-01-26 10:44:07 +0100141 If MV_DDR_PATH source code is a git snapshot then provide path to the full git
142 repository (including .git subdir) because mv_ddr build process calls git commands.
143
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200144- CP_NUM
145
146 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
147 the build uses the default number of CPs, which is a number of embedded CPs inside the
148 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
149 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
150 values with CP_NUM are in a range of 1 to 3.
151
Paul Beesley97743022019-07-12 11:37:07 +0100152- DDR_TOPOLOGY
153
154 For Armada37x0 only, the DDR topology map index/name, default is 0.
155
156 Supported Options:
Pali Rohár38686c22021-02-01 12:23:31 +0100157 - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
158 - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular)
159 - 2 - DDR3 2CS 1GB (EspressoBin V3-V5)
160 - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular)
161 - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
162 - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra)
163 - 6 - DDR4 2CS 2GB (EspressoBin V7)
164 - 7 - DDR3 2CS 2GB (EspressoBin V3-V5)
165 - CUST - CUSTOMER BOARD (Customer board settings)
Paul Beesley97743022019-07-12 11:37:07 +0100166
167- CLOCKSPRESET
168
169 For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
170 default is CPU_800_DDR_800.
171
Pali Rohár8dc46a02020-10-29 17:44:27 +0100172 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
173 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
174 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
175 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
Paul Beesley97743022019-07-12 11:37:07 +0100176
Pali Rohár35142872021-02-01 12:24:42 +0100177 Look at Armada37x0 chip package marking on board to identify correct CPU frequency.
178 The last line on package marking (next line after the 88F37x0 line) should contain:
179
180 - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800``
181 - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800``
182 - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750``
183
Paul Beesley97743022019-07-12 11:37:07 +0100184- BOOTDEV
185
186 For Armada37x0 only, the flash boot device, default is ``SPINOR``.
187
188 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
189
190 - SPINOR - SPI NOR flash boot
191 - SPINAND - SPI NAND flash boot
192 - EMMCNORM - eMMC Download Mode
193
194 Download boot loader or program code from eMMC flash into CM3 or CA53
195 Requires full initialization and command sequence
196
197 - SATA - SATA device boot
198
Pali Rohára0747422021-01-28 13:09:36 +0100199 Image needs to be stored at disk LBA 0 or at disk partition with
200 MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with
201 GPT name ``MARVELL BOOT PARTITION``.
202
Paul Beesley97743022019-07-12 11:37:07 +0100203- PARTNUM
204
205 For Armada37x0 only, the boot partition number, default is 0.
206
207 To boot from eMMC, the value should be aligned with the parameter in
208 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
209 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
210 build instructions.
211
212- WTMI_IMG
213
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100214 For Armada37x0 only, the path of the binary can point to an image which
Paul Beesley97743022019-07-12 11:37:07 +0100215 does nothing, an image which supports EFUSE or a customized CM3 firmware
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100216 binary. The default image is ``fuse.bin`` that built from sources in WTP
Paul Beesley97743022019-07-12 11:37:07 +0100217 folder, which is the next option. If the default image is OK, then this
218 option should be skipped.
219
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100220 Please note that this is not a full WTMI image, just a main loop without
221 hardware initialization code. Final WTMI image is built from this WTMI_IMG
222 binary and sys-init code from the WTP directory which sets DDR and CPU
223 clocks according to DDR_TOPOLOGY and CLOCKSPRESET options.
224
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200225 CZ.NIC as part of Turris project released free and open source WTMI
226 application firmware ``wtmi_app.bin`` for all Armada 3720 devices.
227 This firmware includes additional features like access to Hardware
228 Random Number Generator of Armada 3720 SoC which original Marvell's
229 ``fuse.bin`` image does not have.
230
231 CZ.NIC's Armada 3720 Secure Firmware is available at website:
232
233 https://gitlab.nic.cz/turris/mox-boot-builder/
234
Paul Beesley97743022019-07-12 11:37:07 +0100235- WTP
236
Pali Rohár8dc46a02020-10-29 17:44:27 +0100237 For Armada37x0 only, use this parameter to point to wtptools source code
238 directory, which can be found as a3700_utils.zip in the release. Usage
239 example: ``WTP=/path/to/a3700_utils``
Paul Beesley97743022019-07-12 11:37:07 +0100240
Pali Rohár88f225a2021-01-26 10:44:07 +0100241 If WTP source code is a git snapshot then provide path to the full git
242 repository (including .git subdir) because WTP build process calls git commands.
243
Pali Rohár8dc46a02020-10-29 17:44:27 +0100244- CRYPTOPP_PATH
Paul Beesley97743022019-07-12 11:37:07 +0100245
Pali Rohára304cf52021-01-26 10:44:07 +0100246 For Armada37x0 only, use this parameter to point to Crypto++ source code
247 directory. If this option is specified then Crypto++ source code in
248 CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library
249 is required for building WTP image tool. Either CRYPTOPP_PATH or
250 CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0.
251
252- CRYPTOPP_LIBDIR
253
254 For Armada37x0 only, use this parameter to point to the directory with
255 compiled Crypto++ library. By default it points to the CRYPTOPP_PATH.
256
257- CRYPTOPP_INCDIR
258
259 For Armada37x0 only, use this parameter to point to the directory with
260 header files of Crypto++ library. By default it points to the CRYPTOPP_PATH.
Paul Beesley97743022019-07-12 11:37:07 +0100261
Paul Beesley97743022019-07-12 11:37:07 +0100262
Pali Rohár8dc46a02020-10-29 17:44:27 +0100263For example, in order to build the image in debug mode with log level up to 'notice' level run
Paul Beesley97743022019-07-12 11:37:07 +0100264
Pali Rohár8dc46a02020-10-29 17:44:27 +0100265.. code:: shell
266
267 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash
Paul Beesley97743022019-07-12 11:37:07 +0100268
Pali Rohár8dc46a02020-10-29 17:44:27 +0100269And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
270the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
271the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
272line is as following
Paul Beesley97743022019-07-12 11:37:07 +0100273
Pali Rohár8dc46a02020-10-29 17:44:27 +0100274.. code:: shell
275
276 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
277 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
278 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
279 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
Pali Rohár9e737b62021-01-26 10:44:07 +0100280 all fip mrvl_bootimage mrvl_flash mrvl_uart
Pali Rohár8dc46a02020-10-29 17:44:27 +0100281
282To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command:
283
284.. code:: shell
285
Marek Behún19d85782021-01-05 14:01:05 +0100286 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \
287 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage
Pali Rohár8dc46a02020-10-29 17:44:27 +0100288
Pali Rohár0c0d2652021-02-01 12:32:36 +0100289Here is full example how to build production release of Marvell firmware image (concatenated
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200290binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
291EspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and
2921GB DDR4 RAM (DDR_TOPOLOGY=5):
Luka Kovaciceb498352021-01-14 14:25:15 +0100293
294.. code:: shell
295
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200296 > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
297 > git clone https://source.denx.de/u-boot/u-boot.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100298 > git clone https://github.com/weidai11/cryptopp.git
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200299 > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
300 > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
301 > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100302 > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200303 > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin
Pali Rohár0c0d2652021-02-01 12:32:36 +0100304 > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \
305 USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200306 MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \
307 CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \
308 WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash
Luka Kovaciceb498352021-01-14 14:25:15 +0100309
Pali Rohár0c0d2652021-02-01 12:32:36 +0100310Produced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin``
Paul Beesley97743022019-07-12 11:37:07 +0100311
312Special Build Flags
313--------------------
314
315- PLAT_RECOVERY_IMAGE_ENABLE
316 When set this option to enable secondary recovery function when build atf.
317 In order to build UART recovery image this operation should be disabled for
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200318 A7K/8K/CN913x because of hardware limitation (boot from secondary image
Paul Beesley97743022019-07-12 11:37:07 +0100319 can interrupt UART recovery process). This MACRO definition is set in
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100320 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
Paul Beesley97743022019-07-12 11:37:07 +0100321
Alex Leiboviched2fb472019-02-25 12:24:29 +0200322- DDR32
323 In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
324 this flag should be set to 1.
325
Paul Beesleyd2fcc4e2019-05-29 13:59:40 +0100326For more information about build options, please refer to the
327:ref:`Build Options` document.
Paul Beesley97743022019-07-12 11:37:07 +0100328
329
330Build output
331------------
Pali Rohár8dc46a02020-10-29 17:44:27 +0100332Marvell's TF-A compilation generates 8 files:
Paul Beesley97743022019-07-12 11:37:07 +0100333
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100334 - ble.bin - BLe image (not available for Armada37x0)
Paul Beesley97743022019-07-12 11:37:07 +0100335 - bl1.bin - BL1 image
336 - bl2.bin - BL2 image
337 - bl31.bin - BL31 image
338 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
339 - boot-image.bin - TF-A image (contains BL1 and FIP images)
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100340 - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it
341 contains TIM, WTMI and boot-image.bin images. For other platforms it contains
342 BLe and boot-image.bin images. Should be placed on the boot flash/device.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100343 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images
344 for booting via UART. Could be loaded via Marvell's WtpDownload tool from
345 A3700-utils-marvell repository.
Paul Beesley97743022019-07-12 11:37:07 +0100346
Pali Rohár9e737b62021-01-26 10:44:07 +0100347Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target
348``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart``
349produce ``uart-images.tgz.bin`` file.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100350
Paul Beesley97743022019-07-12 11:37:07 +0100351
352Tools and external components installation
353------------------------------------------
354
355Armada37x0 Builds require installation of 3 components
356~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
357
358(1) ARM cross compiler capable of building images for the service CPU (CM3).
359 This component is usually included in the Linux host packages.
360 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
361 using the following command
362
363 .. code:: shell
364
365 > sudo apt-get install gcc-arm-linux-gnueabi
366
367 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
368 overwritten using the environment variable ``CROSS_CM3``.
369 Example for BASH shell
370
371 .. code:: shell
372
373 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
374
375(2) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100376 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100377
378 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
379
Pali Rohár65c8d112020-10-07 11:01:00 +0200380(3) Armada3700 tools available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100381 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100382
383 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
384
Pali Rohár8dc46a02020-10-29 17:44:27 +0100385(4) Crypto++ library available at the following repository:
386
387 https://github.com/weidai11/cryptopp.git
388
Paul Beesley97743022019-07-12 11:37:07 +0100389Armada70x0 and Armada80x0 Builds require installation of an additional component
390~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
391
392(1) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100393 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100394
395 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git