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Paul Beesley97743022019-07-12 11:37:07 +01001TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10 .. code:: shell
11
12 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
13
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18 .. code:: shell
19
20 > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25 .. note::
26
27 *u-boot.bin* should be used and not *u-boot-spl.bin*
28
29Set MSS/SCP image path (mandatory only for Armada80x0)
30
31 .. code:: shell
32
33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40 .. code:: shell
41
42 > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46 .. code:: shell
47
48 > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
54- DEBUG
55
56 Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
57 Must be disabled when building UART recovery images due to current console driver
58 implementation that is not compatible with Xmodem protocol used for boot image download.
59
60- LOG_LEVEL
61
62 Defines the level of logging which will be purged to the default output port.
63
64 LOG_LEVEL_NONE 0
65 LOG_LEVEL_ERROR 10
66 LOG_LEVEL_NOTICE 20
67 LOG_LEVEL_WARNING 30
68 LOG_LEVEL_INFO 40
69 LOG_LEVEL_VERBOSE 50
70
71- USE_COHERENT_MEM
72
73 This flag determines whether to include the coherent memory region in the
74 BL memory map or not.
75
76- LLC_ENABLE
77
78 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
79
80- MARVELL_SECURE_BOOT
81
82 Build trusted(=1)/non trusted(=0) image, default is non trusted.
83
84- BLE_PATH
85
86 Points to BLE (Binary ROM extension) sources folder. Only required for A8K builds.
87 The parameter is optional, its default value is ``plat/marvell/a8k/common/ble``.
88
89- MV_DDR_PATH
90
91 For A7/8K, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
92 it is used for ddr_tool build.
93
94 Usage example: MV_DDR_PATH=path/to/mv_ddr
95
96 The parameter is optional for A7/8K, when this parameter is not set, the mv_ddr
97 sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter
98 is necessary for A37x0.
99
100 For the mv_ddr source location, check the section "Tools and external components installation"
101
102- DDR_TOPOLOGY
103
104 For Armada37x0 only, the DDR topology map index/name, default is 0.
105
106 Supported Options:
107 - DDR3 1CS (0): DB-88F3720-DDR3-Modular (512MB); EspressoBIN (512MB)
108 - DDR4 1CS (1): DB-88F3720-DDR4-Modular (512MB)
109 - DDR3 2CS (2): EspressoBIN V3-V5 (1GB)
110 - DDR4 2CS (3): DB-88F3720-DDR4-Modular (4GB)
111 - DDR3 1CS (4): DB-88F3720-DDR3-Modular (1GB)
112 - DDR4 1CS (5): EspressoBin V7 (1GB)
113 - DDR4 2CS (6): EspressoBin V7 (2GB)
114 - CUSTOMER (CUST): Customer board, DDR3 1CS 512MB
115
116- CLOCKSPRESET
117
118 For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
119 default is CPU_800_DDR_800.
120
121 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
122 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
123 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
124 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
125
126- BOOTDEV
127
128 For Armada37x0 only, the flash boot device, default is ``SPINOR``.
129
130 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
131
132 - SPINOR - SPI NOR flash boot
133 - SPINAND - SPI NAND flash boot
134 - EMMCNORM - eMMC Download Mode
135
136 Download boot loader or program code from eMMC flash into CM3 or CA53
137 Requires full initialization and command sequence
138
139 - SATA - SATA device boot
140
141- PARTNUM
142
143 For Armada37x0 only, the boot partition number, default is 0.
144
145 To boot from eMMC, the value should be aligned with the parameter in
146 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
147 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
148 build instructions.
149
150- WTMI_IMG
151
152 For Armada37x0 only, the path of the WTMI image can point to an image which
153 does nothing, an image which supports EFUSE or a customized CM3 firmware
154 binary. The default image is wtmi.bin that built from sources in WTP
155 folder, which is the next option. If the default image is OK, then this
156 option should be skipped.
157
158- WTP
159
160 For Armada37x0 only, use this parameter to point to wtptools source code
161 directory, which can be found as a3700_utils.zip in the release. Usage
162 example: ``WTP=/path/to/a3700_utils``
163
164 For example, in order to build the image in debug mode with log level up to 'notice' level run
165
166 .. code:: shell
167
168 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> all fip
169
170 And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
171 the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
172 the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
173 line is as following
174
175 .. code:: shell
176
177 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
178 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 all fip
179
180 Supported MARVELL_PLATFORM are:
181 - a3700 (for both A3720 DB and EspressoBin)
182 - a70x0
183 - a70x0_amc (for AMC board)
184 - a80x0
185 - a80x0_mcbin (for MacciatoBin)
186
187Special Build Flags
188--------------------
189
190- PLAT_RECOVERY_IMAGE_ENABLE
191 When set this option to enable secondary recovery function when build atf.
192 In order to build UART recovery image this operation should be disabled for
193 a70x0 and a80x0 because of hardware limitation (boot from secondary image
194 can interrupt UART recovery process). This MACRO definition is set in
195 ``plat/marvell/a8k/common/include/platform_def.h`` file.
196
Paul Beesleyd2fcc4e2019-05-29 13:59:40 +0100197For more information about build options, please refer to the
198:ref:`Build Options` document.
Paul Beesley97743022019-07-12 11:37:07 +0100199
200
201Build output
202------------
203Marvell's TF-A compilation generates 7 files:
204
205 - ble.bin - BLe image
206 - bl1.bin - BL1 image
207 - bl2.bin - BL2 image
208 - bl31.bin - BL31 image
209 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
210 - boot-image.bin - TF-A image (contains BL1 and FIP images)
211 - flash-image.bin - Image which contains boot-image.bin and SPL image.
212 Should be placed on the boot flash/device.
213
214
215Tools and external components installation
216------------------------------------------
217
218Armada37x0 Builds require installation of 3 components
219~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
220
221(1) ARM cross compiler capable of building images for the service CPU (CM3).
222 This component is usually included in the Linux host packages.
223 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
224 using the following command
225
226 .. code:: shell
227
228 > sudo apt-get install gcc-arm-linux-gnueabi
229
230 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
231 overwritten using the environment variable ``CROSS_CM3``.
232 Example for BASH shell
233
234 .. code:: shell
235
236 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
237
238(2) DDR initialization library sources (mv_ddr) available at the following repository
239 (use the "mv_ddr-armada-atf-mainline" branch):
240
241 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
242
243(3) Armada3700 tools available at the following repository (use the latest release branch):
244
245 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
246
247Armada70x0 and Armada80x0 Builds require installation of an additional component
248~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
249
250(1) DDR initialization library sources (mv_ddr) available at the following repository
251 (use the "mv_ddr-armada-atf-mainline" branch):
252
253 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git