drivers: marvell: add support for mapping the entire LLC to SRAM
Add llc_sram_enable() and llc_sram_disable() APIs to Marvell
cache_lls driver.
Add LLC_SRAM definition to Marvell common makefile - disabled
by the default.
Add description of LLC_SRAM flag to the build documentation.
Change-Id: Ib348e09752ce1206d29268ef96c9018b781db182
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
diff --git a/docs/plat/marvell/armada/build.rst b/docs/plat/marvell/armada/build.rst
index 6f28721..bec0bcb 100644
--- a/docs/plat/marvell/armada/build.rst
+++ b/docs/plat/marvell/armada/build.rst
@@ -77,6 +77,13 @@
Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
+- LLC_SRAM
+
+ Flag defining the LLC (L3) cache SRAM support. The feature is
+ disabled by default (``LLC_ENABLE=0``).
+ When LLC SRAM is enabled, the secure payload (BL32) is loaded into this
+ SRAM area instead of the DRAM.
+
- MARVELL_SECURE_BOOT
Build trusted(=1)/non trusted(=0) image, default is non trusted.