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Davidson Kd103f002023-07-03 11:54:45 +05301# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
Usama Ariff1513622021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kaye9272152021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Boyan Karatotev192ad5d2023-12-12 15:59:01 +00008TARGET_FLAVOUR := fvp
Boyan Karatotev95562762023-11-15 11:54:33 +00009# DPU with SCMI may not necessarily work, so allow its independence
10TC_DPU_USE_SCMI_CLK := 1
Kshitij Sisodia090a6aa2023-11-22 17:03:45 +000011# SCMI power domain control enable
12TC_SCMI_PD_CTRL_EN := 1
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000013
Boyan Karatotevbaff7992023-12-27 15:49:18 +000014# System setup
15CSS_USE_SCMI_SDS_DRIVER := 1
16HW_ASSISTED_COHERENCY := 1
17USE_COHERENT_MEM := 0
18GIC_ENABLE_V4_EXTN := 1
19GICV3_SUPPORT_GIC600 := 1
20override NEED_BL2U := no
21override ARM_PLAT_MT := 1
22
23# CPU setup
24ARM_ARCH_MINOR := 7
25BRANCH_PROTECTION := 1
26ENABLE_FEAT_MPAM := 1 # default is 2, optimise
27ENABLE_SVE_FOR_NS := 2 # to show we use it
28ENABLE_SVE_FOR_SWD := 1
Jackson Cooper-Driverf0c93de2024-01-08 09:53:04 +000029ENABLE_SME_FOR_NS := 2
30ENABLE_SME2_FOR_NS := 2
31ENABLE_SME_FOR_SWD := 1
Boyan Karatotevbaff7992023-12-27 15:49:18 +000032ENABLE_TRBE_FOR_NS := 1
33ENABLE_SYS_REG_TRACE_FOR_NS := 1
34ENABLE_FEAT_AMU := 1
35ENABLE_AMU_FCONF := 1
36ENABLE_AMU_AUXILIARY_COUNTERS := 1
37ENABLE_MPMM := 1
38ENABLE_MPMM_FCONF := 1
Jayanth Dodderi Chidanandeef9d3e2024-09-02 15:54:23 +010039ENABLE_FEAT_MTE2 := 2
Manish Pandey81d03432024-07-18 16:29:43 +010040ENABLE_SPE_FOR_NS := 3
Jayanth Dodderi Chidanandeef9d3e2024-09-02 15:54:23 +010041ENABLE_FEAT_TCR2 := 3
Boyan Karatotevbaff7992023-12-27 15:49:18 +000042
43CTX_INCLUDE_AARCH32_REGS := 0
44
45ifeq (${SPD},spmd)
46 SPMD_SPM_AT_SEL2 := 1
Boyan Karatotevbaff7992023-12-27 15:49:18 +000047 CTX_INCLUDE_PAUTH_REGS := 1
48endif
49
Sergio Alves4dd0e512023-12-06 15:24:44 +000050# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
51TC_RESOLUTION_OPTIONS := 640x480p60 \
52 1920x1080p60
53# Set default to the 640x480p60 resolution mode
54TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS))
55
56# Check resolution option for FVP
57ifneq ($(filter ${TARGET_FLAVOUR}, fvp),)
58ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),)
59 $(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS})
60endif
61endif
Boyan Karatotevbaff7992023-12-27 15:49:18 +000062
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +000063ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
Manish V Badarkhee46ee7e2024-10-31 16:04:30 +000064 $(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.)
65endif
66
67ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0)
Manish V Badarkhec7570d12023-11-20 18:25:49 +000068 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
69 Some of the features might not work as expected)
70endif
71
Jackson Cooper-Driver3653ded2023-12-14 14:32:40 +000072ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0)
73 $(error TARGET_PLATFORM must be less than or equal to 4)
Usama Ariff1513622021-04-09 17:07:41 +010074endif
75
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000076ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
77 $(error TARGET_FLAVOUR must be fvp or fpga)
78endif
79
80$(eval $(call add_defines, \
81 TARGET_PLATFORM \
82 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
Sergio Alves4dd0e512023-12-06 15:24:44 +000083 TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
Boyan Karatotev95562762023-11-15 11:54:33 +000084 TC_DPU_USE_SCMI_CLK \
Kshitij Sisodia090a6aa2023-11-22 17:03:45 +000085 TC_SCMI_PD_CTRL_EN \
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000086))
Olivier Deprez7e5597c2022-07-20 17:37:23 +020087
Usama Ariff1513622021-04-09 17:07:41 +010088CSS_LOAD_SCP_IMAGES := 1
89
Arvind Ram Prakashb4419202024-05-07 10:33:46 -050090# Save DSU PMU registers on cluster off and restore them on cluster on
91PRESERVE_DSU_PMU_REGS := 1
92
Jackson Cooper-Drivere1ce8452024-03-11 09:23:17 +000093# Specify MHU type based on platform
94ifneq ($(filter ${TARGET_PLATFORM}, 2),)
95 PLAT_MHU_VERSION := 2
96else
97 PLAT_MHU_VERSION := 3
98endif
99
Usama Ariff1513622021-04-09 17:07:41 +0100100# Include GICv3 driver files
101include drivers/arm/gic/v3/gicv3.mk
102
103ENT_GIC_SOURCES := ${GICV3_SOURCES} \
104 plat/common/plat_gicv3.c \
105 plat/arm/common/arm_gicv3.c
106
Usama Ariff1513622021-04-09 17:07:41 +0100107TC_BASE = plat/arm/board/tc
108
Boyan Karatotev8dec1f52023-12-20 16:28:23 +0000109PLAT_INCLUDES += -I${TC_BASE}/include/ \
110 -I${TC_BASE}/fdts/
Usama Ariff1513622021-04-09 17:07:41 +0100111
Usama Ariff1513622021-04-09 17:07:41 +0100112# CPU libraries for TARGET_PLATFORM=1
113ifeq (${TARGET_PLATFORM}, 1)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +0100114TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singh7e465552022-08-23 11:55:27 +0100115 lib/cpus/aarch64/cortex_a715.S \
116 lib/cpus/aarch64/cortex_x3.S
Usama Ariff1513622021-04-09 17:07:41 +0100117endif
118
Rupinderjit Singh820b3b62022-04-04 17:28:41 +0100119# CPU libraries for TARGET_PLATFORM=2
120ifeq (${TARGET_PLATFORM}, 2)
Manish Pandeyda8231b2024-08-12 15:40:22 +0100121ERRATA_A520_2938996 := 1
122ERRATA_X4_2726228 := 1
123
Govindraj Rajaca3caf02023-06-28 08:49:21 -0500124TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
Govindraj Raja37012fb2023-06-23 11:28:05 -0500125 lib/cpus/aarch64/cortex_a720.S \
Govindraj Raja0a120912023-06-23 11:09:31 -0500126 lib/cpus/aarch64/cortex_x4.S
Rupinderjit Singh820b3b62022-04-04 17:28:41 +0100127endif
128
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +0000129# CPU libraries for TARGET_PLATFORM=3
130ifeq (${TARGET_PLATFORM}, 3)
Manish Pandeyda8231b2024-08-12 15:40:22 +0100131ERRATA_A520_2938996 := 1
132
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +0000133TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
Govindraj Raja106437d2024-05-17 13:35:19 -0500134 lib/cpus/aarch64/cortex_a725.S \
Govindraj Raja82760142024-05-17 13:39:07 -0500135 lib/cpus/aarch64/cortex_x925.S
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +0000136endif
137
Jackson Cooper-Driver3653ded2023-12-14 14:32:40 +0000138# CPU libraries for TARGET_PLATFORM=4
139ifeq (${TARGET_PLATFORM}, 4)
140TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \
141 lib/cpus/aarch64/nevis.S \
142 lib/cpus/aarch64/travis.S
143endif
144
Jagdish Gediya16a0f1c2024-02-02 06:01:44 +0000145INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \
146 plat/arm/common/arm_ni.c
Usama Ariff1513622021-04-09 17:07:41 +0100147
148PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
149 ${TC_BASE}/include/tc_helpers.S
150
151BL1_SOURCES += ${INTERCONNECT_SOURCES} \
152 ${TC_CPU_SOURCES} \
153 ${TC_BASE}/tc_trusted_boot.c \
Jackson Cooper-Driverbd4b08f2024-06-10 14:54:06 +0100154 ${TC_BASE}/tc_bl1_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +0100155 ${TC_BASE}/tc_err.c \
156 drivers/arm/sbsa/sbsa.c
157
Usama Ariff1513622021-04-09 17:07:41 +0100158BL2_SOURCES += ${TC_BASE}/tc_security.c \
159 ${TC_BASE}/tc_err.c \
160 ${TC_BASE}/tc_trusted_boot.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100161 ${TC_BASE}/tc_bl2_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +0100162 lib/utils/mem_region.c \
163 drivers/arm/tzc/tzc400.c \
Usama Ariff1513622021-04-09 17:07:41 +0100164 plat/arm/common/arm_nor_psci_mem_protect.c
165
Tintu Thomasecdc3162024-07-02 16:57:05 +0100166ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0)
167BL2_SOURCES += plat/arm/common/arm_tzc400.c
168endif
169
Usama Ariff1513622021-04-09 17:07:41 +0100170BL31_SOURCES += ${INTERCONNECT_SOURCES} \
171 ${TC_CPU_SOURCES} \
172 ${ENT_GIC_SOURCES} \
173 ${TC_BASE}/tc_bl31_setup.c \
174 ${TC_BASE}/tc_topology.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100175 lib/fconf/fconf.c \
176 lib/fconf/fconf_dyn_cfg_getter.c \
Arvind Ram Prakashb4419202024-05-07 10:33:46 -0500177 drivers/arm/css/dsu/dsu.c \
Usama Ariff1513622021-04-09 17:07:41 +0100178 drivers/cfi/v2m/v2m_flash.c \
179 lib/utils/mem_region.c \
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500180 plat/arm/common/arm_nor_psci_mem_protect.c \
181 drivers/arm/sbsa/sbsa.c
Usama Ariff1513622021-04-09 17:07:41 +0100182
Chris Kaye9272152021-09-28 15:52:14 +0100183BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
184
Usama Ariff1513622021-04-09 17:07:41 +0100185# Add the FDT_SOURCES and options for Dynamic Config
186FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
Tamas Banf879bf12023-06-12 11:26:28 +0200187 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \
188 ${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts
Usama Ariff1513622021-04-09 17:07:41 +0100189FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
190TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Tamas Banf879bf12023-06-12 11:26:28 +0200191FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Usama Ariff1513622021-04-09 17:07:41 +0100192
193# Add the FW_CONFIG to FIP and specify the same to certtool
194$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
195# Add the TB_FW_CONFIG to FIP and specify the same to certtool
196$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
Tamas Banf879bf12023-06-12 11:26:28 +0200197# Add the NT_FW_CONFIG to FIP and specify the same to certtool
198$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Usama Ariff1513622021-04-09 17:07:41 +0100199
200ifeq (${SPD},spmd)
201ifeq ($(ARM_SPMC_MANIFEST_DTS),)
Boyan Karatotev8dec1f52023-12-20 16:28:23 +0000202ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
Usama Ariff1513622021-04-09 17:07:41 +0100203endif
204
205FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
206TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
207
208# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
209$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
210endif
211
212#Device tree
Leo Yanb4d71342024-04-14 08:27:39 +0100213TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts
Usama Ariff1513622021-04-09 17:07:41 +0100214TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
215FDT_SOURCES += ${TC_HW_CONFIG_DTS}
216$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
217
218# Add the HW_CONFIG to FIP and specify the same to certtool
219$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
220
Tamas Banede4f052022-09-16 16:26:15 +0200221# Include Measured Boot makefile before any Crypto library makefile.
222# Crypto library makefile may need default definitions of Measured Boot build
223# flags present in Measured Boot makefile.
Tamas Bandc15bf42024-02-22 11:35:28 +0100224$(info Including rse_comms.mk)
Tamas Banede4f052022-09-16 16:26:15 +0200225ifeq (${MEASURED_BOOT},1)
Tamas Bandc15bf42024-02-22 11:35:28 +0100226 $(info Including rse_comms.mk)
227 include drivers/arm/rse/rse_comms.mk
Tamas Banede4f052022-09-16 16:26:15 +0200228
Tamas Bandc15bf42024-02-22 11:35:28 +0100229 BL1_SOURCES += ${RSE_COMMS_SOURCES}
230 BL2_SOURCES += ${RSE_COMMS_SOURCES}
Tamas Bana4260892023-06-07 13:35:04 +0200231 PLAT_INCLUDES += -Iinclude/lib/psa
232
233 ifeq (${DICE_PROTECTION_ENVIRONMENT},1)
234 $(info Including qcbor.mk)
Tamas Bandc15bf42024-02-22 11:35:28 +0100235 include drivers/measured_boot/rse/qcbor.mk
Tamas Bana4260892023-06-07 13:35:04 +0200236 $(info Including dice_prot_env.mk)
Tamas Bandc15bf42024-02-22 11:35:28 +0100237 include drivers/measured_boot/rse/dice_prot_env.mk
Tamas Bana4260892023-06-07 13:35:04 +0200238
239 BL1_SOURCES += ${QCBOR_SOURCES} \
240 ${DPE_SOURCES} \
241 plat/arm/board/tc/tc_common_dpe.c \
242 plat/arm/board/tc/tc_bl1_dpe.c \
Tamas Banae33fa92023-06-07 14:18:46 +0200243 lib/psa/dice_protection_environment.c \
244 drivers/arm/css/sds/sds.c \
245 drivers/delay_timer/delay_timer.c \
246 drivers/delay_timer/generic_delay_timer.c
Tamas Bana4260892023-06-07 13:35:04 +0200247
248 BL2_SOURCES += ${QCBOR_SOURCES} \
249 ${DPE_SOURCES} \
250 plat/arm/board/tc/tc_common_dpe.c \
251 plat/arm/board/tc/tc_bl2_dpe.c \
252 lib/psa/dice_protection_environment.c
253
254 PLAT_INCLUDES += -I${QCBOR_INCLUDES} \
255 -Iinclude/lib/dice
256 else
Tamas Bandc15bf42024-02-22 11:35:28 +0100257 $(info Including rse_measured_boot.mk)
258 include drivers/measured_boot/rse/rse_measured_boot.mk
Tamas Bana4260892023-06-07 13:35:04 +0200259
260 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Banede4f052022-09-16 16:26:15 +0200261 plat/arm/board/tc/tc_common_measured_boot.c \
262 plat/arm/board/tc/tc_bl1_measured_boot.c \
Tamas Bana4260892023-06-07 13:35:04 +0200263 lib/psa/measured_boot.c
Tamas Banede4f052022-09-16 16:26:15 +0200264
Tamas Bana4260892023-06-07 13:35:04 +0200265 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
Tamas Banede4f052022-09-16 16:26:15 +0200266 plat/arm/board/tc/tc_common_measured_boot.c \
267 plat/arm/board/tc/tc_bl2_measured_boot.c \
Tamas Bana4260892023-06-07 13:35:04 +0200268 lib/psa/measured_boot.c
269 endif
Tamas Banede4f052022-09-16 16:26:15 +0200270endif
271
David Vincze2cbc56b2024-01-04 18:37:12 +0100272ifeq (${TRNG_SUPPORT},1)
273 BL31_SOURCES += plat/arm/board/tc/tc_trng.c
274endif
275
laurenw-arm4c4181c2023-05-04 14:55:37 -0500276ifneq (${PLATFORM_TEST},)
laurenw-arm15aac382023-07-17 12:32:46 -0500277 # Add this include as first, before arm_common.mk. This is necessary
278 # because arm_common.mk builds Mbed TLS, and platform_test.mk can
279 # change the list of Mbed TLS files that are to be compiled
280 # (LIBMBEDTLS_SRCS).
281 include plat/arm/board/tc/platform_test.mk
laurenw-arm2ce1e352023-02-07 13:40:05 -0600282endif
283
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +0200284
Usama Ariff1513622021-04-09 17:07:41 +0100285include plat/arm/common/arm_common.mk
286include plat/arm/css/common/css_common.mk
Usama Ariff1513622021-04-09 17:07:41 +0100287include plat/arm/board/common/board_common.mk