blob: d0629fd512dcb1d1b71e0ca29db6a5593f829a58 [file] [log] [blame]
Usama Ariff1513622021-04-09 17:07:41 +01001# Copyright (c) 2021, Arm Limited. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
6ifeq ($(filter ${TARGET_PLATFORM}, 0 1),)
7 $(error TARGET_PLATFORM must be 0 or 1)
8endif
9
10CSS_LOAD_SCP_IMAGES := 1
11
12CSS_USE_SCMI_SDS_DRIVER := 1
13
14RAS_EXTENSION := 0
15
16SDEI_SUPPORT := 0
17
18EL3_EXCEPTION_HANDLING := 0
19
20HANDLE_EA_EL3_FIRST := 0
21
22# System coherency is managed in hardware
23HW_ASSISTED_COHERENCY := 1
24
25# When building for systems with hardware-assisted coherency, there's no need to
26# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
27USE_COHERENT_MEM := 0
28
29GIC_ENABLE_V4_EXTN := 1
30
31# GIC-600 configuration
32GICV3_SUPPORT_GIC600 := 1
33
34
35# Include GICv3 driver files
36include drivers/arm/gic/v3/gicv3.mk
37
38ENT_GIC_SOURCES := ${GICV3_SOURCES} \
39 plat/common/plat_gicv3.c \
40 plat/arm/common/arm_gicv3.c
41
42override NEED_BL2U := no
43
44override ARM_PLAT_MT := 1
45
46TC_BASE = plat/arm/board/tc
47
48PLAT_INCLUDES += -I${TC_BASE}/include/
49
50# Common CPU libraries
51TC_CPU_SOURCES := lib/cpus/aarch64/cortex_a510.S
52
53# CPU libraries for TARGET_PLATFORM=0
54ifeq (${TARGET_PLATFORM}, 0)
55TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a710.S \
56 lib/cpus/aarch64/cortex_x2.S
57endif
58
59# CPU libraries for TARGET_PLATFORM=1
60ifeq (${TARGET_PLATFORM}, 1)
61TC_CPU_SOURCES += lib/cpus/aarch64/cortex_makalu.S \
62 lib/cpus/aarch64/cortex_makalu_elp_arm.S
63endif
64
65INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
66
67PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
68 ${TC_BASE}/include/tc_helpers.S
69
70BL1_SOURCES += ${INTERCONNECT_SOURCES} \
71 ${TC_CPU_SOURCES} \
72 ${TC_BASE}/tc_trusted_boot.c \
73 ${TC_BASE}/tc_err.c \
74 drivers/arm/sbsa/sbsa.c
75
76
77BL2_SOURCES += ${TC_BASE}/tc_security.c \
78 ${TC_BASE}/tc_err.c \
79 ${TC_BASE}/tc_trusted_boot.c \
Usama Arifa49bd492021-08-17 17:57:10 +010080 ${TC_BASE}/tc_bl2_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +010081 lib/utils/mem_region.c \
82 drivers/arm/tzc/tzc400.c \
83 plat/arm/common/arm_tzc400.c \
84 plat/arm/common/arm_nor_psci_mem_protect.c
85
86BL31_SOURCES += ${INTERCONNECT_SOURCES} \
87 ${TC_CPU_SOURCES} \
88 ${ENT_GIC_SOURCES} \
89 ${TC_BASE}/tc_bl31_setup.c \
90 ${TC_BASE}/tc_topology.c \
Usama Arifa49bd492021-08-17 17:57:10 +010091 common/fdt_wrappers.c \
92 lib/fconf/fconf.c \
93 lib/fconf/fconf_dyn_cfg_getter.c \
Usama Ariff1513622021-04-09 17:07:41 +010094 drivers/cfi/v2m/v2m_flash.c \
95 lib/utils/mem_region.c \
96 plat/arm/common/arm_nor_psci_mem_protect.c
97
98# Add the FDT_SOURCES and options for Dynamic Config
99FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
100 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
101FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
102TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
103
104# Add the FW_CONFIG to FIP and specify the same to certtool
105$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
106# Add the TB_FW_CONFIG to FIP and specify the same to certtool
107$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
108
109ifeq (${SPD},spmd)
110ifeq ($(ARM_SPMC_MANIFEST_DTS),)
111ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts
112endif
113
114FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
115TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
116
117# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
118$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
119endif
120
121#Device tree
122TC_HW_CONFIG_DTS := fdts/tc.dts
123TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
124FDT_SOURCES += ${TC_HW_CONFIG_DTS}
125$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
126
127# Add the HW_CONFIG to FIP and specify the same to certtool
128$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
129
130override CTX_INCLUDE_AARCH32_REGS := 0
131
132override CTX_INCLUDE_PAUTH_REGS := 1
133
134override ENABLE_SPE_FOR_LOWER_ELS := 0
135
136override ENABLE_AMU := 1
137
138include plat/arm/common/arm_common.mk
139include plat/arm/css/common/css_common.mk
140include plat/arm/soc/common/soc_css.mk
141include plat/arm/board/common/board_common.mk