blob: dd8785980334887ba48fb7f6e5b759a55b98d2f5 [file] [log] [blame]
Davidson Kd103f002023-07-03 11:54:45 +05301# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
Usama Ariff1513622021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kaye9272152021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Boyan Karatotev192ad5d2023-12-12 15:59:01 +00008TARGET_FLAVOUR := fvp
Boyan Karatotev95562762023-11-15 11:54:33 +00009# DPU with SCMI may not necessarily work, so allow its independence
10TC_DPU_USE_SCMI_CLK := 1
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000011
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +000012ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
Manish V Badarkhec7570d12023-11-20 18:25:49 +000013 $(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
14 Some of the features might not work as expected)
15endif
16
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +000017ifeq ($(shell expr $(TARGET_PLATFORM) \<= 3), 0)
18 $(error TARGET_PLATFORM must be less than or equal to 3)
Usama Ariff1513622021-04-09 17:07:41 +010019endif
20
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000021ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
22 $(error TARGET_FLAVOUR must be fvp or fpga)
23endif
24
25$(eval $(call add_defines, \
26 TARGET_PLATFORM \
27 TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
Boyan Karatotev95562762023-11-15 11:54:33 +000028 TC_DPU_USE_SCMI_CLK \
Boyan Karatotev192ad5d2023-12-12 15:59:01 +000029))
Olivier Deprez7e5597c2022-07-20 17:37:23 +020030
Usama Ariff1513622021-04-09 17:07:41 +010031CSS_LOAD_SCP_IMAGES := 1
32
33CSS_USE_SCMI_SDS_DRIVER := 1
34
Manish Pandeyd419e222023-02-13 12:39:17 +000035ENABLE_FEAT_RAS := 1
36
Usama Ariff1513622021-04-09 17:07:41 +010037SDEI_SUPPORT := 0
38
39EL3_EXCEPTION_HANDLING := 0
40
Manish Pandey0e3379d2022-10-10 11:43:08 +010041HANDLE_EA_EL3_FIRST_NS := 0
Usama Ariff1513622021-04-09 17:07:41 +010042
43# System coherency is managed in hardware
44HW_ASSISTED_COHERENCY := 1
45
46# When building for systems with hardware-assisted coherency, there's no need to
47# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
48USE_COHERENT_MEM := 0
49
50GIC_ENABLE_V4_EXTN := 1
51
52# GIC-600 configuration
53GICV3_SUPPORT_GIC600 := 1
54
Usama Arif1925c782021-08-20 20:53:34 +010055# Enable SVE
Jayanth Dodderi Chidanand4e169e72023-03-31 10:39:22 +010056ENABLE_SVE_FOR_NS := 2
Usama Arif1925c782021-08-20 20:53:34 +010057ENABLE_SVE_FOR_SWD := 1
Usama Ariff1513622021-04-09 17:07:41 +010058
Davidson K65361052021-10-13 18:49:41 +053059# enable trace buffer control registers access to NS by default
60ENABLE_TRBE_FOR_NS := 1
61
62# enable trace system registers access to NS by default
63ENABLE_SYS_REG_TRACE_FOR_NS := 1
64
65# enable trace filter control registers access to NS by default
66ENABLE_TRF_FOR_NS := 1
67
Usama Ariff1513622021-04-09 17:07:41 +010068# Include GICv3 driver files
69include drivers/arm/gic/v3/gicv3.mk
70
71ENT_GIC_SOURCES := ${GICV3_SOURCES} \
72 plat/common/plat_gicv3.c \
73 plat/arm/common/arm_gicv3.c
74
75override NEED_BL2U := no
76
77override ARM_PLAT_MT := 1
78
79TC_BASE = plat/arm/board/tc
80
Boyan Karatotev8dec1f52023-12-20 16:28:23 +000081PLAT_INCLUDES += -I${TC_BASE}/include/ \
82 -I${TC_BASE}/fdts/
Usama Ariff1513622021-04-09 17:07:41 +010083
Usama Ariff1513622021-04-09 17:07:41 +010084# CPU libraries for TARGET_PLATFORM=1
85ifeq (${TARGET_PLATFORM}, 1)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010086TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singh7e465552022-08-23 11:55:27 +010087 lib/cpus/aarch64/cortex_a715.S \
88 lib/cpus/aarch64/cortex_x3.S
Usama Ariff1513622021-04-09 17:07:41 +010089endif
90
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010091# CPU libraries for TARGET_PLATFORM=2
92ifeq (${TARGET_PLATFORM}, 2)
Govindraj Rajaca3caf02023-06-28 08:49:21 -050093TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
Govindraj Raja37012fb2023-06-23 11:28:05 -050094 lib/cpus/aarch64/cortex_a720.S \
Govindraj Raja0a120912023-06-23 11:09:31 -050095 lib/cpus/aarch64/cortex_x4.S
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010096endif
97
Boyan Karatotev6ed3bf62023-07-07 13:33:19 +000098# CPU libraries for TARGET_PLATFORM=3
99ifeq (${TARGET_PLATFORM}, 3)
100TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
101 lib/cpus/aarch64/cortex_chaberton.S \
102 lib/cpus/aarch64/cortex_blackhawk.S
103endif
104
Usama Ariff1513622021-04-09 17:07:41 +0100105INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
106
107PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
108 ${TC_BASE}/include/tc_helpers.S
109
110BL1_SOURCES += ${INTERCONNECT_SOURCES} \
111 ${TC_CPU_SOURCES} \
112 ${TC_BASE}/tc_trusted_boot.c \
113 ${TC_BASE}/tc_err.c \
114 drivers/arm/sbsa/sbsa.c
115
Usama Ariff1513622021-04-09 17:07:41 +0100116BL2_SOURCES += ${TC_BASE}/tc_security.c \
117 ${TC_BASE}/tc_err.c \
118 ${TC_BASE}/tc_trusted_boot.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100119 ${TC_BASE}/tc_bl2_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +0100120 lib/utils/mem_region.c \
121 drivers/arm/tzc/tzc400.c \
122 plat/arm/common/arm_tzc400.c \
123 plat/arm/common/arm_nor_psci_mem_protect.c
124
125BL31_SOURCES += ${INTERCONNECT_SOURCES} \
126 ${TC_CPU_SOURCES} \
127 ${ENT_GIC_SOURCES} \
128 ${TC_BASE}/tc_bl31_setup.c \
129 ${TC_BASE}/tc_topology.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100130 lib/fconf/fconf.c \
131 lib/fconf/fconf_dyn_cfg_getter.c \
Usama Ariff1513622021-04-09 17:07:41 +0100132 drivers/cfi/v2m/v2m_flash.c \
133 lib/utils/mem_region.c \
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500134 plat/arm/common/arm_nor_psci_mem_protect.c \
135 drivers/arm/sbsa/sbsa.c
Usama Ariff1513622021-04-09 17:07:41 +0100136
Chris Kaye9272152021-09-28 15:52:14 +0100137BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
138
Usama Ariff1513622021-04-09 17:07:41 +0100139# Add the FDT_SOURCES and options for Dynamic Config
140FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
141 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
142FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
143TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
144
145# Add the FW_CONFIG to FIP and specify the same to certtool
146$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
147# Add the TB_FW_CONFIG to FIP and specify the same to certtool
148$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
149
150ifeq (${SPD},spmd)
151ifeq ($(ARM_SPMC_MANIFEST_DTS),)
Boyan Karatotev8dec1f52023-12-20 16:28:23 +0000152ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
Usama Ariff1513622021-04-09 17:07:41 +0100153endif
154
155FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
156TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
157
158# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
159$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
160endif
161
162#Device tree
163TC_HW_CONFIG_DTS := fdts/tc.dts
164TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
165FDT_SOURCES += ${TC_HW_CONFIG_DTS}
166$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
167
168# Add the HW_CONFIG to FIP and specify the same to certtool
169$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
170
171override CTX_INCLUDE_AARCH32_REGS := 0
172
173override CTX_INCLUDE_PAUTH_REGS := 1
174
Andre Przywara30661a92023-02-03 15:30:14 +0000175override ENABLE_SPE_FOR_NS := 0
Usama Ariff1513622021-04-09 17:07:41 +0100176
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000177override ENABLE_FEAT_AMU := 1
Davidson Kd103f002023-07-03 11:54:45 +0530178ENABLE_AMU_AUXILIARY_COUNTERS := 1
179ENABLE_AMU_FCONF := 1
Chris Kayc2d29ba2021-05-18 18:49:51 +0100180
Davidson Kd103f002023-07-03 11:54:45 +0530181ENABLE_MPMM := 1
182ENABLE_MPMM_FCONF := 1
Usama Ariff1513622021-04-09 17:07:41 +0100183
Tamas Banede4f052022-09-16 16:26:15 +0200184# Include Measured Boot makefile before any Crypto library makefile.
185# Crypto library makefile may need default definitions of Measured Boot build
186# flags present in Measured Boot makefile.
187ifeq (${MEASURED_BOOT},1)
188 MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
189 $(info Including ${MEASURED_BOOT_MK})
190 include ${MEASURED_BOOT_MK}
191 $(info Including rss_comms.mk)
192 include drivers/arm/rss/rss_comms.mk
193
194 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
195 plat/arm/board/tc/tc_common_measured_boot.c \
196 plat/arm/board/tc/tc_bl1_measured_boot.c \
197 lib/psa/measured_boot.c \
198 ${RSS_COMMS_SOURCES}
199
200 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
201 plat/arm/board/tc/tc_common_measured_boot.c \
202 plat/arm/board/tc/tc_bl2_measured_boot.c \
203 lib/psa/measured_boot.c \
204 ${RSS_COMMS_SOURCES}
205
206PLAT_INCLUDES += -Iinclude/lib/psa
207
208endif
209
laurenw-arm4c4181c2023-05-04 14:55:37 -0500210ifneq (${PLATFORM_TEST},)
laurenw-arm15aac382023-07-17 12:32:46 -0500211 # Add this include as first, before arm_common.mk. This is necessary
212 # because arm_common.mk builds Mbed TLS, and platform_test.mk can
213 # change the list of Mbed TLS files that are to be compiled
214 # (LIBMBEDTLS_SRCS).
215 include plat/arm/board/tc/platform_test.mk
laurenw-arm2ce1e352023-02-07 13:40:05 -0600216endif
217
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +0200218
Usama Ariff1513622021-04-09 17:07:41 +0100219include plat/arm/common/arm_common.mk
220include plat/arm/css/common/css_common.mk
221include plat/arm/soc/common/soc_css.mk
222include plat/arm/board/common/board_common.mk