blob: 21968d9bf755db8285691f743293ee6b71acb6d0 [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000034#include <runtime_svc.h>
35#include <debug.h>
Dan Handley714a0d22014-04-09 13:13:04 +010036#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38/*******************************************************************************
39 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
40 ******************************************************************************/
41int psci_cpu_on(unsigned long target_cpu,
42 unsigned long entrypoint,
43 unsigned long context_id)
44
45{
46 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000047 unsigned int start_afflvl, end_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +010048
49 /* Determine if the cpu exists of not */
50 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
51 if (rc != PSCI_E_SUCCESS) {
52 goto exit;
53 }
54
Achin Gupta0959db52013-12-02 17:33:04 +000055 /*
56 * To turn this cpu on, specify which affinity
57 * levels need to be turned on
58 */
59 start_afflvl = MPIDR_AFFLVL0;
60 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010061 rc = psci_afflvl_on(target_cpu,
62 entrypoint,
63 context_id,
64 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000065 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010066
67exit:
68 return rc;
69}
70
71unsigned int psci_version(void)
72{
73 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
74}
75
76int psci_cpu_suspend(unsigned int power_state,
77 unsigned long entrypoint,
78 unsigned long context_id)
79{
80 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000081 unsigned int target_afflvl, pstate_type;
Achin Gupta4f6ad662013-10-25 09:08:21 +010082
Vikram Kanigirif100f412014-04-01 19:26:26 +010083 /* Check SBZ bits in power state are zero */
84 if (psci_validate_power_state(power_state))
85 return PSCI_E_INVALID_PARAMS;
86
Achin Gupta4f6ad662013-10-25 09:08:21 +010087 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000088 target_afflvl = psci_get_pstate_afflvl(power_state);
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000089 if (target_afflvl > MPIDR_MAX_AFFLVL)
90 return PSCI_E_INVALID_PARAMS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010091
Achin Gupta42c52802014-05-09 19:32:25 +010092 /* Determine the 'state type' in the 'power_state' parameter */
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000093 pstate_type = psci_get_pstate_type(power_state);
Achin Gupta42c52802014-05-09 19:32:25 +010094
95 /*
96 * Ensure that we have a platform specific handler for entering
97 * a standby state.
98 */
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000099 if (pstate_type == PSTATE_TYPE_STANDBY) {
Achin Gupta42c52802014-05-09 19:32:25 +0100100 if (!psci_plat_pm_ops->affinst_standby)
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +0000101 return PSCI_E_INVALID_PARAMS;
Achin Gupta42c52802014-05-09 19:32:25 +0100102
103 rc = psci_plat_pm_ops->affinst_standby(power_state);
104 assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
105 return rc;
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +0000106 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100107
Achin Gupta42c52802014-05-09 19:32:25 +0100108 /*
109 * Do what is needed to enter the power down state. Upon success,
110 * enter the final wfi which will power down this cpu else return
111 * an error.
112 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100113 rc = psci_afflvl_suspend(entrypoint,
Achin Gupta42c52802014-05-09 19:32:25 +0100114 context_id,
115 power_state,
116 MPIDR_AFFLVL0,
117 target_afflvl);
118 if (rc == PSCI_E_SUCCESS)
119 psci_power_down_wfi();
120 assert(rc == PSCI_E_INVALID_PARAMS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100121 return rc;
122}
123
124int psci_cpu_off(void)
125{
126 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100127 int target_afflvl = get_max_afflvl();
128
Achin Gupta4f6ad662013-10-25 09:08:21 +0100129 /*
130 * Traverse from the highest to the lowest affinity level. When the
131 * lowest affinity level is hit, all the locks are acquired. State
132 * management is done immediately followed by cpu, cluster ...
133 * ..target_afflvl specific actions as this function unwinds back.
134 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100135 rc = psci_afflvl_off(MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100136
Achin Gupta3140a9e2013-12-02 16:23:12 +0000137 /*
Achin Gupta42c52802014-05-09 19:32:25 +0100138 * Check if all actions needed to safely power down this cpu have
139 * successfully completed. Enter a wfi loop which will allow the
140 * power controller to physically power down this cpu.
141 */
142 if (rc == PSCI_E_SUCCESS)
143 psci_power_down_wfi();
144
145 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000146 * The only error cpu_off can return is E_DENIED. So check if that's
147 * indeed the case.
148 */
Achin Gupta42c52802014-05-09 19:32:25 +0100149 assert (rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100150
151 return rc;
152}
153
154int psci_affinity_info(unsigned long target_affinity,
155 unsigned int lowest_affinity_level)
156{
157 int rc = PSCI_E_INVALID_PARAMS;
158 unsigned int aff_state;
Dan Handleye2712bc2014-04-10 15:37:22 +0100159 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160
Achin Gupta75f73672013-12-05 16:33:10 +0000161 if (lowest_affinity_level > get_max_afflvl())
162 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100163
164 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
165 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000166
167 /*
168 * TODO: For affinity levels higher than 0 i.e. cpu, the
169 * state will always be either ON or OFF. Need to investigate
170 * how critical is it to support ON_PENDING here.
171 */
172 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100173
174 /* A suspended cpu is available & on for the OS */
175 if (aff_state == PSCI_STATE_SUSPEND) {
176 aff_state = PSCI_STATE_ON;
177 }
178
179 rc = aff_state;
180 }
Achin Gupta75f73672013-12-05 16:33:10 +0000181
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182 return rc;
183}
184
185/* Unimplemented */
186int psci_migrate(unsigned int target_cpu)
187{
188 return PSCI_E_NOT_SUPPORTED;
189}
190
191/* Unimplemented */
192unsigned int psci_migrate_info_type(void)
193{
Achin Gupta607084e2014-02-09 18:24:19 +0000194 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100195}
196
197unsigned long psci_migrate_info_up_cpu(void)
198{
199 /*
200 * Return value of this currently unsupported call depends upon
201 * what psci_migrate_info_type() returns.
202 */
203 return PSCI_E_SUCCESS;
204}
205
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000206/*******************************************************************************
207 * PSCI top level handler for servicing SMCs.
208 ******************************************************************************/
209uint64_t psci_smc_handler(uint32_t smc_fid,
210 uint64_t x1,
211 uint64_t x2,
212 uint64_t x3,
213 uint64_t x4,
214 void *cookie,
215 void *handle,
216 uint64_t flags)
217{
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100218 if (is_caller_secure(flags))
219 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000220
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100221 if (((smc_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_32) {
222 /* 32-bit PSCI function, clear top parameter bits */
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000223
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100224 x1 = (uint32_t)x1;
225 x2 = (uint32_t)x2;
226 x3 = (uint32_t)x3;
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000227
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100228 switch (smc_fid) {
229 case PSCI_VERSION:
230 SMC_RET1(handle, psci_version());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000231
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100232 case PSCI_CPU_OFF:
Achin Guptae1aa5162014-06-26 09:58:52 +0100233 SMC_RET1(handle, psci_cpu_off());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000234
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100235 case PSCI_CPU_SUSPEND_AARCH32:
Achin Guptae1aa5162014-06-26 09:58:52 +0100236 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000237
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100238 case PSCI_CPU_ON_AARCH32:
239 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000240
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100241 case PSCI_AFFINITY_INFO_AARCH32:
242 SMC_RET1(handle, psci_affinity_info(x1, x2));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000243
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100244 case PSCI_MIG_AARCH32:
245 SMC_RET1(handle, psci_migrate(x1));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000246
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100247 case PSCI_MIG_INFO_TYPE:
248 SMC_RET1(handle, psci_migrate_info_type());
249
250 case PSCI_MIG_INFO_UP_CPU_AARCH32:
251 SMC_RET1(handle, psci_migrate_info_up_cpu());
252
253 default:
254 break;
255 }
256 } else {
257 /* 64-bit PSCI function */
258
259 switch (smc_fid) {
260 case PSCI_CPU_SUSPEND_AARCH64:
Achin Guptae1aa5162014-06-26 09:58:52 +0100261 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100262
263 case PSCI_CPU_ON_AARCH64:
264 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
265
266 case PSCI_AFFINITY_INFO_AARCH64:
267 SMC_RET1(handle, psci_affinity_info(x1, x2));
268
269 case PSCI_MIG_AARCH64:
270 SMC_RET1(handle, psci_migrate(x1));
271
272 case PSCI_MIG_INFO_UP_CPU_AARCH64:
273 SMC_RET1(handle, psci_migrate_info_up_cpu());
274
275 default:
276 break;
277 }
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000278 }
279
Andrew Thoelke89a3c842014-06-10 16:37:37 +0100280 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
281 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000282}