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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000034#include <runtime_svc.h>
35#include <debug.h>
Dan Handley714a0d22014-04-09 13:13:04 +010036#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38/*******************************************************************************
39 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
40 ******************************************************************************/
41int psci_cpu_on(unsigned long target_cpu,
42 unsigned long entrypoint,
43 unsigned long context_id)
44
45{
46 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000047 unsigned int start_afflvl, end_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +010048
49 /* Determine if the cpu exists of not */
50 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
51 if (rc != PSCI_E_SUCCESS) {
52 goto exit;
53 }
54
Achin Gupta0959db52013-12-02 17:33:04 +000055 /*
56 * To turn this cpu on, specify which affinity
57 * levels need to be turned on
58 */
59 start_afflvl = MPIDR_AFFLVL0;
60 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010061 rc = psci_afflvl_on(target_cpu,
62 entrypoint,
63 context_id,
64 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000065 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010066
67exit:
68 return rc;
69}
70
71unsigned int psci_version(void)
72{
73 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
74}
75
76int psci_cpu_suspend(unsigned int power_state,
77 unsigned long entrypoint,
78 unsigned long context_id)
79{
80 int rc;
81 unsigned long mpidr;
Achin Gupta0959db52013-12-02 17:33:04 +000082 unsigned int target_afflvl, pstate_type;
Achin Gupta4f6ad662013-10-25 09:08:21 +010083
Vikram Kanigirif100f412014-04-01 19:26:26 +010084 /* Check SBZ bits in power state are zero */
85 if (psci_validate_power_state(power_state))
86 return PSCI_E_INVALID_PARAMS;
87
Achin Gupta4f6ad662013-10-25 09:08:21 +010088 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000089 target_afflvl = psci_get_pstate_afflvl(power_state);
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000090 if (target_afflvl > MPIDR_MAX_AFFLVL)
91 return PSCI_E_INVALID_PARAMS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010092
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000093 pstate_type = psci_get_pstate_type(power_state);
94 if (pstate_type == PSTATE_TYPE_STANDBY) {
95 if (psci_plat_pm_ops->affinst_standby)
96 rc = psci_plat_pm_ops->affinst_standby(power_state);
97 else
98 return PSCI_E_INVALID_PARAMS;
99 } else {
100 mpidr = read_mpidr();
101 rc = psci_afflvl_suspend(mpidr,
102 entrypoint,
103 context_id,
104 power_state,
105 MPIDR_AFFLVL0,
106 target_afflvl);
107 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +0000109 assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100110 return rc;
111}
112
113int psci_cpu_off(void)
114{
115 int rc;
116 unsigned long mpidr;
117 int target_afflvl = get_max_afflvl();
118
119 mpidr = read_mpidr();
120
121 /*
122 * Traverse from the highest to the lowest affinity level. When the
123 * lowest affinity level is hit, all the locks are acquired. State
124 * management is done immediately followed by cpu, cluster ...
125 * ..target_afflvl specific actions as this function unwinds back.
126 */
Achin Gupta0959db52013-12-02 17:33:04 +0000127 rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100128
Achin Gupta3140a9e2013-12-02 16:23:12 +0000129 /*
130 * The only error cpu_off can return is E_DENIED. So check if that's
131 * indeed the case.
132 */
133 assert (rc == PSCI_E_SUCCESS || rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100134
135 return rc;
136}
137
138int psci_affinity_info(unsigned long target_affinity,
139 unsigned int lowest_affinity_level)
140{
141 int rc = PSCI_E_INVALID_PARAMS;
142 unsigned int aff_state;
Dan Handleye2712bc2014-04-10 15:37:22 +0100143 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100144
Achin Gupta75f73672013-12-05 16:33:10 +0000145 if (lowest_affinity_level > get_max_afflvl())
146 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100147
148 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
149 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000150
151 /*
152 * TODO: For affinity levels higher than 0 i.e. cpu, the
153 * state will always be either ON or OFF. Need to investigate
154 * how critical is it to support ON_PENDING here.
155 */
156 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100157
158 /* A suspended cpu is available & on for the OS */
159 if (aff_state == PSCI_STATE_SUSPEND) {
160 aff_state = PSCI_STATE_ON;
161 }
162
163 rc = aff_state;
164 }
Achin Gupta75f73672013-12-05 16:33:10 +0000165
Achin Gupta4f6ad662013-10-25 09:08:21 +0100166 return rc;
167}
168
169/* Unimplemented */
170int psci_migrate(unsigned int target_cpu)
171{
172 return PSCI_E_NOT_SUPPORTED;
173}
174
175/* Unimplemented */
176unsigned int psci_migrate_info_type(void)
177{
Achin Gupta607084e2014-02-09 18:24:19 +0000178 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100179}
180
181unsigned long psci_migrate_info_up_cpu(void)
182{
183 /*
184 * Return value of this currently unsupported call depends upon
185 * what psci_migrate_info_type() returns.
186 */
187 return PSCI_E_SUCCESS;
188}
189
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000190/*******************************************************************************
191 * PSCI top level handler for servicing SMCs.
192 ******************************************************************************/
193uint64_t psci_smc_handler(uint32_t smc_fid,
194 uint64_t x1,
195 uint64_t x2,
196 uint64_t x3,
197 uint64_t x4,
198 void *cookie,
199 void *handle,
200 uint64_t flags)
201{
202 uint64_t rc;
203
204 switch (smc_fid) {
205 case PSCI_VERSION:
206 rc = psci_version();
207 break;
208
209 case PSCI_CPU_OFF:
210 rc = __psci_cpu_off();
211 break;
212
213 case PSCI_CPU_SUSPEND_AARCH64:
214 case PSCI_CPU_SUSPEND_AARCH32:
215 rc = __psci_cpu_suspend(x1, x2, x3);
216 break;
217
218 case PSCI_CPU_ON_AARCH64:
219 case PSCI_CPU_ON_AARCH32:
220 rc = psci_cpu_on(x1, x2, x3);
221 break;
222
223 case PSCI_AFFINITY_INFO_AARCH32:
224 case PSCI_AFFINITY_INFO_AARCH64:
225 rc = psci_affinity_info(x1, x2);
226 break;
227
228 case PSCI_MIG_AARCH32:
229 case PSCI_MIG_AARCH64:
230 rc = psci_migrate(x1);
231 break;
232
233 case PSCI_MIG_INFO_TYPE:
234 rc = psci_migrate_info_type();
235 break;
236
237 case PSCI_MIG_INFO_UP_CPU_AARCH32:
238 case PSCI_MIG_INFO_UP_CPU_AARCH64:
239 rc = psci_migrate_info_up_cpu();
240 break;
241
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000242 default:
243 rc = SMC_UNK;
Jeenu Viswambharan1814a3e2014-02-28 10:08:33 +0000244 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000245 }
246
247 SMC_RET1(handle, rc);
248}