blob: 6bf05830411f2e721dbecca3f8a88b95ffeb4e5f [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <psci_private.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000038#include <runtime_svc.h>
39#include <debug.h>
40#include <context_mgmt.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
42/*******************************************************************************
43 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
44 ******************************************************************************/
45int psci_cpu_on(unsigned long target_cpu,
46 unsigned long entrypoint,
47 unsigned long context_id)
48
49{
50 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000051 unsigned int start_afflvl, end_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +010052
53 /* Determine if the cpu exists of not */
54 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
55 if (rc != PSCI_E_SUCCESS) {
56 goto exit;
57 }
58
Achin Gupta0959db52013-12-02 17:33:04 +000059 /*
60 * To turn this cpu on, specify which affinity
61 * levels need to be turned on
62 */
63 start_afflvl = MPIDR_AFFLVL0;
64 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 rc = psci_afflvl_on(target_cpu,
66 entrypoint,
67 context_id,
68 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000069 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010070
71exit:
72 return rc;
73}
74
75unsigned int psci_version(void)
76{
77 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
78}
79
80int psci_cpu_suspend(unsigned int power_state,
81 unsigned long entrypoint,
82 unsigned long context_id)
83{
84 int rc;
85 unsigned long mpidr;
Achin Gupta0959db52013-12-02 17:33:04 +000086 unsigned int target_afflvl, pstate_type;
Achin Gupta4f6ad662013-10-25 09:08:21 +010087
88 /* TODO: Standby states are not supported at the moment */
89 pstate_type = psci_get_pstate_type(power_state);
90 if (pstate_type == 0) {
91 rc = PSCI_E_INVALID_PARAMS;
92 goto exit;
93 }
94
95 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000096 target_afflvl = psci_get_pstate_afflvl(power_state);
97 if (target_afflvl > MPIDR_MAX_AFFLVL) {
Achin Gupta4f6ad662013-10-25 09:08:21 +010098 rc = PSCI_E_INVALID_PARAMS;
99 goto exit;
100 }
101
102 mpidr = read_mpidr();
103 rc = psci_afflvl_suspend(mpidr,
104 entrypoint,
105 context_id,
106 power_state,
Achin Gupta0959db52013-12-02 17:33:04 +0000107 MPIDR_AFFLVL0,
108 target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100109
110exit:
111 if (rc != PSCI_E_SUCCESS)
112 assert(rc == PSCI_E_INVALID_PARAMS);
113 return rc;
114}
115
116int psci_cpu_off(void)
117{
118 int rc;
119 unsigned long mpidr;
120 int target_afflvl = get_max_afflvl();
121
122 mpidr = read_mpidr();
123
124 /*
125 * Traverse from the highest to the lowest affinity level. When the
126 * lowest affinity level is hit, all the locks are acquired. State
127 * management is done immediately followed by cpu, cluster ...
128 * ..target_afflvl specific actions as this function unwinds back.
129 */
Achin Gupta0959db52013-12-02 17:33:04 +0000130 rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100131
Achin Gupta3140a9e2013-12-02 16:23:12 +0000132 /*
133 * The only error cpu_off can return is E_DENIED. So check if that's
134 * indeed the case.
135 */
136 assert (rc == PSCI_E_SUCCESS || rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100137
138 return rc;
139}
140
141int psci_affinity_info(unsigned long target_affinity,
142 unsigned int lowest_affinity_level)
143{
144 int rc = PSCI_E_INVALID_PARAMS;
145 unsigned int aff_state;
146 aff_map_node *node;
147
Achin Gupta75f73672013-12-05 16:33:10 +0000148 if (lowest_affinity_level > get_max_afflvl())
149 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100150
151 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
152 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000153
154 /*
155 * TODO: For affinity levels higher than 0 i.e. cpu, the
156 * state will always be either ON or OFF. Need to investigate
157 * how critical is it to support ON_PENDING here.
158 */
159 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160
161 /* A suspended cpu is available & on for the OS */
162 if (aff_state == PSCI_STATE_SUSPEND) {
163 aff_state = PSCI_STATE_ON;
164 }
165
166 rc = aff_state;
167 }
Achin Gupta75f73672013-12-05 16:33:10 +0000168
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169 return rc;
170}
171
172/* Unimplemented */
173int psci_migrate(unsigned int target_cpu)
174{
175 return PSCI_E_NOT_SUPPORTED;
176}
177
178/* Unimplemented */
179unsigned int psci_migrate_info_type(void)
180{
Achin Gupta607084e2014-02-09 18:24:19 +0000181 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182}
183
184unsigned long psci_migrate_info_up_cpu(void)
185{
186 /*
187 * Return value of this currently unsupported call depends upon
188 * what psci_migrate_info_type() returns.
189 */
190 return PSCI_E_SUCCESS;
191}
192
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000193/*******************************************************************************
194 * PSCI top level handler for servicing SMCs.
195 ******************************************************************************/
196uint64_t psci_smc_handler(uint32_t smc_fid,
197 uint64_t x1,
198 uint64_t x2,
199 uint64_t x3,
200 uint64_t x4,
201 void *cookie,
202 void *handle,
203 uint64_t flags)
204{
205 uint64_t rc;
206
207 switch (smc_fid) {
208 case PSCI_VERSION:
209 rc = psci_version();
210 break;
211
212 case PSCI_CPU_OFF:
213 rc = __psci_cpu_off();
214 break;
215
216 case PSCI_CPU_SUSPEND_AARCH64:
217 case PSCI_CPU_SUSPEND_AARCH32:
218 rc = __psci_cpu_suspend(x1, x2, x3);
219 break;
220
221 case PSCI_CPU_ON_AARCH64:
222 case PSCI_CPU_ON_AARCH32:
223 rc = psci_cpu_on(x1, x2, x3);
224 break;
225
226 case PSCI_AFFINITY_INFO_AARCH32:
227 case PSCI_AFFINITY_INFO_AARCH64:
228 rc = psci_affinity_info(x1, x2);
229 break;
230
231 case PSCI_MIG_AARCH32:
232 case PSCI_MIG_AARCH64:
233 rc = psci_migrate(x1);
234 break;
235
236 case PSCI_MIG_INFO_TYPE:
237 rc = psci_migrate_info_type();
238 break;
239
240 case PSCI_MIG_INFO_UP_CPU_AARCH32:
241 case PSCI_MIG_INFO_UP_CPU_AARCH64:
242 rc = psci_migrate_info_up_cpu();
243 break;
244
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000245 default:
246 rc = SMC_UNK;
Jeenu Viswambharan1814a3e2014-02-28 10:08:33 +0000247 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000248 }
249
250 SMC_RET1(handle, rc);
251}