| commit | b3dbeb007c22c4786d8feb9ae0fec052c2e18210 | [log] [tgz] |
|---|---|---|
| author | Juan Castillo <juan.castillo@arm.com> | Wed Jul 16 15:53:43 2014 +0100 |
| committer | Juan Castillo <juan.castillo@arm.com> | Fri Aug 01 09:39:50 2014 +0100 |
| tree | c645c183657171bec5d4c8491f6d8dd360d384d9 | |
| parent | 5cd545d3b1842010bd47911b77a811c439507a09 [diff] |
Call platform_is_primary_cpu() only from reset handler The purpose of platform_is_primary_cpu() is to determine after reset (BL1 or BL3-1 with reset handler) if the current CPU must follow the cold boot path (primary CPU), or wait in a safe state (secondary CPU) until the primary CPU has finished the system initialization. This patch removes redundant calls to platform_is_primary_cpu() in subsequent bootloader entrypoints since the reset handler already guarantees that code is executed exclusively on the primary CPU. Additionally, this patch removes the weak definition of platform_is_primary_cpu(), so the implementation of this function becomes mandatory. Removing the weak symbol avoids other bootloaders accidentally picking up an invalid definition in case the porting layer makes the real function available only to BL1. The define PRIMARY_CPU is no longer mandatory in the platform porting because platform_is_primary_cpu() hides the implementation details (for instance, there may be platforms that report the primary CPU in a system register). The primary CPU definition in FVP has been moved to fvp_def.h. The porting guide has been updated accordingly. Fixes ARM-software/tf-issues#219 Change-Id: If675a1de8e8d25122b7fef147cb238d939f90b5e
ARM Trusted Firmware provides a reference implementation of secure world software for ARMv8-A, including Exception Level 3 (EL3) software. This release focuses on support for ARM's [Fixed Virtual Platforms (FVPs)] FVP.
The intent is to provide a reference implementation of various ARM interface standards, such as the Power State Coordination Interface (PSCI), Trusted Board Boot Requirements (TBBR) and [Secure Monitor] TEE-SMC code. As far as possible the code is designed for reuse or porting to other ARMv8-A model and hardware platforms.
This release builds on previous source code releases, supporting the Base and Foundation FVP platform models from ARM.
ARM will continue development in collaboration with interested parties to provide a full reference implementation of PSCI, TBBR and Secure Monitor code to the benefit of all developers working with ARMv8-A TrustZone technology.
The software is provided under a BSD 3-Clause license. Certain source files are derived from FreeBSD code: the original license is included in these source files.
This release is a limited functionality implementation of the Trusted Firmware. It provides a suitable starting point for productization. Future versions will contain new features, optimizations and quality improvements.
Initial implementation of a subset of the Trusted Board Boot Requirements Platform Design Document (PDD). This includes packaging the various firmware images into a Firmware Image Package (FIP) to be loaded from non-volatile storage.
Initializes the secure world (for example, exception vectors, control registers, GIC and interrupts for the platform), before transitioning into the normal world.
Supports both GICv2 and GICv3 initialization for use by normal world software.
Starts the normal world at the highest available Exception Level: EL2 if available, otherwise EL1.
Handles SMCs (Secure Monitor Calls) conforming to the [SMC Calling Convention PDD] SMCCC using an EL3 runtime services framework.
Handles SMCs relating to the [Power State Coordination Interface PDD] PSCI for the Secondary CPU Boot, CPU hotplug and CPU idle use-cases.
A Test Secure-EL1 Payload and Dispatcher to demonstrate Secure Monitor functionality such as world switching, EL1 context management and interrupt routing. This also demonstrates Secure-EL1 interaction with PSCI. Some of this functionality is provided in library form for re-use by other Secure-EL1 Payload Dispatchers.
Support for alternative Trusted Boot Firmware. Some platforms have their own Trusted Boot implementation and only require the Secure Monitor functionality provided by ARM Trusted Firmware.
Isolation of memory accessible by the secure world from the normal world through programming of a TrustZone controller.
For a full description of functionality and implementation details, please see the Firmware Design and supporting documentation. The Change Log provides details of changes made since the last release.
This release of the Trusted Firmware has been tested on the following ARM FVPs (64-bit versions only):
Foundation_v8 (Version 2.0, Build 0.8.5206)FVP_Base_AEMv8A-AEMv8A (Version 5.6, Build 0.8.5602)FVP_Base_Cortex-A57x4-A53x4 (Version 5.6, Build 0.8.5602)FVP_Base_Cortex-A57x1-A53x1 (Version 5.6, Build 0.8.5602)FVP_Base_Cortex-A57x2-A53x4 (Version 5.6, Build 0.8.5602)The Foundation FVP can be downloaded free of charge. The Base FVPs can be licensed from ARM: see [www.arm.com/fvp] FVP.
Support for ARMv8-A development board as a reference platform.
Complete Trusted Boot implementation.
Complete implementation of the PSCI specification.
Support for alternative types of Secure-EL1 Payloads.
Completing the currently experimental GICv3 support.
For a full list of detailed issues in the current code, please see the Change Log and the GitHub issue tracker.
Get the Trusted Firmware source code from GitHub.
See the User Guide for instructions on how to install, build and use the Trusted Firmware with the ARM FVPs.
See the Firmware Design for information on how the ARM Trusted Firmware works.
See the Porting Guide as well for information about how to use this software on another ARMv8-A platform.
See the Contributing Guidelines for information on how to contribute to this project and the Acknowledgments file for a list of contributors to the project.
ARM welcomes any feedback on the Trusted Firmware. Please send feedback using the GitHub issue tracker.
ARM licensees may contact ARM directly via their partner managers.
Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.