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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Antonio Nino Diaze3887a92019-01-30 20:29:50 +00002 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Sandrine Bailleuxc10bd2c2013-11-12 16:41:16 +00007#include <arch.h>
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +01008#include <el3_common_macros.S>
Achin Gupta4f6ad662013-10-25 09:08:21 +01009
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000010 .globl bl1_entrypoint
Achin Gupta4f6ad662013-10-25 09:08:21 +010011
12
Achin Gupta4f6ad662013-10-25 09:08:21 +010013 /* -----------------------------------------------------
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000014 * bl1_entrypoint() is the entry point into the trusted
Achin Gupta4f6ad662013-10-25 09:08:21 +010015 * firmware code when a cpu is released from warm or
16 * cold reset.
17 * -----------------------------------------------------
18 */
19
Andrew Thoelke38bde412014-03-18 13:46:55 +000020func bl1_entrypoint
Sandrine Bailleux449dbd52015-06-02 17:19:43 +010021 /* ---------------------------------------------------------------------
22 * If the reset address is programmable then bl1_entrypoint() is
23 * executed only on the cold boot path. Therefore, we can skip the warm
24 * boot mailbox mechanism.
25 * ---------------------------------------------------------------------
26 */
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010027 el3_entrypoint_common \
David Cunadofee86532017-04-13 22:38:29 +010028 _init_sctlr=1 \
Sandrine Bailleux449dbd52015-06-02 17:19:43 +010029 _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
Sandrine Bailleuxb21b02f2015-10-30 15:05:17 +000030 _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010031 _init_memory=1 \
32 _init_c_runtime=1 \
33 _exception_vectors=bl1_exceptions
Vikram Kanigiri96377452014-04-24 11:02:16 +010034
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000035 /* --------------------------------------------------------------------
36 * Perform BL1 setup
37 * --------------------------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010038 */
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000039 bl bl1_setup
Achin Gupta4f6ad662013-10-25 09:08:21 +010040
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000041 /* --------------------------------------------------------------------
42 * Enable pointer authentication
43 * --------------------------------------------------------------------
44 */
45#if ENABLE_PAUTH
46 mrs x0, sctlr_el3
47 orr x0, x0, #SCTLR_EnIA_BIT
48 msr sctlr_el3, x0
49 isb
50#endif /* ENABLE_PAUTH */
51
52 /* --------------------------------------------------------------------
Vikram Kanigiri96377452014-04-24 11:02:16 +010053 * Initialize platform and jump to our c-entry point
Yatharth Kochara65be2f2015-10-09 18:06:13 +010054 * for this type of reset.
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000055 * --------------------------------------------------------------------
Vikram Kanigiri96377452014-04-24 11:02:16 +010056 */
57 bl bl1_main
Yatharth Kochara65be2f2015-10-09 18:06:13 +010058
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000059 /* --------------------------------------------------------------------
60 * Disable pointer authentication before jumping to BL31 or that will
61 * cause an authentication failure during the early platform init.
62 * --------------------------------------------------------------------
63 */
64#if ENABLE_PAUTH
65 mrs x0, sctlr_el3
66 bic x0, x0, #SCTLR_EnIA_BIT
67 msr sctlr_el3, x0
68 isb
69#endif /* ENABLE_PAUTH */
70
Yatharth Kochara65be2f2015-10-09 18:06:13 +010071 /* --------------------------------------------------
72 * Do the transition to next boot image.
73 * --------------------------------------------------
74 */
75 b el3_exit
Kévin Petita877c252015-03-24 14:03:57 +000076endfunc bl1_entrypoint