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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Sandrine Bailleuxc10bd2c2013-11-12 16:41:16 +000031#include <arch.h>
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010032#include <el3_common_macros.S>
Achin Gupta4f6ad662013-10-25 09:08:21 +010033
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000034 .globl bl1_entrypoint
Achin Gupta4f6ad662013-10-25 09:08:21 +010035
36
Achin Gupta4f6ad662013-10-25 09:08:21 +010037 /* -----------------------------------------------------
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000038 * bl1_entrypoint() is the entry point into the trusted
Achin Gupta4f6ad662013-10-25 09:08:21 +010039 * firmware code when a cpu is released from warm or
40 * cold reset.
41 * -----------------------------------------------------
42 */
43
Andrew Thoelke38bde412014-03-18 13:46:55 +000044func bl1_entrypoint
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010045 el3_entrypoint_common \
46 _set_endian=1 \
47 _warm_boot_mailbox=1 \
48 _secondary_cold_boot=1 \
49 _init_memory=1 \
50 _init_c_runtime=1 \
51 _exception_vectors=bl1_exceptions
Vikram Kanigiri96377452014-04-24 11:02:16 +010052
53 /* ---------------------------------------------
54 * Architectural init. can be generic e.g.
55 * enabling stack alignment and platform spec-
56 * ific e.g. MMU & page table setup as per the
57 * platform memory map. Perform the latter here
58 * and the former in bl1_main.
Achin Gupta4f6ad662013-10-25 09:08:21 +010059 * ---------------------------------------------
60 */
Vikram Kanigiri96377452014-04-24 11:02:16 +010061 bl bl1_early_platform_setup
62 bl bl1_plat_arch_setup
Achin Gupta4f6ad662013-10-25 09:08:21 +010063
Vikram Kanigiri96377452014-04-24 11:02:16 +010064 /* --------------------------------------------------
65 * Initialize platform and jump to our c-entry point
66 * for this type of reset. Panic if it returns
67 * --------------------------------------------------
68 */
69 bl bl1_main
70panic:
71 b panic
Kévin Petita877c252015-03-24 14:03:57 +000072endfunc bl1_entrypoint