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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010035#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Soby Mathewffb4ab12014-09-26 15:08:52 +010037typedef int (*afflvl_off_handler_t)(aff_map_node_t *node);
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * The next three functions implement a handler for each supported affinity
41 * level which is called when that affinity level is turned off.
42 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +010043static int psci_afflvl0_off(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010044{
Andrew Thoelke4e126072014-06-04 21:10:52 +010045 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +010046
47 assert(cpu_node->level == MPIDR_AFFLVL0);
48
49 /*
Achin Gupta607084e2014-02-09 18:24:19 +000050 * Generic management: Get the index for clearing any lingering re-entry
51 * information and allow the secure world to switch itself off
52 */
53
54 /*
55 * Call the cpu off handler registered by the Secure Payload Dispatcher
56 * to let it do any bookeeping. Assume that the SPD always reports an
57 * E_DENIED error if SP refuse to power down
Achin Gupta4f6ad662013-10-25 09:08:21 +010058 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000059 if (psci_spd_pm && psci_spd_pm->svc_off) {
60 rc = psci_spd_pm->svc_off(0);
Achin Gupta607084e2014-02-09 18:24:19 +000061 if (rc)
62 return rc;
63 }
64
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 /*
66 * Arch. management. Perform the necessary steps to flush all
67 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +010068 */
Achin Guptae1aa5162014-06-26 09:58:52 +010069 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +010070
Achin Gupta56bcdc22014-07-28 00:15:23 +010071 if (!psci_plat_pm_ops->affinst_off)
72 return PSCI_E_SUCCESS;
73
Achin Gupta4f6ad662013-10-25 09:08:21 +010074 /*
75 * Plat. management: Perform platform specific actions to turn this
76 * cpu off e.g. exit cpu coherency, program the power controller etc.
77 */
Soby Mathewffb4ab12014-09-26 15:08:52 +010078 return psci_plat_pm_ops->affinst_off(cpu_node->level,
Achin Gupta56bcdc22014-07-28 00:15:23 +010079 psci_get_phys_state(cpu_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +010080}
81
Andrew Thoelke2bc07852014-06-09 12:44:21 +010082static int psci_afflvl1_off(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010083{
Achin Gupta4f6ad662013-10-25 09:08:21 +010084 /* Sanity check the cluster level */
85 assert(cluster_node->level == MPIDR_AFFLVL1);
86
87 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +010088 * Arch. Management. Flush all levels of caches to PoC if
Achin Guptaf6b9e992014-07-31 11:19:11 +010089 * the cluster is to be shutdown.
Achin Gupta4f6ad662013-10-25 09:08:21 +010090 */
Achin Guptaf6b9e992014-07-31 11:19:11 +010091 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL1);
Achin Gupta4f6ad662013-10-25 09:08:21 +010092
Achin Gupta56bcdc22014-07-28 00:15:23 +010093 if (!psci_plat_pm_ops->affinst_off)
94 return PSCI_E_SUCCESS;
95
Achin Gupta4f6ad662013-10-25 09:08:21 +010096 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +000097 * Plat. Management. Allow the platform to do its cluster
Achin Gupta4f6ad662013-10-25 09:08:21 +010098 * specific bookeeping e.g. turn off interconnect coherency,
99 * program the power controller etc.
100 */
Soby Mathewffb4ab12014-09-26 15:08:52 +0100101 return psci_plat_pm_ops->affinst_off(cluster_node->level,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100102 psci_get_phys_state(cluster_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100103}
104
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100105static int psci_afflvl2_off(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100106{
Achin Gupta4f6ad662013-10-25 09:08:21 +0100107 /* Cannot go beyond this level */
108 assert(system_node->level == MPIDR_AFFLVL2);
109
110 /*
111 * Keep the physical state of the system handy to decide what
112 * action needs to be taken
113 */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100114
Achin Guptaf6b9e992014-07-31 11:19:11 +0100115 /*
116 * Arch. Management. Flush all levels of caches to PoC if
117 * the system is to be shutdown.
118 */
119 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL2);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100120
Achin Gupta56bcdc22014-07-28 00:15:23 +0100121 if (!psci_plat_pm_ops->affinst_off)
122 return PSCI_E_SUCCESS;
123
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000125 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100126 * at this affinity level
127 */
Soby Mathewffb4ab12014-09-26 15:08:52 +0100128 return psci_plat_pm_ops->affinst_off(system_node->level,
Achin Gupta56bcdc22014-07-28 00:15:23 +0100129 psci_get_phys_state(system_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100130}
131
Dan Handleye2712bc2014-04-10 15:37:22 +0100132static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100133 psci_afflvl0_off,
134 psci_afflvl1_off,
135 psci_afflvl2_off,
136};
137
138/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000139 * This function takes an array of pointers to affinity instance nodes in the
140 * topology tree and calls the off handler for the corresponding affinity
141 * levels
142 ******************************************************************************/
Achin Gupta56bcdc22014-07-28 00:15:23 +0100143static int psci_call_off_handlers(aff_map_node_t *mpidr_nodes[],
Achin Gupta0959db52013-12-02 17:33:04 +0000144 int start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100145 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000146{
147 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100148 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000149
150 for (level = start_afflvl; level <= end_afflvl; level++) {
151 node = mpidr_nodes[level];
152 if (node == NULL)
153 continue;
154
155 /*
156 * TODO: In case of an error should there be a way
157 * of restoring what we might have torn down at
158 * lower affinity levels.
159 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100160 rc = psci_afflvl_off_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000161 if (rc != PSCI_E_SUCCESS)
162 break;
163 }
164
165 return rc;
166}
167
168/*******************************************************************************
169 * Top level handler which is called when a cpu wants to power itself down.
170 * It's assumed that along with turning the cpu off, higher affinity levels will
171 * be turned off as far as possible. It traverses through all the affinity
172 * levels performing generic, architectural, platform setup and state management
173 * e.g. for a cluster that's to be powered off, it will call the platform
174 * specific code which will disable coherency at the interconnect level if the
175 * cpu is the last in the cluster. For a cpu it could mean programming the power
176 * the power controller etc.
177 *
178 * The state of all the relevant affinity levels is changed prior to calling the
179 * affinity level specific handlers as their actions would depend upon the state
180 * the affinity level is about to enter.
181 *
182 * The affinity level specific handlers are called in ascending order i.e. from
183 * the lowest to the highest affinity level implemented by the platform because
184 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
185 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100186 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100187int psci_afflvl_off(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000188 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100189{
Achin Gupta0959db52013-12-02 17:33:04 +0000190 int rc = PSCI_E_SUCCESS;
Dan Handleye2712bc2014-04-10 15:37:22 +0100191 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Guptaf6b9e992014-07-31 11:19:11 +0100192 unsigned int max_phys_off_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100193
194 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000195 * Collect the pointers to the nodes in the topology tree for
196 * each affinity instance in the mpidr. If this function does
197 * not return successfully then either the mpidr or the affinity
198 * levels are incorrect. In either case, we cannot return back
199 * to the caller as it would not know what to do.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100200 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100201 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000202 start_afflvl,
203 end_afflvl,
204 mpidr_nodes);
205 assert (rc == PSCI_E_SUCCESS);
206
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000208 * This function acquires the lock corresponding to each affinity
209 * level so that by the time all locks are taken, the system topology
210 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100212 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000213 end_afflvl,
214 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100215
Achin Guptacab78e42014-07-28 00:09:01 +0100216 /*
217 * This function updates the state of each affinity instance
218 * corresponding to the mpidr in the range of affinity levels
219 * specified.
220 */
221 psci_do_afflvl_state_mgmt(start_afflvl,
222 end_afflvl,
223 mpidr_nodes,
224 PSCI_STATE_OFF);
Achin Guptaf6b9e992014-07-31 11:19:11 +0100225
226 max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
227 end_afflvl,
228 mpidr_nodes);
229 assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
230
231 /* Stash the highest affinity level that will enter the OFF state. */
232 psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
233
Achin Gupta0959db52013-12-02 17:33:04 +0000234 /* Perform generic, architecture and platform specific handling */
235 rc = psci_call_off_handlers(mpidr_nodes,
236 start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100237 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100238
239 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100240 * Invalidate the entry for the highest affinity level stashed earlier.
241 * This ensures that any reads of this variable outside the power
242 * up/down sequences return PSCI_INVALID_DATA.
243 *
244 */
245 psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
246
247 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000248 * Release the locks corresponding to each affinity level in the
249 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100250 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100251 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000252 end_afflvl,
253 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100254
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255 return rc;
256}