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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Zelalem Aweke688fbf72021-07-09 11:37:10 -05002 * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Sandrine Bailleuxc10bd2c2013-11-12 16:41:16 +00007#include <arch.h>
Zelalem Aweke688fbf72021-07-09 11:37:10 -05008#include <common/bl_common.h>
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +01009#include <el3_common_macros.S>
Achin Gupta4f6ad662013-10-25 09:08:21 +010010
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000011 .globl bl1_entrypoint
Zelalem Aweke688fbf72021-07-09 11:37:10 -050012 .globl bl1_run_bl2_in_root
Achin Gupta4f6ad662013-10-25 09:08:21 +010013
14
Achin Gupta4f6ad662013-10-25 09:08:21 +010015 /* -----------------------------------------------------
Jeenu Viswambharan2a30a752014-03-11 11:06:45 +000016 * bl1_entrypoint() is the entry point into the trusted
Achin Gupta4f6ad662013-10-25 09:08:21 +010017 * firmware code when a cpu is released from warm or
18 * cold reset.
19 * -----------------------------------------------------
20 */
21
Andrew Thoelke38bde412014-03-18 13:46:55 +000022func bl1_entrypoint
Sandrine Bailleux449dbd52015-06-02 17:19:43 +010023 /* ---------------------------------------------------------------------
24 * If the reset address is programmable then bl1_entrypoint() is
25 * executed only on the cold boot path. Therefore, we can skip the warm
26 * boot mailbox mechanism.
27 * ---------------------------------------------------------------------
28 */
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010029 el3_entrypoint_common \
David Cunadofee86532017-04-13 22:38:29 +010030 _init_sctlr=1 \
Sandrine Bailleux449dbd52015-06-02 17:19:43 +010031 _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
Sandrine Bailleuxb21b02f2015-10-30 15:05:17 +000032 _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +010033 _init_memory=1 \
34 _init_c_runtime=1 \
Manish Pandeyc8257682019-11-26 11:34:17 +000035 _exception_vectors=bl1_exceptions \
36 _pie_fixup_size=0
Vikram Kanigiri96377452014-04-24 11:02:16 +010037
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000038 /* --------------------------------------------------------------------
39 * Perform BL1 setup
40 * --------------------------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010041 */
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000042 bl bl1_setup
Achin Gupta4f6ad662013-10-25 09:08:21 +010043
Alexei Fedorovf41355c2019-09-13 14:11:59 +010044#if ENABLE_PAUTH
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000045 /* --------------------------------------------------------------------
Alexei Fedorovf41355c2019-09-13 14:11:59 +010046 * Program APIAKey_EL1 and enable pointer authentication.
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000047 * --------------------------------------------------------------------
48 */
Alexei Fedorovf41355c2019-09-13 14:11:59 +010049 bl pauth_init_enable_el3
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000050#endif /* ENABLE_PAUTH */
51
52 /* --------------------------------------------------------------------
Vikram Kanigiri96377452014-04-24 11:02:16 +010053 * Initialize platform and jump to our c-entry point
Yatharth Kochara65be2f2015-10-09 18:06:13 +010054 * for this type of reset.
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000055 * --------------------------------------------------------------------
Vikram Kanigiri96377452014-04-24 11:02:16 +010056 */
57 bl bl1_main
Yatharth Kochara65be2f2015-10-09 18:06:13 +010058
Alexei Fedorovf41355c2019-09-13 14:11:59 +010059#if ENABLE_PAUTH
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000060 /* --------------------------------------------------------------------
Alexei Fedorovf41355c2019-09-13 14:11:59 +010061 * Disable pointer authentication before jumping to next boot image.
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000062 * --------------------------------------------------------------------
63 */
Alexei Fedorovf41355c2019-09-13 14:11:59 +010064 bl pauth_disable_el3
Antonio Nino Diaze3887a92019-01-30 20:29:50 +000065#endif /* ENABLE_PAUTH */
66
Yatharth Kochara65be2f2015-10-09 18:06:13 +010067 /* --------------------------------------------------
68 * Do the transition to next boot image.
69 * --------------------------------------------------
70 */
Zelalem Aweke688fbf72021-07-09 11:37:10 -050071#if ENABLE_RME
72 b bl1_run_bl2_in_root
73#else
Yatharth Kochara65be2f2015-10-09 18:06:13 +010074 b el3_exit
Zelalem Aweke688fbf72021-07-09 11:37:10 -050075#endif
Kévin Petita877c252015-03-24 14:03:57 +000076endfunc bl1_entrypoint
Zelalem Aweke688fbf72021-07-09 11:37:10 -050077
78 /* -----------------------------------------------------
79 * void bl1_run_bl2_in_root();
80 * This function runs BL2 in root/EL3 when RME is enabled.
81 * -----------------------------------------------------
82 */
83
84func bl1_run_bl2_in_root
85 /* read bl2_ep_info */
86 adrp x20, bl2_ep_info
87 add x20, x20, :lo12:bl2_ep_info
88 ldr x20, [x20]
89
90 /* ---------------------------------------------
91 * MMU needs to be disabled because BL2 executes
92 * in EL3. It will initialize the address space
93 * according to its own requirements.
94 * ---------------------------------------------
95 */
96 bl disable_mmu_icache_el3
97 tlbi alle3
98
99 ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET]
100 msr elr_el3, x0
101 msr spsr_el3, x1
102
103 ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
104 ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
105 ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
106 ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
107 exception_return
108endfunc bl1_run_bl2_in_root