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filogic
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uboot
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d1eb93bad135f615cc3750f351b613e458c37c67
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arch
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riscv
69dea21
Merge tag 'v2023.10-rc4' into next
by Tom Rini
· Mon Sep 04 10:51:58 2023 -0400
b8357c1
event: Convert existing spy records to simple
by Simon Glass
· Mon Aug 21 21:16:56 2023 -0600
7ca0dc0
riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback
by Chanho Park
· Fri Aug 18 14:11:03 2023 +0900
51a9aac
common: return type board_get_usable_ram_top
by Heinrich Schuchardt
· Sat Aug 12 20:16:58 2023 +0200
ac4bf43
riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE
by Shengyu Qu
· Wed Aug 09 21:11:33 2023 +0800
62b89a1
riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation
by Shengyu Qu
· Wed Aug 09 21:11:32 2023 +0800
d1a3254
riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE
by Shengyu Qu
· Wed Aug 09 21:11:31 2023 +0800
8fe34ac
riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE
by Minda Chen
· Mon Aug 07 16:53:37 2023 +0800
021faf7
riscv: dts: starfive: Enable pcie0 dts node
by Minda Chen
· Mon Aug 07 16:53:36 2023 +0800
70884d7
cmd/sbi: display new extensions
by Heinrich Schuchardt
· Wed Aug 02 22:39:46 2023 +0200
4cf9986
acpi: Add missing RISC-V acpi_table header
by Heinrich Schuchardt
· Wed Jul 26 08:05:13 2023 +0200
23dfd81
riscv: dts: starfive: Enable PCIe host controller
by Mason Huo
· Tue Jul 25 17:46:50 2023 +0800
026a932
riscv: define a cache line size for the generic CPU
by Heinrich Schuchardt
· Fri Jul 21 18:01:18 2023 +0200
1345c9e
riscv: dts: jh7110: Add clock source from PLL
by Xingyu Wu
· Fri Jul 07 18:50:09 2023 +0800
7ae81bb
riscv: dts: jh7110: Add PLL clock controller node
by Xingyu Wu
· Fri Jul 07 18:50:08 2023 +0800
0cbd55b
riscv: setup per-hart stack earlier
by Bo Gan
· Sun Jun 11 16:54:17 2023 -0700
e3a02bd
riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board
by Yixun Lan
· Sat Jul 08 19:24:33 2023 +0800
5dfa901
riscv: t-head: licheepi4a: initial support added
by Yixun Lan
· Sat Jul 08 19:24:32 2023 +0800
b5f0372
riscv: Rename SiFive CLINT to RISC-V ALINT
by Bin Meng
· Wed Jun 21 23:11:46 2023 +0800
08b8d26
riscv: clint: Update the sifive clint ipi driver to support aclint
by Bin Meng
· Wed Jun 21 23:11:45 2023 +0800
f69a512
ram: starfive: Read memory size information from EEPROM
by Yanhong Wang
· Thu Jun 15 17:36:51 2023 +0800
d426942
riscv: dts: starfive: Add support eeprom device tree node
by Yanhong Wang
· Thu Jun 15 17:36:49 2023 +0800
39331e4
eeprom: starfive: Enable ID EEPROM configuration
by Yanhong Wang
· Thu Jun 15 17:36:48 2023 +0800
438ab1e
riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
by Yanhong Wang
· Thu Jun 15 17:36:45 2023 +0800
7f63bd9
riscv: dts: jh7110: Add ethernet device tree nodes
by Yanhong Wang
· Thu Jun 15 17:36:44 2023 +0800
c99c384
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
by Yu Chien Peter Lin
· Tue Jul 04 19:13:20 2023 +0800
3978599
riscv: dts: sync mpfs-icicle devicetree with linux
by Conor Dooley
· Thu Jun 15 11:12:43 2023 +0100
75809d9
riscv: dts: drop microchip from dts filenames
by Conor Dooley
· Thu Jun 15 11:12:42 2023 +0100
ad168d6
riscv: define test_and_{set,clear}_bit in asm/bitops.h
by Ben Dooks
· Fri May 05 09:02:07 2023 +0100
0cd077d
riscv: implement local_irq_{save,restore} macros
by Ben Dooks
· Fri May 05 09:02:06 2023 +0100
17f6b11
riscv: add generic link for <asm/atomic.h>
by Ben Dooks
· Fri May 05 09:02:05 2023 +0100
cd464d1
cmd/sbi: display new extensions
by Heinrich Schuchardt
· Wed Apr 12 10:38:16 2023 +0200
4a4ebe3
Merge tag 'v2023.07-rc6' into next
by Tom Rini
· Wed Jul 05 11:28:55 2023 -0400
50e7d71
riscv: Fix alignment of RELA sections in the linker scripts
by Bin Meng
· Tue Jun 27 09:24:56 2023 +0800
bd05090
common: spl: Add spl NVMe boot support
by Mayuresh Chitale
· Sat Jun 03 19:32:56 2023 +0530
8c6b5f7
Merge tag v2023.07-rc4 into next
by Tom Rini
· Mon Jun 12 14:55:33 2023 -0400
e6618f4
include: Remove unused header files
by Tom Rini
· Tue May 16 12:34:47 2023 -0400
9307401
dm: Emit the arch_cpu_init_dm() even only before relocation
by Simon Glass
· Thu May 04 16:50:45 2023 -0600
b1d2436
riscv: Support CONFIG_REMAKE_ELF
by Samuel Holland
· Mon Feb 20 00:02:39 2023 -0600
4478727
riscv: Update alignment for some sections in linker scripts
by Bin Meng
· Thu Apr 13 14:20:08 2023 +0800
604a0c5
riscv: spl: Remove relocation sections
by Bin Meng
· Thu Apr 13 14:20:07 2023 +0800
8615b1d
riscv: Avoid updating the link register
by Bin Meng
· Thu Apr 13 14:20:06 2023 +0800
63d0fe4
riscv: Change to use positive offset to access relocation entries
by Bin Meng
· Thu Apr 13 14:20:05 2023 +0800
73449c9
riscv: Optimize loading relocation type
by Bin Meng
· Thu Apr 13 14:20:01 2023 +0800
3ccd29e
riscv: Optimize source end address calculation in start.S
by Bin Meng
· Thu Apr 13 14:20:00 2023 +0800
722618e
riscv: Enforce DWARF4 output
by Bin Meng
· Fri Apr 07 13:44:59 2023 +0800
b5399d9
riscv: Correct a comment in io.h
by Bin Meng
· Mon Apr 03 11:37:32 2023 +0800
5efc934
riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
by Yanhong Wang
· Wed Mar 29 11:42:23 2023 +0800
94817bf
riscv: dts: jh7110: Add initial u-boot device tree
by Yanhong Wang
· Wed Mar 29 11:42:22 2023 +0800
96c3eb72
riscv: dts: jh7110: Add initial StarFive JH7110 device tree
by Yanhong Wang
· Wed Mar 29 11:42:21 2023 +0800
3867879
board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig
by Yanhong Wang
· Wed Mar 29 11:42:20 2023 +0800
5203a63
riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC
by Yanhong Wang
· Wed Mar 29 11:42:18 2023 +0800
e28ec34
riscv: cpu: jh7110: Add support for jh7110 SoC
by Yanhong Wang
· Wed Mar 29 11:42:08 2023 +0800
c34de68
riscv: semihosting: replace inline assembly with assembly file
by Andre Przywara
· Tue Feb 07 15:21:05 2023 +0000
1c0b887
Merge tag 'v2023.04-rc3' into next
by Tom Rini
· Mon Feb 27 17:28:21 2023 -0500
ddcdd94
riscv: binman: Add help message for missing blobs
by Rick Chen
· Fri Feb 17 16:57:01 2023 +0800
249ce73
riscv: Rename Andes cpu and board names
by Leo Yu-Chi Liang
· Tue Feb 14 20:42:49 2023 +0800
e440ed4
configs: ae350: Enable v5l2 cache for AE350 platforms in SPL
by Yu Chien Peter Lin
· Mon Feb 06 16:10:50 2023 +0800
b2ccd1c
riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL
by Yu Chien Peter Lin
· Mon Feb 06 16:10:49 2023 +0800
5cc6b3f
riscv: ae350: dts: Update L2 cache compatible string
by Yu Chien Peter Lin
· Mon Feb 06 16:10:48 2023 +0800
82f0f53
riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()
by Yu Chien Peter Lin
· Mon Feb 06 16:10:47 2023 +0800
816979a
riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"
by Leo Yu-Chi Liang
· Mon Feb 06 16:10:44 2023 +0800
52d54e1
riscv: global_data.h: Correct the comment for PLICSW
by Yu Chien Peter Lin
· Mon Feb 06 10:06:29 2023 +0800
d3a98cb
dm: dts: Convert driver model tags to use new schema
by Simon Glass
· Mon Feb 13 08:56:33 2023 -0700
ae7ed57
Correct SPL uses of LMB
by Simon Glass
· Sun Feb 05 15:40:13 2023 -0700
718e569
riscv: memcpy: check src and dst before copy
by Rick Chen
· Wed Jan 04 09:56:28 2023 +0800
08537f3
riscv: ax25: bypass malloc when spl fit boots from ram
by Rick Chen
· Wed Jan 04 09:55:43 2023 +0800
c1ec25e
riscv: ae350: Enable CCTL_SUEN
by Rick Chen
· Tue Jan 03 16:17:13 2023 +0800
c9382b1
riscv: cpu: check U-Mode before counteren write
by Nikita Shubin
· Wed Dec 14 08:58:43 2022 +0300
364d002
global: Finish CONFIG -> CFG migration
by Tom Rini
· Tue Jan 10 11:19:45 2023 -0500
a6b1b3b
Merge branch 'next'
by Tom Rini
· Mon Jan 09 11:30:08 2023 -0500
e84ab96
efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
by Heinrich Schuchardt
· Fri Dec 23 02:16:03 2022 +0100
572c718
Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig
by Tom Rini
· Fri Dec 02 16:42:44 2022 -0500
c86cb4a
arch/riscv: add semihosting support for RISC-V
by Kautuk Consul
· Wed Dec 07 17:12:35 2022 +0530
693baee
riscv: clarify meaning of CONFIG_SBI_V02
by Heinrich Schuchardt
· Tue Nov 08 15:53:12 2022 +0100
a35afb8
riscv: Fix detecting FPU support in standard extension
by Yu Chien Peter Lin
· Sat Nov 05 14:02:14 2022 +0800
e828edd
riscv: dts: fix the mpfs's reference clock frequency
by Conor Dooley
· Tue Oct 25 08:58:49 2022 +0100
da2a6d0
riscv: dts: Add QSPI NAND device node
by Padmarao Begari
· Thu Oct 27 11:32:00 2022 +0530
c66a3b2
riscv: dts: Update memory configuration
by Padmarao Begari
· Thu Oct 27 11:31:59 2022 +0530
739cd6f
riscv: Rename Andes PLIC to PLICSW
by Yu Chien Peter Lin
· Tue Oct 25 23:03:50 2022 +0800
72cc538
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
by Simon Glass
· Thu Oct 20 18:22:39 2022 -0600
bcb208b
riscv: andes_plic.c: use modified IPI scheme
by Yu Chien Peter Lin
· Fri Oct 14 15:00:18 2022 +0800
c66c950
riscv: support building double-float modules
by Heinrich Schuchardt
· Wed Oct 12 14:59:51 2022 +0200
43e1f93
riscv: Fix build against binutils 2.38
by Alexandre Ghiti
· Mon Oct 03 18:07:54 2022 +0200
2e4938b
dm: core: Drop ofnode_is_available()
by Simon Glass
· Tue Sep 06 20:27:17 2022 -0600
df00afa
treewide: Drop bootm_headers_t typedef
by Simon Glass
· Tue Sep 06 20:26:50 2022 -0600
eff2077
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next
by Tom Rini
· Mon Sep 26 11:27:30 2022 -0400
9c4d5c1
riscv: Introduce AVAILABLE_HARTS
by Rick Chen
· Wed Sep 21 14:34:54 2022 +0800
7e5e029
spl: introduce SPL_XIP to config
by Nikita Shubin
· Fri Sep 02 11:47:39 2022 +0300
4f4f583
board_f: Fix types for board_get_usable_ram_top()
by Pali Rohár
· Fri Sep 09 17:32:40 2022 +0200
ebe3b23
riscv: dts: sifive: Synchronize FU740 and Unmatched DT
by Icenowy Zheng
· Thu Aug 25 16:11:19 2022 +0800
13d7170
dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
by Icenowy Zheng
· Thu Aug 25 16:11:18 2022 +0800
f781746
riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux
by Jessica Clarke
· Fri Aug 12 18:50:03 2022 +0100
4150eec
riscv: ae350: Fix XIP config boot failure
by Leo Yu-Chi Liang
· Wed Jun 01 10:01:49 2022 +0800
66ae7fe
riscv: cpu: set gp before board_init_f_init_reserve
by Nikita Shubin
· Fri May 20 14:41:17 2022 +0300
8aaae3d
zynqmp: Run board_get_usable_ram_top() only on main U-Boot
by Ashok Reddy Soma
· Thu Jul 07 10:45:37 2022 +0200
c65d29f
arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
by Michal Simek
· Thu Jul 07 10:47:16 2022 +0200
94b4fec
Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
by Tom Rini
· Sat Jun 25 11:02:46 2022 -0400
5a9095c
linker_lists: Rename sections to remove . prefix
by Andrew Scull
· Mon May 30 10:00:04 2022 +0000
4ddbade
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
by Tom Rini
· Wed May 25 12:16:03 2022 -0400
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