b5f0372fea958517ac2b14a6bba3e44f436bd6b0 - filogic/uboot

commit	b5f0372fea958517ac2b14a6bba3e44f436bd6b0	[log] [tgz]
author	Bin Meng <bmeng@tinylab.org>	Wed Jun 21 23:11:46 2023 +0800
committer	Leo Yu-Chi Liang <ycliang@andestech.com>	Wed Jul 12 13:21:40 2023 +0800
tree	45a6e78f33e00d2a1bbe996d5895162c7f9dbf05
parent	08b8d265c52bd6d3d1a054295cefdc2b44243ac5 [diff]

riscv: Rename SiFive CLINT to RISC-V ALINT

As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>

MAINTAINERS[diff]
arch/riscv/Kconfig[diff]
arch/riscv/cpu/fu540/Kconfig[diff]
arch/riscv/cpu/fu740/Kconfig[diff]
arch/riscv/cpu/generic/Kconfig[diff]
arch/riscv/cpu/jh7110/Kconfig[diff]
arch/riscv/include/asm/global_data.h[diff]
arch/riscv/include/asm/syscon.h[diff]
arch/riscv/lib/Makefile[diff]
arch/riscv/lib/aclint_ipi.c[Renamed from arch/riscv/lib/sifive_clint.c - diff]
board/openpiton/riscv64/Kconfig[diff]
board/sipeed/maix/Kconfig[diff]
drivers/timer/Makefile[diff]
drivers/timer/riscv_aclint_timer.c[Renamed from drivers/timer/sifive_clint_timer.c - diff]

14 files changed

tree: 45a6e78f33e00d2a1bbe996d5895162c7f9dbf05