Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 58aeddc3e3daeb37be69fe65aa6d016886eace5b / arch / arm / mach-socfpga
  1. 8227bc9 arm: socfpga: fix Gen5 enable of EMAC via FPGA by Ralph Siemsen · Tue Sep 29 14:52:05 2020 -0400
  2. c8694ee arm: socfpga: arria10: Add qts-filter for Arria10 socfpga by Dalon Westergreen · Fri Sep 27 18:43:24 2019 -0700
  3. 916d2ba arm: socfpga: mailbox: Add mailbox retry support by Ley Foon Tan · Wed Aug 12 09:56:25 2020 +0800
  4. 69b7ab9 arm: socfpga: mailbox: Update mailbox response codes by Ley Foon Tan · Wed Aug 12 09:56:24 2020 +0800
  5. e480586 arm: socfpga: mailbox: Support sending large mailbox command by Chee Hong Ang · Wed Aug 12 09:56:23 2020 +0800
  6. fe33ea3 arm: socfpga: mailbox: Always read mailbox responses before returning status by Chee Hong Ang · Wed Aug 12 09:56:22 2020 +0800
  7. 0cc64c8 arm: socfpga: mailbox: Refactor mailbox timeout event handling by Chee Hong Ang · Wed Aug 12 09:56:21 2020 +0800
  8. 8a98105 arm: socfpga: soc64: Document down boot_scratch_cold register usage by Chin Liang See · Mon Aug 10 10:55:56 2020 +0800
  9. 1f9f0e3 arm: socfpga: soc64: Add timeout waiting for NOC idle ACK by Chee Hong Ang · Mon Aug 10 22:59:49 2020 +0800
  10. 89ac34d arm: socfpga: agilex: Enable FPGA Full Reconfiguration support by Chee Hong Ang · Fri Aug 07 11:50:05 2020 +0800
  11. 1419245 fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox by Chee Hong Ang · Fri Aug 07 11:50:03 2020 +0800
  12. 346431c arm: socfpga: Use DM watchdog timer by Chee Hong Ang · Thu Aug 06 12:15:33 2020 +0800
  13. 6cf193c arm: socfpga: soc64: Show reset state in SPL by Chee Hong Ang · Wed Aug 05 21:15:57 2020 +0800
  14. 75ba0aa arm: socfpga: soc64: Add SDM triggered warm reset bit mask by Chee Hong Ang · Wed Aug 05 21:15:56 2020 +0800
  15. 92dc7ae arm: socfpga: soc64: Initialize timer in SPL only by Chee Hong Ang · Fri Jul 10 23:53:13 2020 +0800
  16. f18fe84 arm: socfpga: soc64: Remove PHY interface setup from misc arch init by Chee Hong Ang · Fri Jul 10 23:52:32 2020 +0800
  17. 61e9199 arm: socfpga: soc64: Check FPGA Config status register before bridge reset by Chee Hong Ang · Thu Aug 06 11:56:29 2020 +0800
  18. ea84ae6 socfpga: Mark socfpga_fpga_add() as static inline in the non-FPGA case by Tom Rini · Thu May 14 08:30:05 2020 -0400
  19. 91373cd arm: socfpga: misc_s10: Fix EMAC register address calculation by Ley Foon Tan · Thu Jun 25 19:19:09 2020 +0800
  20. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  21. 559f1a8 Use __ASSEMBLY__ as the assembly macros by Simon Glass · Sun May 10 11:40:12 2020 -0600
  22. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  23. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  24. ed38aef command: Remove the cmd_tbl_t typedef by Simon Glass · Sun May 10 11:40:03 2020 -0600
  25. 9758973 common: Drop init.h from common header by Simon Glass · Sun May 10 11:40:02 2020 -0600
  26. 274e0b0 common: Drop net.h from common header by Simon Glass · Sun May 10 11:39:56 2020 -0600
  27. 5d489bf arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset by Ley Foon Tan · Mon Apr 20 16:17:27 2020 +0800
  28. 0bf7ab1 spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode() by Harald Seiler · Wed Apr 15 11:33:30 2020 +0200
  29. 1d07b3e arm: socfpga: arria10: Enable cache driver in SPL by Ley Foon Tan · Tue Apr 07 15:43:14 2020 +0800
  30. f7fcc90 arm: socfpga: arria10: Add save_boot_params() by Ley Foon Tan · Fri Mar 06 16:55:20 2020 +0800
  31. 8f1552e arm: socfpga: Add onchip RAM size macro by Ley Foon Tan · Fri Mar 06 16:55:18 2020 +0800
  32. ddef889 ARM: socfpga: Add initial support for the ABB SECU board by Holger Brunck · Wed Feb 19 19:55:14 2020 +0100
  33. b7b1838 Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm by Tom Rini · Tue Feb 11 10:58:41 2020 -0500
  34. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  35. 6bccacf ddr: altera: Add DDR2 support to Gen5 driver by Marek Vasut · Fri Oct 18 00:22:31 2019 +0200
  36. e2a19f4 ARM: socfpga: Drop last use of socfpga_reset_manager by Marek Vasut · Thu Jan 09 10:56:24 2020 +0100
  37. f11478f common: Move hang() to the same header as panic() by Simon Glass · Sat Dec 28 10:45:07 2019 -0700
  38. afb0215 common: Move reset_cpu() to the CPU header by Simon Glass · Sat Dec 28 10:45:01 2019 -0700
  39. 6e762d8 arm: socfpga: stratix10: Enable SMMU access by Thor Thayer · Fri Dec 06 13:47:31 2019 -0600
  40. 461d298 arm: socfpga: agilex: Enable Agilex SoC build by Ley Foon Tan · Wed Nov 27 15:55:32 2019 +0800
  41. 600c731 arm: socfpga: agilex: Add SPL for Agilex SoC by Ley Foon Tan · Wed Nov 27 15:55:29 2019 +0800
  42. 0767f8d arm: agilex: Add clock handoff offset for Agilex by Ley Foon Tan · Wed Nov 27 15:55:25 2019 +0800
  43. b7d95b7 arm: socfpga: agilex: Add clock wrapper functions by Ley Foon Tan · Wed Nov 27 15:55:23 2019 +0800
  44. ef5458f clk: agilex: Add clock driver for Agilex by Ley Foon Tan · Wed Nov 27 15:55:22 2019 +0800
  45. a9ebd2a arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz by Ley Foon Tan · Wed Nov 27 15:55:21 2019 +0800
  46. 9c25671 arm: socfpga: Move Stratix10 and Agilex clock manager common code by Ley Foon Tan · Wed Nov 27 15:55:20 2019 +0800
  47. 905bae1 arm: socfpga: agilex: Add system manager support by Ley Foon Tan · Wed Nov 27 15:55:19 2019 +0800
  48. 0b1680e arm: socfpga: Move Stratix10 and Agilex system manager common code by Ley Foon Tan · Wed Nov 27 15:55:18 2019 +0800
  49. ef9805a arm: socfpga: agilex: Add reset manager support by Ley Foon Tan · Wed Nov 27 15:55:17 2019 +0800
  50. 89700b4 arm: socfpga: Move Stratix10 and Agilex reset manager common code by Ley Foon Tan · Wed Nov 27 15:55:16 2019 +0800
  51. f1c4bd5 arm: socfpga: Move firewall code to firewall file by Ley Foon Tan · Wed Nov 27 15:55:15 2019 +0800
  52. 65d25a6 arm: socfpga: agilex: Add base address for Intel Agilex SoC by Ley Foon Tan · Wed Nov 27 15:55:14 2019 +0800
  53. 2669591 arm: socfpga: Convert clock manager from struct to defines by Ley Foon Tan · Fri Nov 08 10:38:21 2019 +0800
  54. 3d3a860 arm: socfpga: Convert system manager from struct to defines by Ley Foon Tan · Fri Nov 08 10:38:20 2019 +0800
  55. fed4c95 arm: socfpga: Convert reset manager from struct to defines by Ley Foon Tan · Fri Nov 08 10:38:19 2019 +0800
  56. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  57. 495a5dc common: Move get_ticks() function out of common.h by Simon Glass · Thu Nov 14 12:57:30 2019 -0700
  58. 8b3b890 ARM: socfpga: Unreset NAND in SPL on Gen5 by Marek Vasut · Wed Nov 20 22:36:24 2019 +0100
  59. 47928cc ARM: socfpga: Add ArriaV ST/SX ID by Marek Vasut · Wed Nov 20 22:40:19 2019 +0100
  60. 2265259 ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5 by Marek Vasut · Wed Nov 20 22:34:31 2019 +0100
  61. 9f38a97 ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable by Marek Vasut · Wed Nov 20 22:34:30 2019 +0100
  62. 5216671 socfpga: fix include guard in misc.h (arch vs. global) by Simon Goldschmidt · Wed Oct 23 22:32:30 2019 +0200
  63. 17d7852 arm: socfpga: gen5: fix ERR_PTR_OFFSET by Simon Goldschmidt · Tue Oct 22 21:29:48 2019 +0200
  64. 13da18c ARM: socfpga: vining_fpga: Rename VINING|FPGA by Marek Vasut · Thu Jun 27 00:19:31 2019 +0200
  65. a8f0c94 spl: Convert CONFIG_SPL_SIZE_LIMIT to hex by Simon Glass · Wed Sep 25 08:56:28 2019 -0600
  66. 7611ac6 spl: Allow tiny printf() to be controlled in SPL and TPL by Simon Glass · Wed Sep 25 08:56:27 2019 -0600
  67. 257ab53 arm: socfpga: gen5: don't zero bss in board_init_f() by Simon Goldschmidt · Fri Jul 12 20:03:09 2019 +0200
  68. 5e6201b env: Move env_set() to env.h by Simon Glass · Thu Aug 01 09:46:51 2019 -0600
  69. fc82466 sysreset: add support for socfpga sysreset by Simon Goldschmidt · Mon Jul 15 21:47:55 2019 +0200
  70. b32e1e8 arm: socfpga: rst: add register definition for cold reset by Simon Goldschmidt · Mon Jul 15 21:47:52 2019 +0200
  71. 20fd7de arm: socfpga: provide default SPL_SIZE_LIMIT for gen5 by Simon Goldschmidt · Thu Jun 13 21:50:28 2019 +0200
  72. a62817a ARM: socfpga: Clear PL310 early in SPL by Marek Vasut · Sat Mar 09 22:25:57 2019 +0100
  73. b6ba490 ARM: socfpga: Pull PL310 clearing into common code by Marek Vasut · Thu Mar 21 23:05:38 2019 +0100
  74. 43ec7e0 CONFIG_SPL_SYS_[DI]CACHE_OFF: add by Trevor Woerner · Fri May 03 09:41:00 2019 -0400
  75. 7789aab2 arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board by Wolfgang Grandegger · Sun May 12 19:25:18 2019 +0200
  76. c8ff687 arm: sofcpga: s10: remove unused ad-hoc reset code by Simon Goldschmidt · Mon May 13 21:16:44 2019 +0200
  77. 635e250 arm: socfpga: remove re-added ad-hoc reset code by Simon Goldschmidt · Mon May 13 21:16:43 2019 +0200
  78. fe03d80 spl: socfpga: Implement fpga bitstream loading with socfpga loadfs by Tien Fong Chee · Tue May 07 17:42:30 2019 +0800
  79. ca99a8a ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading by Tien Fong Chee · Tue May 07 17:42:28 2019 +0800
  80. 96a9489 Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · Tue May 07 09:37:11 2019 -0400
  81. d740445 ARM: socfpga: stratix10: Probe FPGA status before bridge enable by Ang, Chee Hong · Fri May 03 01:18:27 2019 -0700
  82. fadf65b ARM: socfpga: stratix10: Disable FPGA2SOC reset by Ang, Chee Hong · Fri May 03 01:19:08 2019 -0700
  83. 3fdf436 arm: socfpga: Move Stratix 10 SDRAM driver to DM by Ley Foon Tan · Mon May 06 09:56:01 2019 +0800
  84. 17b9ba6 ddr: altera: Compile ALTERA SDRAM in SPL only by Ley Foon Tan · Mon May 06 09:55:59 2019 +0800
  85. 86fbf9d ARM: socfpga: use the pl310 driver to configure the cache by Dinh Nguyen · Tue Apr 23 16:55:05 2019 -0500
  86. b99ca37 ARM: socfpga: Remove socfpga_sdram_apply_static_cfg() by Marek Vasut · Tue Apr 23 17:24:22 2019 +0200
  87. 713a8a2 ARM: socfpga: Add support for selecting bridges in bridge command by Marek Vasut · Tue Apr 16 22:28:08 2019 +0200
  88. 0c3ddb6 ARM: socfpga: Fully unmap the FPGA bridges from L3 space by Marek Vasut · Tue Apr 16 22:13:29 2019 +0200
  89. 0b2502e ARM: socfpga: Disable bridges in SPL unless booting from FPGA by Marek Vasut · Tue Apr 16 14:19:34 2019 +0200
  90. 79a5b2c ARM: socfpga: Factor out handoff register configuration by Marek Vasut · Tue Apr 16 23:05:24 2019 +0200
  91. 374c230 arm: socfpga: mailbox: Fix off-by-one error on command length checking by Ley Foon Tan · Wed Apr 24 13:21:47 2019 +0800
  92. 4f57b9a arm: socfpga: gen5: reduce SPL pre-reloc malloc by Simon Goldschmidt · Tue Apr 09 21:02:06 2019 +0200
  93. b1c4269 arm: socfpga: imply/default common config options by Simon Goldschmidt · Tue Apr 09 21:02:05 2019 +0200
  94. 9799a67 ddr: altera: Stratix10: Add ECC memory scrubbing by Ley Foon Tan · Fri Mar 22 01:24:05 2019 +0800
  95. 3e263c7 arm: socfpga: stratix10: Add cpu_has_been_warmreset() by Ley Foon Tan · Fri Mar 22 01:24:04 2019 +0800
  96. a9245d1 ddr: altera: stratix10: Move SDRAM size check to SDRAM driver by Ley Foon Tan · Fri Mar 22 01:24:00 2019 +0800
  97. 407dcc5 arm: socfpga: implement proper peripheral reset by Simon Goldschmidt · Fri Mar 01 20:12:36 2019 +0100
  98. 24910c3 arm: socfpga: move gen5 SDR driver to DM by Simon Goldschmidt · Tue Apr 16 22:04:39 2019 +0200
  99. 339da98 ARM: socfpga: Disable D cache in SPL by Marek Vasut · Tue May 08 20:32:01 2018 +0200
  100. 4a23a5b ARM: socfpga: fix data and tag latency values for pl310 cache controller by Dinh Nguyen · Sun Mar 03 11:02:10 2019 -0600