| commit | 6cf193c185e985ad8463899bc3abea14972bebd1 | [log] [tgz] |
|---|---|---|
| author | Chee Hong Ang <chee.hong.ang@intel.com> | Wed Aug 05 21:15:57 2020 +0800 |
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | Fri Oct 09 17:53:11 2020 +0800 |
| tree | 54fb5133a8eb0b7a9fb7d1c4377ec2c825c70764 | |
| parent | 75ba0aa6278ae1cb24243a9c2cba7306a5c71187 [diff] |
arm: socfpga: soc64: Show reset state in SPL Print reset state (warm/cold) together with the source (watchdog/MPU) which has triggered the warm reset on S10 & Agilex. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>