commit | 339da981c65f0c6dddf0d5772e1e8482c6aae1ce | [log] [tgz] |
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author | Marek Vasut <marex@denx.de> | Tue May 08 20:32:01 2018 +0200 |
committer | Marek Vasut <marex@denx.de> | Sat Mar 09 17:59:13 2019 +0100 |
tree | 154edeedce6b844c79ee7aaa325f5f51d6e03b0e | |
parent | 6b440508245d8fd4986b870ea64114b0ec254d72 [diff] |
ARM: socfpga: Disable D cache in SPL The bootrom seems to leave the D-cache in messed up state, make sure the SPL disables it so it can not interfere with operation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>