Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
0b1d35c3cba9ad9cb3dd076a16cd8e975b584f4f
/
arch
/
arm
/
mach-socfpga
13da18c
ARM: socfpga: vining_fpga: Rename VINING|FPGA
by Marek Vasut
· Thu Jun 27 00:19:31 2019 +0200
a8f0c94
spl: Convert CONFIG_SPL_SIZE_LIMIT to hex
by Simon Glass
· Wed Sep 25 08:56:28 2019 -0600
7611ac6
spl: Allow tiny printf() to be controlled in SPL and TPL
by Simon Glass
· Wed Sep 25 08:56:27 2019 -0600
257ab53
arm: socfpga: gen5: don't zero bss in board_init_f()
by Simon Goldschmidt
· Fri Jul 12 20:03:09 2019 +0200
5e6201b
env: Move env_set() to env.h
by Simon Glass
· Thu Aug 01 09:46:51 2019 -0600
fc82466
sysreset: add support for socfpga sysreset
by Simon Goldschmidt
· Mon Jul 15 21:47:55 2019 +0200
b32e1e8
arm: socfpga: rst: add register definition for cold reset
by Simon Goldschmidt
· Mon Jul 15 21:47:52 2019 +0200
20fd7de
arm: socfpga: provide default SPL_SIZE_LIMIT for gen5
by Simon Goldschmidt
· Thu Jun 13 21:50:28 2019 +0200
a62817a
ARM: socfpga: Clear PL310 early in SPL
by Marek Vasut
· Sat Mar 09 22:25:57 2019 +0100
b6ba490
ARM: socfpga: Pull PL310 clearing into common code
by Marek Vasut
· Thu Mar 21 23:05:38 2019 +0100
43ec7e0
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
by Trevor Woerner
· Fri May 03 09:41:00 2019 -0400
7789aab2
arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board
by Wolfgang Grandegger
· Sun May 12 19:25:18 2019 +0200
c8ff687
arm: sofcpga: s10: remove unused ad-hoc reset code
by Simon Goldschmidt
· Mon May 13 21:16:44 2019 +0200
635e250
arm: socfpga: remove re-added ad-hoc reset code
by Simon Goldschmidt
· Mon May 13 21:16:43 2019 +0200
fe03d80
spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
by Tien Fong Chee
· Tue May 07 17:42:30 2019 +0800
ca99a8a
ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
by Tien Fong Chee
· Tue May 07 17:42:28 2019 +0800
96a9489
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
by Tom Rini
· Tue May 07 09:37:11 2019 -0400
d740445
ARM: socfpga: stratix10: Probe FPGA status before bridge enable
by Ang, Chee Hong
· Fri May 03 01:18:27 2019 -0700
fadf65b
ARM: socfpga: stratix10: Disable FPGA2SOC reset
by Ang, Chee Hong
· Fri May 03 01:19:08 2019 -0700
3fdf436
arm: socfpga: Move Stratix 10 SDRAM driver to DM
by Ley Foon Tan
· Mon May 06 09:56:01 2019 +0800
17b9ba6
ddr: altera: Compile ALTERA SDRAM in SPL only
by Ley Foon Tan
· Mon May 06 09:55:59 2019 +0800
86fbf9d
ARM: socfpga: use the pl310 driver to configure the cache
by Dinh Nguyen
· Tue Apr 23 16:55:05 2019 -0500
b99ca37
ARM: socfpga: Remove socfpga_sdram_apply_static_cfg()
by Marek Vasut
· Tue Apr 23 17:24:22 2019 +0200
713a8a2
ARM: socfpga: Add support for selecting bridges in bridge command
by Marek Vasut
· Tue Apr 16 22:28:08 2019 +0200
0c3ddb6
ARM: socfpga: Fully unmap the FPGA bridges from L3 space
by Marek Vasut
· Tue Apr 16 22:13:29 2019 +0200
0b2502e
ARM: socfpga: Disable bridges in SPL unless booting from FPGA
by Marek Vasut
· Tue Apr 16 14:19:34 2019 +0200
79a5b2c
ARM: socfpga: Factor out handoff register configuration
by Marek Vasut
· Tue Apr 16 23:05:24 2019 +0200
374c230
arm: socfpga: mailbox: Fix off-by-one error on command length checking
by Ley Foon Tan
· Wed Apr 24 13:21:47 2019 +0800
4f57b9a
arm: socfpga: gen5: reduce SPL pre-reloc malloc
by Simon Goldschmidt
· Tue Apr 09 21:02:06 2019 +0200
b1c4269
arm: socfpga: imply/default common config options
by Simon Goldschmidt
· Tue Apr 09 21:02:05 2019 +0200
9799a67
ddr: altera: Stratix10: Add ECC memory scrubbing
by Ley Foon Tan
· Fri Mar 22 01:24:05 2019 +0800
3e263c7
arm: socfpga: stratix10: Add cpu_has_been_warmreset()
by Ley Foon Tan
· Fri Mar 22 01:24:04 2019 +0800
a9245d1
ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
by Ley Foon Tan
· Fri Mar 22 01:24:00 2019 +0800
407dcc5
arm: socfpga: implement proper peripheral reset
by Simon Goldschmidt
· Fri Mar 01 20:12:36 2019 +0100
24910c3
arm: socfpga: move gen5 SDR driver to DM
by Simon Goldschmidt
· Tue Apr 16 22:04:39 2019 +0200
339da98
ARM: socfpga: Disable D cache in SPL
by Marek Vasut
· Tue May 08 20:32:01 2018 +0200
4a23a5b
ARM: socfpga: fix data and tag latency values for pl310 cache controller
by Dinh Nguyen
· Sun Mar 03 11:02:10 2019 -0600
2880c11
ARM: socfpga: Clear PL310 early in SPL
by Marek Vasut
· Tue Feb 19 01:07:21 2019 +0100
fd43442
ARM: socfpga: Configure PL310 latencies
by Marek Vasut
· Tue Feb 19 01:11:24 2019 +0100
54d329b
arm: socfpga: gen5: remove hacked ETH RST handling
by Simon Goldschmidt
· Sun Jan 13 19:58:42 2019 +0100
6091dd1
spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4
by Tien Fong Chee
· Wed Jan 23 14:20:05 2019 +0800
6fd0a71
spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT
by Tien Fong Chee
· Wed Jan 23 14:20:03 2019 +0800
da9640e
arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration
by Ang, Chee Hong
· Wed Dec 19 18:35:16 2018 -0800
ff14f16
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
by Ang, Chee Hong
· Wed Dec 19 18:35:15 2018 -0800
11f4644
arm: socfpga: stratix10: Add macros for mailbox's arguments
by Ang, Chee Hong
· Wed Dec 19 18:35:13 2018 -0800
31b7963
arm: socfpga: stratix10: Add generic FPGA reconfig mailbox API for S10
by Ang, Chee Hong
· Wed Dec 19 18:35:12 2018 -0800
da13a0a
arm: socfpga: fix SPL booting from fpga OnChip RAM
by Simon Goldschmidt
· Wed Oct 10 14:55:23 2018 +0200
ceab269
arm: socfpga: make config structs const
by Simon Goldschmidt
· Wed Nov 14 21:05:12 2018 +0100
0e182f2
arm: socfpga: stratix10: add sgmii in phymode setup
by Ooi, Joyce
· Mon Sep 24 23:31:45 2018 -0700
2e75a74
arm: socfpga: Remove unused function socfpga_emac_manage_reset()
by Ley Foon Tan
· Fri Sep 21 00:22:14 2018 +0800
897dbd7
socfpga: stratix10: fix sdram_calculate_size
by Dalon Westergreen
· Tue Sep 11 10:06:14 2018 -0700
aaa40e7
ARM: socfpga: Convert Arria10 to timer framework
by Marek Vasut
· Sat Aug 18 16:00:31 2018 +0200
8fdb419
ARM: socfpga: Reorder Arria10 SPL
by Marek Vasut
· Sat Aug 18 19:11:52 2018 +0200
ff756cc
arm: socfpga: stratix10: Fix mailbox urgent command with urgent register
by Ley Foon Tan
· Fri Aug 17 16:22:03 2018 +0800
0968d4e
arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
by Ley Foon Tan
· Fri Aug 17 16:22:02 2018 +0800
7ebd938
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
by Ley Foon Tan
· Thu Aug 16 02:20:17 2018 +0800
71b1637
ARM: socfpga: clk: Convert to clock framework
by Marek Vasut
· Mon Aug 06 21:42:05 2018 +0200
fd6bcb5
ARM: socfpga: clk: Drop unused variables on Arria10
by Marek Vasut
· Tue Jul 31 17:33:42 2018 +0200
d430d9a
ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
by Marek Vasut
· Mon Aug 06 21:47:50 2018 +0200
e1dcd62
ARM: socfpga: clk: Obtain handoff base clock via DM
by Marek Vasut
· Mon Jul 30 15:56:19 2018 +0200
04c8f4f
ARM: socfpga: Remove adhoc ethernet reset and configuration
by Marek Vasut
· Mon Aug 13 20:06:46 2018 +0200
40ca091
ARM: socfpga: Zap unused reset code
by Marek Vasut
· Mon Aug 13 18:57:08 2018 +0200
8b73c87
ARM: socfpga: Zap all the UART handling complexity
by Marek Vasut
· Sun Apr 15 16:29:12 2018 +0200
69fbb88
ARM: socfpga: Enable DM I2C framework on A10
by Marek Vasut
· Mon Aug 13 18:32:38 2018 +0200
700b2c6
ARM: socfpga: Enable DM reset framework on A10
by Marek Vasut
· Mon Aug 13 18:32:38 2018 +0200
95db8ee
ARM: socfpga: Register the FPGA on A10 in SPL again
by Marek Vasut
· Mon Jul 30 13:58:54 2018 +0200
8e30203
arm: socfpga: gen5: combine some init code for SPL and U-Boot
by Simon Goldschmidt
· Mon Aug 13 21:34:35 2018 +0200
bc698cc
arm: socfpga: cyclone5: handle debug uart
by Simon Goldschmidt
· Mon Aug 13 09:33:47 2018 +0200
1849e25
arm: socfpga: spl_gen5: clean up malloc_base assignment
by Simon Goldschmidt
· Mon Aug 13 09:33:46 2018 +0200
17a1c61
arm: socfpga: fix SPL on gen5 after moving to DM serial
by Simon Goldschmidt
· Mon Aug 13 09:33:44 2018 +0200
7e7ba3b
Kconfig: Sort bool, default, select and imply options
by Michal Simek
· Mon Jul 23 15:55:15 2018 +0200
3e034a3
ARM: socfpga: Init missing security policies on A10
by Marek Vasut
· Thu Jul 12 15:34:23 2018 +0200
911a665
ARM: socfpga: Assure correct CPACR configuration
by Marek Vasut
· Thu Jul 12 15:07:46 2018 +0200
b3d55ea
lib: fdtdec: Rename routine fdtdec_setup_memory_size()
by Siva Durga Prasad Paladugu
· Mon Jul 16 15:56:11 2018 +0530
cb896f5
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
by Tom Rini
· Fri Jul 13 09:05:05 2018 -0400
2667ddd
arm: socfpga: Fixes: include <debug_uart.h>
by Ley Foon Tan
· Thu Jul 12 21:44:24 2018 +0800
27f05ac
arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
by Ley Foon Tan
· Thu Jul 12 19:13:34 2018 +0800
72cc958
ARM: socfpga: Assure correct ACTLR configuration
by Marek Vasut
· Tue May 29 16:16:46 2018 +0200
1530317
ARM: socfpga: Pull DRAM size from DT
by Marek Vasut
· Mon May 28 17:09:45 2018 +0200
2b96352
arm: socfpga: Add do_bridge_reset for Arria 10
by Ley Foon Tan
· Fri Jun 01 16:13:19 2018 +0800
9c407b5
arm: socfpga: stratix10: Enable Stratix10 SoC build
by Ley Foon Tan
· Thu May 24 00:17:32 2018 +0800
f9c7f79
ddr: altera: stratix10: Add DDR support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:30 2018 +0800
4eadafc2
arm: socfpga: stratix10: Add timer support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:29 2018 +0800
975e496
arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:28 2018 +0800
3305ba7
arm: socfpga: Restructure the SPL file
by Ley Foon Tan
· Thu May 24 00:17:27 2018 +0800
ca6afad
arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:26 2018 +0800
e5b6a66
arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:25 2018 +0800
f80cb34
arm: socfpga: stratix10: Add misc support for Stratix10 SoC
by Ley Foon Tan
· Thu May 24 00:17:24 2018 +0800
4cc6b58
arm: socfpga: misc: Move bridge command to misc common
by Ley Foon Tan
· Thu May 24 00:17:23 2018 +0800
d165c70
board/aries: Remove
by Tom Rini
· Mon Jul 02 15:52:50 2018 -0400
4606fc7
SPDX: Fixup SPDX tags in a few new files
by Tom Rini
· Sun May 20 09:47:45 2018 -0400
6fa091d
arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
by Ley Foon Tan
· Fri May 18 22:05:25 2018 +0800
7cdb912
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:24 2018 +0800
449cbae
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:23 2018 +0800
6751e7d
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
by Ley Foon Tan
· Fri May 18 22:05:22 2018 +0800
a61fd02
arm: socfpga: stratix10: Add watchdog and firewall base addresses
by Ley Foon Tan
· Fri May 18 22:05:21 2018 +0800
d5fba89
ARM: socfpga: Fix Documentation errors in scu_registers
by Ben Kalo
· Tue May 15 19:45:37 2018 +0300
f3f525c
ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
by Tien Fong Chee
· Tue Dec 05 15:58:08 2017 +0800
a5bfce3
ARM: socfpga: Adding clock frequency info for U-Boot
by Tien Fong Chee
· Tue Dec 05 15:58:07 2017 +0800
4d447a5
configs: Add DDR Kconfig support for Arria 10
by Tien Fong Chee
· Tue Dec 05 15:58:03 2017 +0800
Next »