blob: 212ffb3090b202dff40273abe76a892a40cb49da [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassc45e3592013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glassc45e3592013-03-11 06:49:53 +000010 */
11
Tom Rini728cb882024-04-27 08:11:00 -060012#include <config.h>
Simon Glassa815dab2018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass1ea97892020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glass85d65312019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glassa73bda42015-11-08 23:47:45 -070016#include <console.h>
Mario Six97bbb602018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass1fa70f82019-11-14 12:57:34 -070018#include <cpu_func.h>
Stefan Roese7513df32022-09-02 13:57:50 +020019#include <cyclic.h>
Simon Glass1ab16922022-07-31 12:28:48 -060020#include <display_options.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060021#include <dm.h>
Simon Glass79fd2142019-08-01 09:46:43 -060022#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060023#include <env_internal.h>
Simon Glass4f542532022-03-04 08:43:02 -070024#include <event.h>
Simon Glassc45e3592013-03-11 06:49:53 +000025#include <fdtdec.h>
Simon Glass15393432013-04-20 08:42:41 +000026#include <fs.h>
Simon Glassf11478f2019-12-28 10:45:07 -070027#include <hang.h>
Simon Glass50250b52013-03-11 14:30:42 +000028#include <i2c.h>
Simon Glass6980b6b2019-11-14 12:57:45 -070029#include <init.h>
Simon Glassc45e3592013-03-11 06:49:53 +000030#include <initcall.h>
Simon Glass0f2af882020-05-10 11:40:05 -060031#include <log.h>
Simon Glassd1d087d2015-02-27 22:06:36 -070032#include <malloc.h>
Joe Hershberger65b905b2015-03-22 17:08:59 -050033#include <mapmem.h>
Simon Glass62cf9122013-04-26 02:53:43 +000034#include <os.h>
Simon Glassc45e3592013-03-11 06:49:53 +000035#include <post.h>
Simon Glass6ab91072017-03-31 08:40:38 -060036#include <relocate.h>
Simon Glass36736182019-11-14 12:57:24 -070037#include <serial.h>
Simon Glasse14f1a22018-11-15 18:44:09 -070038#include <spl.h>
Jeroen Hofsteea802b982014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six4481a5d2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass8e4f80f2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass209a1a62013-06-11 11:14:42 -070042#include <trace.h>
Simon Glassfce58f52016-01-18 19:52:21 -070043#include <video.h>
Simon Glass50250b52013-03-11 14:30:42 +000044#include <watchdog.h>
Simon Glass274e0b02020-05-10 11:39:56 -060045#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060046#include <asm/global_data.h>
Simon Glassc45e3592013-03-11 06:49:53 +000047#include <asm/io.h>
48#include <asm/sections.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060049#include <dm/root.h>
Simon Glassb3c12562017-03-31 08:40:35 -060050#include <linux/errno.h>
Pali Rohár8dc23ef2022-09-18 13:23:27 +020051#include <linux/log2.h>
Simon Glassc45e3592013-03-11 06:49:53 +000052
Simon Glassc45e3592013-03-11 06:49:53 +000053DECLARE_GLOBAL_DATA_PTR;
Simon Glassc45e3592013-03-11 06:49:53 +000054
55/*
Simon Glass839855c2015-04-28 20:25:03 -060056 * TODO(sjg@chromium.org): IMO this code should be
Simon Glassc45e3592013-03-11 06:49:53 +000057 * refactored to a single function, something like:
58 *
59 * void led_set_state(enum led_colour_t colour, int on);
60 */
61/************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
65 */
Jeroen Hofsteea802b982014-06-23 23:20:19 +020066__weak void coloured_LED_init(void) {}
67__weak void red_led_on(void) {}
68__weak void red_led_off(void) {}
69__weak void green_led_on(void) {}
70__weak void green_led_off(void) {}
71__weak void yellow_led_on(void) {}
72__weak void yellow_led_off(void) {}
73__weak void blue_led_on(void) {}
74__weak void blue_led_off(void) {}
Simon Glassc45e3592013-03-11 06:49:53 +000075
76/*
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
79 *
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
84 * a structure...
85 */
86
Sonic Zhangf503a522014-07-17 19:01:34 +080087#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glass50250b52013-03-11 14:30:42 +000088static int init_func_watchdog_init(void)
89{
Tom Rini210ebce2017-03-14 11:08:10 -040090# if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar0509c4e2018-10-09 11:46:40 -070092 defined(CONFIG_SH) || \
Anatolij Gustschin87db2942016-06-13 14:24:23 +020093 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roeseee86af22015-03-10 08:04:36 +010094 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangf503a522014-07-17 19:01:34 +080095 hw_watchdog_init();
Simon Glass50250b52013-03-11 14:30:42 +000096 puts(" Watchdog enabled\n");
Anatolij Gustschind3aa98a2016-06-13 14:24:24 +020097# endif
Stefan Roese80877fa2022-09-02 14:10:46 +020098 schedule();
Simon Glass50250b52013-03-11 14:30:42 +000099
100 return 0;
101}
102
103int init_func_watchdog_reset(void)
104{
Stefan Roese80877fa2022-09-02 14:10:46 +0200105 schedule();
Simon Glass50250b52013-03-11 14:30:42 +0000106
107 return 0;
108}
109#endif /* CONFIG_WATCHDOG */
110
Jeroen Hofstee45846052014-10-08 22:57:22 +0200111__weak void board_add_ram_info(int use_default)
Simon Glass50250b52013-03-11 14:30:42 +0000112{
113 /* please define platform specific board_add_ram_info() */
114}
115
Simon Glassc45e3592013-03-11 06:49:53 +0000116static int init_baud_rate(void)
117{
Simon Glass22c34c22017-08-03 12:22:13 -0600118 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glassc45e3592013-03-11 06:49:53 +0000119 return 0;
120}
121
122static int display_text_info(void)
123{
Ben Stoltz1930e8d2015-07-31 09:31:37 -0600124#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100125 ulong bss_start, bss_end, text_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000126
Shiji Yangeff11fa2023-08-03 09:47:17 +0800127 bss_start = (ulong)__bss_start;
128 bss_end = (ulong)__bss_end;
Albert ARIBAUD6e294722014-02-22 17:53:43 +0100129
Simon Glass72cc5382022-10-20 18:22:39 -0600130#ifdef CONFIG_TEXT_BASE
131 text_base = CONFIG_TEXT_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800132#else
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100133 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800134#endif
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100135
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100137 text_base, bss_start, bss_end);
Simon Glass62cf9122013-04-26 02:53:43 +0000138#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000139
Simon Glassc45e3592013-03-11 06:49:53 +0000140 return 0;
141}
142
Mario Six4481a5d2018-08-06 10:23:34 +0200143#ifdef CONFIG_SYSRESET
144static int print_resetinfo(void)
145{
146 struct udevice *dev;
147 char status[256];
Michal Suchanek32c58c12022-10-10 20:29:40 +0200148 bool status_printed = false;
Mario Six4481a5d2018-08-06 10:23:34 +0200149 int ret;
150
Bin Meng50a132b2023-07-22 00:15:21 +0800151 /*
152 * Not all boards have sysreset drivers available during early
Michal Suchanek32c58c12022-10-10 20:29:40 +0200153 * boot, so don't fail if one can't be found.
154 */
155 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
Bin Meng50a132b2023-07-22 00:15:21 +0800156 ret = uclass_next_device_check(&dev)) {
Michal Suchanek32c58c12022-10-10 20:29:40 +0200157 if (ret) {
158 debug("%s: %s sysreset device (error: %d)\n",
159 __func__, dev->name, ret);
160 continue;
161 }
Mario Six4481a5d2018-08-06 10:23:34 +0200162
Michal Suchanek32c58c12022-10-10 20:29:40 +0200163 if (!sysreset_get_status(dev, status, sizeof(status))) {
164 printf("%s%s", status_printed ? " " : "", status);
165 status_printed = true;
166 }
167 }
168 if (status_printed)
169 printf("\n");
Mario Six4481a5d2018-08-06 10:23:34 +0200170
171 return 0;
172}
173#endif
174
Mario Six97bbb602018-08-06 10:23:41 +0200175#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
176static int print_cpuinfo(void)
177{
178 struct udevice *dev;
179 char desc[512];
180 int ret;
181
Ye Li28abafd2020-05-03 21:58:50 +0800182 dev = cpu_get_current_dev();
183 if (!dev) {
184 debug("%s: Could not get CPU device\n",
185 __func__);
186 return -ENODEV;
Mario Six97bbb602018-08-06 10:23:41 +0200187 }
188
189 ret = cpu_get_desc(dev, desc, sizeof(desc));
190 if (ret) {
191 debug("%s: Could not get CPU description (err = %d)\n",
192 dev->name, ret);
193 return ret;
194 }
195
Bin Mengbe2269f2018-10-10 22:06:55 -0700196 printf("CPU: %s\n", desc);
Mario Six97bbb602018-08-06 10:23:41 +0200197
198 return 0;
199}
200#endif
201
Simon Glassc45e3592013-03-11 06:49:53 +0000202static int announce_dram_init(void)
203{
204 puts("DRAM: ");
205 return 0;
206}
207
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200208/*
209 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
210 * and value in calculated unit scale multiplied by 10 (as fractional fixed
211 * point number with one decimal digit), which is human natural format,
212 * same what uses print_size() function for displaying. Mathematically it is:
213 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
214 *
215 * For example for size=87654321 we calculate scale=20 and val=836 which means
216 * that input has natural human format 83.6 M (mega = 2^20).
217 */
218#define compute_size_scale_val(size, scale, val) do { \
219 scale = ilog2(size) / 10 * 10; \
220 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
221 if (val == 10240) { val = 10; scale += 10; } \
222} while (0)
223
224/*
225 * Check if the sizes in their natural units written in decimal format with
226 * one fraction number are same.
227 */
228static int sizes_near(unsigned long long size1, unsigned long long size2)
229{
230 unsigned int size1_scale, size1_val, size2_scale, size2_val;
231
232 compute_size_scale_val(size1, size1_scale, size1_val);
233 compute_size_scale_val(size2, size2_scale, size2_val);
234
235 return size1_scale == size2_scale && size1_val == size2_val;
236}
237
Simon Glassc45e3592013-03-11 06:49:53 +0000238static int show_dram_config(void)
239{
York Sun60ac15a2014-05-02 17:28:05 -0700240 unsigned long long size;
Simon Glassc45e3592013-03-11 06:49:53 +0000241 int i;
242
243 debug("\nRAM Configuration:\n");
244 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
245 size += gd->bd->bi_dram[i].size;
Bin Mengc8964482015-08-06 01:31:20 -0700246 debug("Bank #%d: %llx ", i,
247 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glassc45e3592013-03-11 06:49:53 +0000248#ifdef DEBUG
249 print_size(gd->bd->bi_dram[i].size, "\n");
250#endif
251 }
252 debug("\nDRAM: ");
Simon Glassc45e3592013-03-11 06:49:53 +0000253
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200254 print_size(gd->ram_size, "");
255 if (!sizes_near(gd->ram_size, size)) {
256 printf(" (effective ");
257 print_size(size, ")");
258 }
Simon Glass50250b52013-03-11 14:30:42 +0000259 board_add_ram_info(0);
260 putc('\n');
Simon Glassc45e3592013-03-11 06:49:53 +0000261
262 return 0;
263}
264
Simon Glass2f949c32017-03-31 08:40:32 -0600265__weak int dram_init_banksize(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000266{
Stefan Roese90cda992020-08-12 13:02:39 +0200267 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000268 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass2f949c32017-03-31 08:40:32 -0600269
270 return 0;
Simon Glassc45e3592013-03-11 06:49:53 +0000271}
272
Tom Rini52b2e262021-08-18 23:12:24 -0400273#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000274static int init_func_i2c(void)
275{
276 puts("I2C: ");
trema6612902013-09-21 18:13:34 +0200277 i2c_init_all();
Simon Glass50250b52013-03-11 14:30:42 +0000278 puts("ready\n");
279 return 0;
280}
281#endif
282
Simon Glassc45e3592013-03-11 06:49:53 +0000283static int setup_mon_len(void)
284{
Stefan Bosch26f51302024-01-26 12:50:55 +0000285#if defined(CONFIG_ARCH_NEXELL)
286 gd->mon_len = (ulong)__bss_end - (ulong)__image_copy_start;
287#elif defined(__ARM__) || defined(__MICROBLAZE__)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800288 gd->mon_len = (ulong)__bss_end - (ulong)_start;
Simon Glass7e9f5882023-01-15 14:15:40 -0700289#elif defined(CONFIG_SANDBOX) && !defined(__riscv)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800290 gd->mon_len = (ulong)_end - (ulong)_init;
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200291#elif defined(CONFIG_SANDBOX)
Simon Glass7e9f5882023-01-15 14:15:40 -0700292 /* gcc does not provide _init in crti.o on RISC-V */
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200293 gd->mon_len = 0;
294#elif defined(CONFIG_EFI_APP)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800295 gd->mon_len = (ulong)_end - (ulong)_init;
Tom Rini210ebce2017-03-14 11:08:10 -0400296#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangf503a522014-07-17 19:01:34 +0800297 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Tom Rini53320122022-04-06 09:21:25 -0400298#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800299 gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
Simon Glass90632bd2016-05-14 18:49:28 -0600300#elif defined(CONFIG_SYS_MONITOR_BASE)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800301 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
302 gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass9c9f44a2013-03-11 07:06:48 +0000303#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000304 return 0;
305}
306
Simon Glasse14f1a22018-11-15 18:44:09 -0700307static int setup_spl_handoff(void)
308{
309#if CONFIG_IS_ENABLED(HANDOFF)
Simon Glass90c1a582022-01-12 19:26:17 -0700310 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
Simon Glasse14f1a22018-11-15 18:44:09 -0700311 sizeof(struct spl_handoff));
312 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
313#endif
314
315 return 0;
316}
317
Simon Glassc45e3592013-03-11 06:49:53 +0000318__weak int arch_cpu_init(void)
319{
320 return 0;
321}
322
Paul Burton1f508dd2016-09-21 11:18:46 +0100323__weak int mach_cpu_init(void)
324{
325 return 0;
326}
327
Simon Glassc45e3592013-03-11 06:49:53 +0000328/* Get the top of usable RAM */
Heinrich Schuchardt51a9aac2023-08-12 20:16:58 +0200329__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
Simon Glassc45e3592013-03-11 06:49:53 +0000330{
Tom Rinibb4dd962022-11-16 13:10:37 -0500331#if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700332 /*
Simon Glass839855c2015-04-28 20:25:03 -0600333 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700334 * 32-bit address space. If so, clip the usable RAM so it doesn't.
335 */
Tom Rinibb4dd962022-11-16 13:10:37 -0500336 if (gd->ram_top < CFG_SYS_SDRAM_BASE)
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700337 /*
338 * Will wrap back to top of 32-bit space when reservations
339 * are made.
340 */
341 return 0;
342#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000343 return gd->ram_top;
344}
345
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300346__weak int arch_setup_dest_addr(void)
347{
348 return 0;
349}
350
Simon Glassc45e3592013-03-11 06:49:53 +0000351static int setup_dest_addr(void)
352{
353 debug("Monitor len: %08lX\n", gd->mon_len);
354 /*
355 * Ram is setup, size stored in gd !!
356 */
Pali Rohárad37d422022-09-09 17:32:41 +0200357 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
Tom Rini5c1e7272022-04-06 10:33:32 -0400358#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Simon Glassc45e3592013-03-11 06:49:53 +0000359 /*
360 * Subtract specified amount of memory to hide so that it won't
361 * get "touched" at all by U-Boot. By fixing up gd->ram_size
362 * the Linux kernel should now get passed the now "corrected"
York Sun4de24ef2017-03-06 09:02:28 -0800363 * memory size and won't touch it either. This should work
364 * for arch/ppc and arch/powerpc. Only Linux board ports in
365 * arch/powerpc with bootwrapper support, that recalculate the
366 * memory size from the SDRAM controller setup will have to
367 * get fixed.
Simon Glassc45e3592013-03-11 06:49:53 +0000368 */
York Sun4de24ef2017-03-06 09:02:28 -0800369 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
370#endif
Tom Rinibb4dd962022-11-16 13:10:37 -0500371#ifdef CFG_SYS_SDRAM_BASE
372 gd->ram_base = CFG_SYS_SDRAM_BASE;
Simon Glassc45e3592013-03-11 06:49:53 +0000373#endif
Siva Durga Prasad Paladugu94a1d522018-07-16 15:56:10 +0530374 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glassc45e3592013-03-11 06:49:53 +0000375 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000376 gd->relocaddr = gd->ram_top;
Pali Rohárad37d422022-09-09 17:32:41 +0200377 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300378
379 return arch_setup_dest_addr();
Simon Glassc45e3592013-03-11 06:49:53 +0000380}
381
Tom Rini0bb9b092022-12-04 10:13:37 -0500382#ifdef CFG_PRAM
Simon Glassc45e3592013-03-11 06:49:53 +0000383/* reserve protected RAM */
384static int reserve_pram(void)
385{
386 ulong reg;
387
Tom Rini0bb9b092022-12-04 10:13:37 -0500388 reg = env_get_ulong("pram", 10, CFG_PRAM);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000389 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glassc45e3592013-03-11 06:49:53 +0000390 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadad1589242013-05-27 00:37:30 +0000391 gd->relocaddr);
Simon Glassc45e3592013-03-11 06:49:53 +0000392 return 0;
393}
Tom Rini0bb9b092022-12-04 10:13:37 -0500394#endif /* CFG_PRAM */
Simon Glassc45e3592013-03-11 06:49:53 +0000395
396/* Round memory pointer down to next 4 kB limit */
397static int reserve_round_4k(void)
398{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000399 gd->relocaddr &= ~(4096 - 1);
Simon Glassc45e3592013-03-11 06:49:53 +0000400 return 0;
401}
402
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300403__weak int arch_reserve_mmu(void)
404{
405 return 0;
406}
407
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530408static int reserve_video_from_videoblob(void)
Simon Glassfce58f52016-01-18 19:52:21 -0700409{
Simon Glass896409c2023-07-30 11:16:05 -0600410 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530411 struct video_handoff *ho;
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530412 int ret = 0;
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530413
414 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
415 if (!ho)
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530416 return log_msg_ret("Missing video bloblist", -ENOENT);
417
418 ret = video_reserve_from_bloblist(ho);
419 if (ret)
420 return log_msg_ret("Invalid Video handoff info", ret);
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530421
422 /* Sanity check fb from blob is before current relocaddr */
423 if (likely(gd->relocaddr > (unsigned long)ho->fb))
424 gd->relocaddr = ho->fb;
425 }
426
427 return 0;
428}
429
430/*
431 * Check if any bloblist received specifying reserved areas from previous stage and adjust
432 * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
433 * from previous stage.
434 *
435 * NOTE:
436 * IT is recommended that all bloblists from previous stage are reserved from ram_top
437 * as next stage will simply start reserving further regions after them.
438 */
439static int setup_relocaddr_from_bloblist(void)
440{
441 reserve_video_from_videoblob();
442
443 return 0;
444}
445
446static int reserve_video(void)
447{
448 if (CONFIG_IS_ENABLED(VIDEO)) {
Simon Glassb24a7d92022-10-16 15:57:41 -0600449 ulong addr;
450 int ret;
Simon Glassfce58f52016-01-18 19:52:21 -0700451
Simon Glassb24a7d92022-10-16 15:57:41 -0600452 addr = gd->relocaddr;
453 ret = video_reserve(&addr);
454 if (ret)
455 return ret;
456 debug("Reserving %luk for video at: %08lx\n",
457 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
458 gd->relocaddr = addr;
459 }
Simon Glass50250b52013-03-11 14:30:42 +0000460
461 return 0;
462}
Simon Glass50250b52013-03-11 14:30:42 +0000463
Simon Glass1008da02016-01-18 19:52:20 -0700464static int reserve_trace(void)
465{
466#ifdef CONFIG_TRACE
467 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
468 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardtc960b142019-06-14 21:52:22 +0200469 debug("Reserving %luk for trace data at: %08lx\n",
470 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass1008da02016-01-18 19:52:20 -0700471#endif
472
473 return 0;
474}
475
Simon Glassc45e3592013-03-11 06:49:53 +0000476static int reserve_uboot(void)
477{
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300478 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
479 /*
480 * reserve memory for U-Boot code, data & bss
481 * round down to next 4 kB limit
482 */
483 gd->relocaddr -= gd->mon_len;
484 gd->relocaddr &= ~(4096 - 1);
485 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
486 /* round down to next 64 kB limit so that IVPR stays aligned */
487 gd->relocaddr &= ~(65536 - 1);
488 #endif
Simon Glassc45e3592013-03-11 06:49:53 +0000489
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300490 debug("Reserving %ldk for U-Boot at: %08lx\n",
491 gd->mon_len >> 10, gd->relocaddr);
492 }
Masahiro Yamadad1589242013-05-27 00:37:30 +0000493
494 gd->start_addr_sp = gd->relocaddr;
495
Simon Glassc45e3592013-03-11 06:49:53 +0000496 return 0;
497}
498
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100499/*
500 * reserve after start_addr_sp the requested size and make the stack pointer
501 * 16-byte aligned, this alignment is needed for cast on the reserved memory
502 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
503 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
504 */
505static unsigned long reserve_stack_aligned(size_t size)
506{
507 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
508}
509
Vikas Manocha4d49e102019-08-16 09:57:44 -0700510#ifdef CONFIG_SYS_NONCACHED_MEMORY
511static int reserve_noncached(void)
512{
Stephen Warren9b496432019-08-27 11:54:31 -0600513 /*
514 * The value of gd->start_addr_sp must match the value of malloc_start
Tom Rinif38167d2022-10-28 20:27:09 -0400515 * calculated in board_r.c:initr_malloc(), which is passed to
516 * dlmalloc.c:mem_malloc_init() and then used by
Stephen Warren9b496432019-08-27 11:54:31 -0600517 * cache.c:noncached_init()
518 *
519 * These calculations must match the code in cache.c:noncached_init()
520 */
521 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
522 MMU_SECTION_SIZE;
523 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
524 MMU_SECTION_SIZE);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700525 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
526 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
527
528 return 0;
529}
530#endif
531
Simon Glassc45e3592013-03-11 06:49:53 +0000532/* reserve memory for malloc() area */
533static int reserve_malloc(void)
534{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100535 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glassc45e3592013-03-11 06:49:53 +0000536 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100537 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700538#ifdef CONFIG_SYS_NONCACHED_MEMORY
539 reserve_noncached();
540#endif
541
Simon Glassc45e3592013-03-11 06:49:53 +0000542 return 0;
543}
544
545/* (permanently) allocate a Board Info struct */
546static int reserve_board(void)
547{
Sonic Zhangf503a522014-07-17 19:01:34 +0800548 if (!gd->bd) {
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900549 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
550 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
551 sizeof(struct bd_info));
552 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangf503a522014-07-17 19:01:34 +0800553 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900554 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangf503a522014-07-17 19:01:34 +0800555 }
Simon Glassc45e3592013-03-11 06:49:53 +0000556 return 0;
557}
558
Simon Glassc45e3592013-03-11 06:49:53 +0000559static int reserve_global_data(void)
560{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100561 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadad1589242013-05-27 00:37:30 +0000562 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glassc45e3592013-03-11 06:49:53 +0000563 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100564 sizeof(gd_t), gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000565 return 0;
566}
567
568static int reserve_fdt(void)
569{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200570 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
571 /*
572 * If the device tree is sitting immediately above our image
573 * then we must relocate it. If it is embedded in the data
574 * section, then it will be relocated with other data.
575 */
576 if (gd->fdt_blob) {
577 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glassc45e3592013-03-11 06:49:53 +0000578
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200579 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
580 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
581 debug("Reserving %lu Bytes for FDT at: %08lx\n",
582 gd->fdt_size, gd->start_addr_sp);
583 }
Simon Glassc45e3592013-03-11 06:49:53 +0000584 }
585
586 return 0;
587}
588
Simon Glassb9aff922017-05-22 05:05:30 -0600589static int reserve_bootstage(void)
590{
591#ifdef CONFIG_BOOTSTAGE
592 int size = bootstage_get_size();
593
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100594 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glassb9aff922017-05-22 05:05:30 -0600595 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
596 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
597 gd->start_addr_sp);
598#endif
599
600 return 0;
601}
602
Patrick Delaunaya0a2b212018-03-13 13:57:00 +0100603__weak int arch_reserve_stacks(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000604{
Andreas Bießmann25429862015-02-06 23:06:45 +0100605 return 0;
606}
Simon Glass4d2aee82013-03-05 14:39:45 +0000607
Andreas Bießmann25429862015-02-06 23:06:45 +0100608static int reserve_stacks(void)
609{
610 /* make stack pointer 16-byte aligned */
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100611 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glassc45e3592013-03-11 06:49:53 +0000612
613 /*
Simon Glass839855c2015-04-28 20:25:03 -0600614 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann25429862015-02-06 23:06:45 +0100615 * gd->irq_sp
Simon Glassc45e3592013-03-11 06:49:53 +0000616 */
Andreas Bießmann25429862015-02-06 23:06:45 +0100617 return arch_reserve_stacks();
Simon Glassc45e3592013-03-11 06:49:53 +0000618}
619
Simon Glassa815dab2018-11-15 18:43:52 -0700620static int reserve_bloblist(void)
621{
622#ifdef CONFIG_BLOBLIST
Simon Glass9e945052020-09-27 18:46:18 -0600623 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glassab7e7462021-01-13 20:29:43 -0700624 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
625 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
626 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
627 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassa815dab2018-11-15 18:43:52 -0700628#endif
629
630 return 0;
631}
632
Simon Glassc45e3592013-03-11 06:49:53 +0000633static int display_new_sp(void)
634{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000635 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000636
637 return 0;
638}
639
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300640__weak int arch_setup_bdinfo(void)
Ovidiu Panait0c5e9a02020-07-24 14:12:14 +0300641{
642 return 0;
643}
644
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300645int setup_bdinfo(void)
646{
Ovidiu Panaita5855882020-07-24 14:12:16 +0300647 struct bd_info *bd = gd->bd;
648
Ovidiu Panait5fc60602020-07-24 14:12:17 +0300649 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
650 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
651 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
652 }
653
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300654 return arch_setup_bdinfo();
655}
656
Simon Glassc45e3592013-03-11 06:49:53 +0000657#ifdef CONFIG_POST
658static int init_post(void)
659{
660 post_bootmode_init();
661 post_run(NULL, POST_ROM | post_bootmode_get(0));
662
663 return 0;
664}
665#endif
666
Simon Glassc45e3592013-03-11 06:49:53 +0000667static int reloc_fdt(void)
668{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200669 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200670 if (gd->new_fdt) {
671 memcpy(gd->new_fdt, gd->fdt_blob,
672 fdt_totalsize(gd->fdt_blob));
673 gd->fdt_blob = gd->new_fdt;
674 }
Simon Glassc45e3592013-03-11 06:49:53 +0000675 }
676
677 return 0;
678}
679
Simon Glassb9aff922017-05-22 05:05:30 -0600680static int reloc_bootstage(void)
681{
682#ifdef CONFIG_BOOTSTAGE
683 if (gd->flags & GD_FLG_SKIP_RELOC)
684 return 0;
685 if (gd->new_bootstage) {
686 int size = bootstage_get_size();
687
688 debug("Copying bootstage from %p to %p, size %x\n",
689 gd->bootstage, gd->new_bootstage, size);
690 memcpy(gd->new_bootstage, gd->bootstage, size);
691 gd->bootstage = gd->new_bootstage;
Simon Glass39d58522019-10-21 17:26:50 -0600692 bootstage_relocate();
Simon Glassb9aff922017-05-22 05:05:30 -0600693 }
694#endif
695
696 return 0;
697}
698
Simon Glassa815dab2018-11-15 18:43:52 -0700699static int reloc_bloblist(void)
700{
701#ifdef CONFIG_BLOBLIST
Simon Glass5d2199d2021-11-03 21:09:20 -0600702 /*
703 * Relocate only if we are supposed to send it
704 */
705 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
706 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
707 debug("Not relocating bloblist\n");
Simon Glassa815dab2018-11-15 18:43:52 -0700708 return 0;
Simon Glass5d2199d2021-11-03 21:09:20 -0600709 }
Simon Glassa815dab2018-11-15 18:43:52 -0700710 if (gd->new_bloblist) {
Simon Glassa815dab2018-11-15 18:43:52 -0700711 debug("Copying bloblist from %p to %p, size %x\n",
Raymond Mao1a99d2c2024-02-03 08:36:22 -0800712 gd->bloblist, gd->new_bloblist, gd->bloblist->total_size);
713 return bloblist_reloc(gd->new_bloblist,
714 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassa815dab2018-11-15 18:43:52 -0700715 }
716#endif
717
718 return 0;
719}
720
Eugene Urieve84d69a2024-03-31 23:03:25 +0300721void mcheck_on_ramrelocation(size_t offset);
Simon Glassc45e3592013-03-11 06:49:53 +0000722static int setup_reloc(void)
723{
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100724 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Simon Glass72cc5382022-10-20 18:22:39 -0600725#ifdef CONFIG_TEXT_BASE
Lothar Waßmann160583b2017-06-08 10:18:25 +0200726#ifdef ARM
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100727 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Michal Simekf942ebb2022-06-24 14:15:01 +0200728#elif defined(CONFIG_MICROBLAZE)
729 gd->reloc_off = gd->relocaddr - (u32)_start;
Lothar Waßmann160583b2017-06-08 10:18:25 +0200730#elif defined(CONFIG_M68K)
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100731 /*
732 * On all ColdFire arch cpu, monitor code starts always
733 * just after the default vector table location, so at 0x400
734 */
Simon Glass72cc5382022-10-20 18:22:39 -0600735 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
Simon Glass752707a2019-04-08 13:20:41 -0600736#elif !defined(CONFIG_SANDBOX)
Simon Glass72cc5382022-10-20 18:22:39 -0600737 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
angelo@sysam.itf245ae92015-02-12 01:40:17 +0100738#endif
Sonic Zhangf503a522014-07-17 19:01:34 +0800739#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100740 }
741
Simon Glassc45e3592013-03-11 06:49:53 +0000742 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
743
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100744 if (gd->flags & GD_FLG_SKIP_RELOC) {
745 debug("Skipping relocation due to flag\n");
746 } else {
Eugene Urieve84d69a2024-03-31 23:03:25 +0300747#ifdef MCHECK_HEAP_PROTECTION
748 mcheck_on_ramrelocation(gd->reloc_off);
749#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100750 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
751 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
752 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
753 gd->start_addr_sp);
754 }
Simon Glassc45e3592013-03-11 06:49:53 +0000755
756 return 0;
757}
758
mario.six@gdsys.cc7e9b9d62017-02-22 16:07:22 +0100759#ifdef CONFIG_OF_BOARD_FIXUP
760static int fix_fdt(void)
761{
762 return board_fix_fdt((void *)gd->fdt_blob);
763}
764#endif
765
Simon Glassc45e3592013-03-11 06:49:53 +0000766/* ARM calls relocate_code from its crt0.S */
Simon Glasse6b03502023-07-15 21:38:52 -0600767#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glassc45e3592013-03-11 06:49:53 +0000768
769static int jump_to_copy(void)
770{
Simon Glass00dd17a2015-08-04 12:33:39 -0600771 if (gd->flags & GD_FLG_SKIP_RELOC)
772 return 0;
Simon Glass6d179872013-03-05 14:39:52 +0000773 /*
774 * x86 is special, but in a nice way. It uses a trampoline which
775 * enables the dcache if possible.
776 *
777 * For now, other archs use relocate_code(), which is implemented
778 * similarly for all archs. When we do generic relocation, hopefully
779 * we can make all archs enable the dcache prior to relocation.
780 */
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300781#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +0000782 /*
783 * SDRAM and console are now initialised. The final stack can now
784 * be setup in SDRAM. Code execution will continue in Flash, but
785 * with the stack in SDRAM and Global Data in temporary memory
786 * (CPU cache)
787 */
Simon Glass0e27b872015-08-10 20:44:32 -0600788 arch_setup_gd(gd->new_gd);
Simon Glasse6b03502023-07-15 21:38:52 -0600789# if CONFIG_IS_ENABLED(X86_64)
790 board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
791# else
792 board_init_f_r_trampoline(gd->start_addr_sp);
793# endif
Simon Glass6d179872013-03-05 14:39:52 +0000794#else
Masahiro Yamadad1589242013-05-27 00:37:30 +0000795 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +0000796#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000797
798 return 0;
799}
800#endif
801
802/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glass88200332017-05-22 05:05:25 -0600803static int initf_bootstage(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000804{
Simon Glassc55d5c32017-06-07 10:28:46 -0600805 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
806 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glass88200332017-05-22 05:05:25 -0600807 int ret;
808
Simon Glass01154cb2017-05-22 05:05:35 -0600809 ret = bootstage_init(!from_spl);
Simon Glass88200332017-05-22 05:05:25 -0600810 if (ret)
811 return ret;
Simon Glass01154cb2017-05-22 05:05:35 -0600812 if (from_spl) {
813 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
814 CONFIG_BOOTSTAGE_STASH_SIZE);
815
816 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
817 if (ret && ret != -ENOENT) {
818 debug("Failed to unstash bootstage: err=%d\n", ret);
819 return ret;
820 }
821 }
Simon Glass88200332017-05-22 05:05:25 -0600822
Simon Glassc45e3592013-03-11 06:49:53 +0000823 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
824
825 return 0;
826}
827
Simon Glassa730c5d2014-07-23 06:55:04 -0600828static int initf_dm(void)
829{
Simon Glassadad2d02023-09-26 08:14:27 -0600830#if defined(CONFIG_DM) && CONFIG_IS_ENABLED(SYS_MALLOC_F)
Simon Glassa730c5d2014-07-23 06:55:04 -0600831 int ret;
832
Simon Glassea6a6092020-05-10 11:39:59 -0600833 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassa730c5d2014-07-23 06:55:04 -0600834 ret = dm_init_and_scan(true);
Simon Glassea6a6092020-05-10 11:39:59 -0600835 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassa730c5d2014-07-23 06:55:04 -0600836 if (ret)
837 return ret;
Ovidiu Panait525a2ec2020-11-28 10:43:05 +0200838
839 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
840 ret = dm_timer_init();
841 if (ret)
842 return ret;
843 }
Simon Glass8e4f80f2016-02-24 09:14:50 -0700844#endif
Simon Glassa730c5d2014-07-23 06:55:04 -0600845
846 return 0;
847}
848
Simon Glass5ded7e52015-01-19 22:16:12 -0700849/* Architecture-specific memory reservation */
850__weak int reserve_arch(void)
851{
852 return 0;
853}
854
Ovidiu Panait8e0319f2020-01-22 22:28:25 +0200855__weak int checkcpu(void)
856{
857 return 0;
858}
859
Ovidiu Panaitc508b272020-02-05 08:54:42 +0200860__weak int clear_bss(void)
861{
862 return 0;
863}
864
Simon Glass2031fad2017-01-16 07:03:50 -0700865static const init_fnc_t init_sequence_f[] = {
Simon Glassc45e3592013-03-11 06:49:53 +0000866 setup_mon_len,
Simon Glass26b78b22015-02-27 22:06:34 -0700867#ifdef CONFIG_OF_CONTROL
Simon Glassa0877672015-02-27 22:06:35 -0700868 fdtdec_setup,
Simon Glass26b78b22015-02-27 22:06:34 -0700869#endif
Heinrich Schuchardt2aecfc52019-06-02 00:53:24 +0200870#ifdef CONFIG_TRACE_EARLY
Simon Glass209a1a62013-06-11 11:14:42 -0700871 trace_early_init,
Kevin Hilman676f0192014-12-09 15:03:58 -0800872#endif
Simon Glasscfcb8862014-11-10 18:00:18 -0700873 initf_malloc,
Simon Glass55e32ba2017-12-04 13:48:28 -0700874 log_init,
Simon Glasse635af12017-05-22 05:05:31 -0600875 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glass4f542532022-03-04 08:43:02 -0700876 event_init,
Simon Glassa28f39c2023-09-26 08:14:51 -0600877 bloblist_maybe_init,
Simon Glasse14f1a22018-11-15 18:44:09 -0700878 setup_spl_handoff,
Ovidiu Panait85a31ac2020-11-28 10:43:04 +0200879#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
880 console_record_init,
881#endif
Simon Glassfcebb7b2023-08-21 21:16:59 -0600882 INITCALL_EVENT(EVT_FSP_INIT_F),
Simon Glassc45e3592013-03-11 06:49:53 +0000883 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton1f508dd2016-09-21 11:18:46 +0100884 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass6df5de22014-09-03 17:36:59 -0600885 initf_dm,
Simon Glassc45e3592013-03-11 06:49:53 +0000886#if defined(CONFIG_BOARD_EARLY_INIT_F)
887 board_early_init_f,
888#endif
Simon Glass6829d8c2017-03-28 10:27:26 -0600889#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glass70064a72017-03-28 10:27:19 -0600890 /* get CPU and bus clocks according to the environment variable */
Simon Glass50250b52013-03-11 14:30:42 +0000891 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glasse8d20d42017-03-28 10:27:23 -0600892#endif
Marek Vasut4c77f062023-03-23 01:20:40 +0100893#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
Simon Glassc45e3592013-03-11 06:49:53 +0000894 timer_init, /* initialize timer */
Angelo Dureghellocd226852017-05-10 23:58:06 +0200895#endif
Simon Glass50250b52013-03-11 14:30:42 +0000896#if defined(CONFIG_BOARD_POSTCLK_INIT)
897 board_postclk_init,
898#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000899 env_init, /* initialize environment */
900 init_baud_rate, /* initialze baudrate settings */
901 serial_init, /* serial communications setup */
902 console_init_f, /* stage 1 init of console */
903 display_options, /* say that we are here */
904 display_text_info, /* show debugging info if required */
Simon Glass50250b52013-03-11 14:30:42 +0000905 checkcpu,
Mario Six4481a5d2018-08-06 10:23:34 +0200906#if defined(CONFIG_SYSRESET)
907 print_resetinfo,
908#endif
Simon Glass68c1d012017-01-23 13:31:25 -0700909#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glassc45e3592013-03-11 06:49:53 +0000910 print_cpuinfo, /* display cpu info (and speed) */
Simon Glass68c1d012017-01-23 13:31:25 -0700911#endif
Cooper Jr., Franklind8b354a2017-06-16 17:25:12 -0500912#if defined(CONFIG_DTB_RESELECT)
913 embedded_dtb_select,
914#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000915#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada9607f7a2015-01-14 17:07:05 +0900916 show_board_info,
Simon Glassc45e3592013-03-11 06:49:53 +0000917#endif
Simon Glass50250b52013-03-11 14:30:42 +0000918 INIT_FUNC_WATCHDOG_INIT
Simon Glass6b42d382023-08-21 21:16:54 -0600919 INITCALL_EVENT(EVT_MISC_INIT_F),
Simon Glass50250b52013-03-11 14:30:42 +0000920 INIT_FUNC_WATCHDOG_RESET
Tom Rini52b2e262021-08-18 23:12:24 -0400921#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000922 init_func_i2c,
923#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000924 announce_dram_init,
Simon Glassc45e3592013-03-11 06:49:53 +0000925 dram_init, /* configure available RAM banks */
Simon Glass50250b52013-03-11 14:30:42 +0000926#ifdef CONFIG_POST
927 post_init_f,
928#endif
929 INIT_FUNC_WATCHDOG_RESET
Tom Rini6a5dccc2022-11-16 13:10:41 -0500930#if defined(CFG_SYS_DRAM_TEST)
Simon Glass50250b52013-03-11 14:30:42 +0000931 testdram,
Tom Rini6a5dccc2022-11-16 13:10:41 -0500932#endif /* CFG_SYS_DRAM_TEST */
Simon Glass50250b52013-03-11 14:30:42 +0000933 INIT_FUNC_WATCHDOG_RESET
934
Simon Glassc45e3592013-03-11 06:49:53 +0000935#ifdef CONFIG_POST
936 init_post,
937#endif
Simon Glass50250b52013-03-11 14:30:42 +0000938 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000939 /*
940 * Now that we have DRAM mapped and working, we can
941 * relocate the code and continue running from DRAM.
942 *
943 * Reserve memory at end of RAM for (top down in that order):
944 * - area that won't get touched by U-Boot and Linux (optional)
945 * - kernel log buffer
946 * - protected RAM
947 * - LCD framebuffer
948 * - monitor code
949 * - board info struct
950 */
951 setup_dest_addr,
Pragnesh Patelad51fec2020-08-13 10:12:26 +0530952#ifdef CONFIG_OF_BOARD_FIXUP
953 fix_fdt,
954#endif
Tom Rini0bb9b092022-12-04 10:13:37 -0500955#ifdef CFG_PRAM
Simon Glassc45e3592013-03-11 06:49:53 +0000956 reserve_pram,
957#endif
958 reserve_round_4k,
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530959 setup_relocaddr_from_bloblist,
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300960 arch_reserve_mmu,
Simon Glassfce58f52016-01-18 19:52:21 -0700961 reserve_video,
Simon Glass1008da02016-01-18 19:52:20 -0700962 reserve_trace,
Simon Glassc45e3592013-03-11 06:49:53 +0000963 reserve_uboot,
964 reserve_malloc,
965 reserve_board,
Simon Glassc45e3592013-03-11 06:49:53 +0000966 reserve_global_data,
967 reserve_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600968 reserve_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700969 reserve_bloblist,
Simon Glass5ded7e52015-01-19 22:16:12 -0700970 reserve_arch,
Simon Glassc45e3592013-03-11 06:49:53 +0000971 reserve_stacks,
Simon Glass2f949c32017-03-31 08:40:32 -0600972 dram_init_banksize,
Simon Glassc45e3592013-03-11 06:49:53 +0000973 show_dram_config,
Simon Glass50250b52013-03-11 14:30:42 +0000974 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait6183c8d2020-07-24 14:12:20 +0300975 setup_bdinfo,
Simon Glassc45e3592013-03-11 06:49:53 +0000976 display_new_sp,
Simon Glass50250b52013-03-11 14:30:42 +0000977 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000978 reloc_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600979 reloc_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700980 reloc_bloblist,
Simon Glassc45e3592013-03-11 06:49:53 +0000981 setup_reloc,
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300982#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glassd50b2f42015-01-01 16:18:09 -0700983 copy_uboot_to_ram,
Simon Glassd50b2f42015-01-01 16:18:09 -0700984 do_elf_reloc_fixups,
985#endif
Chris Zankel41e37372016-08-10 18:36:43 +0300986 clear_bss,
Rasmus Villemoesc794e492022-10-28 13:50:54 +0200987 /*
988 * Deregister all cyclic functions before relocation, so that
989 * gd->cyclic_list does not contain any references to pre-relocation
990 * devices. Drivers will register their cyclic functions anew when the
991 * devices are probed again.
992 *
993 * This should happen as late as possible so that the window where a
994 * watchdog device is not serviced is as small as possible.
995 */
996 cyclic_unregister_all,
Simon Glasse6b03502023-07-15 21:38:52 -0600997#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glassc45e3592013-03-11 06:49:53 +0000998 jump_to_copy,
999#endif
1000 NULL,
1001};
1002
1003void board_init_f(ulong boot_flags)
1004{
Simon Glassc45e3592013-03-11 06:49:53 +00001005 gd->flags = boot_flags;
Alexey Brodkin07236912013-11-27 22:32:40 +04001006 gd->have_console = 0;
Simon Glassc45e3592013-03-11 06:49:53 +00001007
1008 if (initcall_run_list(init_sequence_f))
1009 hang();
1010
Ben Stoltz1930e8d2015-07-31 09:31:37 -06001011#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkinc157ab92015-12-16 19:24:10 +03001012 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1013 !defined(CONFIG_ARC)
Simon Glassc45e3592013-03-11 06:49:53 +00001014 /* NOTREACHED - jump_to_copy() does not return */
1015 hang();
1016#endif
1017}
Simon Glass6d179872013-03-05 14:39:52 +00001018
Alexey Brodkin913e9f02015-02-24 19:40:36 +03001019#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +00001020/*
1021 * For now this code is only used on x86.
1022 *
1023 * init_sequence_f_r is the list of init functions which are run when
1024 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1025 * The following limitations must be considered when implementing an
1026 * '_f_r' function:
1027 * - 'static' variables are read-only
1028 * - Global Data (gd->xxx) is read/write
1029 *
1030 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1031 * supported). It _should_, if possible, copy global data to RAM and
1032 * initialise the CPU caches (to speed up the relocation process)
1033 *
1034 * NOTE: At present only x86 uses this route, but it is intended that
1035 * all archs will move to this when generic relocation is implemented.
1036 */
Simon Glass2031fad2017-01-16 07:03:50 -07001037static const init_fnc_t init_sequence_f_r[] = {
Simon Glass6e1a81a2017-01-16 07:03:49 -07001038#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass6d179872013-03-05 14:39:52 +00001039 init_cache_f_r,
Simon Glass6e1a81a2017-01-16 07:03:49 -07001040#endif
Simon Glass6d179872013-03-05 14:39:52 +00001041
1042 NULL,
1043};
1044
1045void board_init_f_r(void)
1046{
1047 if (initcall_run_list(init_sequence_f_r))
1048 hang();
1049
1050 /*
Simon Glass51f73f12016-03-11 22:06:51 -07001051 * The pre-relocation drivers may be using memory that has now gone
1052 * away. Mark serial as unavailable - this will fall back to the debug
1053 * UART if available.
Simon Glass55e32ba2017-12-04 13:48:28 -07001054 *
1055 * Do the same with log drivers since the memory may not be available.
Simon Glass51f73f12016-03-11 22:06:51 -07001056 */
Simon Glass55e32ba2017-12-04 13:48:28 -07001057 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glassb77fe1f2017-09-05 19:49:45 -06001058#ifdef CONFIG_TIMER
1059 gd->timer = NULL;
1060#endif
Simon Glass51f73f12016-03-11 22:06:51 -07001061
1062 /*
Simon Glass6d179872013-03-05 14:39:52 +00001063 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1064 * Transfer execution from Flash to RAM by calculating the address
1065 * of the in-RAM copy of board_init_r() and calling it
1066 */
Alexey Brodkin9c832f12015-02-25 17:59:02 +03001067 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +00001068
1069 /* NOTREACHED - board_init_r() does not return */
1070 hang();
1071}
Alexey Brodkin73503182015-03-24 11:12:47 +03001072#endif /* CONFIG_X86 */