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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Tom Warren7b5002e2015-07-17 08:12:51 -070025 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070026 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070027 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070028 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060029 select DM_KEYBOARD
Simon Glass46fcfc12015-11-19 20:27:02 -070030 select DM_PCI
Simon Glasseca7b0d2015-11-26 19:51:30 -070031 select DM_PCI_COMPAT
Simon Glassd8af3c92016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren8c29e652015-11-23 10:32:01 -070033 select DM_SERIAL
34 select DM_SPI
35 select DM_SPI_FLASH
36 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070037 select VIDCONSOLE_AS_LCD if DM_VIDEO
Stephen Warren8c29e652015-11-23 10:32:01 -070038
39config TEGRA_ARMV7_COMMON
40 bool "Tegra 32-bit common options"
41 select CPU_V7
42 select SPL
43 select SUPPORT_SPL
44 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060045 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070046
47config TEGRA_ARMV8_COMMON
48 bool "Tegra 64-bit common options"
49 select ARM64
50 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070051
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090052choice
53 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050054 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090055
56config TEGRA20
57 bool "Tegra20 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070058 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090059
60config TEGRA30
61 bool "Tegra30 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070062 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090063
64config TEGRA114
65 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070066 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090067
68config TEGRA124
69 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070070 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090071
Tom Warrenab0cc6b2015-03-04 16:36:00 -070072config TEGRA210
73 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -060074 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070075 select TEGRA_ARMV8_COMMON
Tom Warrenab0cc6b2015-03-04 16:36:00 -070076
Stephen Warren03667eb2016-05-12 13:32:55 -060077config TEGRA186
78 bool "Tegra186 family"
Stephen Warrene8e3f202016-08-08 11:28:24 -060079 select CLK
Stephen Warrene0e2b262016-06-17 09:43:57 -060080 select DM_MAILBOX
Stephen Warrenfccc9c52016-08-08 11:28:25 -060081 select DM_RESET
Stephen Warrena2148922016-08-08 09:41:34 -060082 select MISC
83 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -060084 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -060085 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -060086 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -060087 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -060088 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -060089 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -060090
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090091endchoice
92
Stephen Warren5a44ab42016-01-26 10:59:42 -070093config TEGRA_DISCONNECT_UDC_ON_BOOT
94 bool "Disconnect USB device mode controller on boot"
95 default y
96 help
97 When loading U-Boot into RAM over USB protocols using tools such as
98 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
99 mode controller is initialized and enumerated by the host PC running
100 the tool. Unfortunately, these tools do not shut down the USB
101 controller before executing the downloaded code, and so the host PC
102 does not "de-enumerate" the USB device. This option shuts down the
103 USB controller when U-Boot boots to avoid leaving a stale USB device
104 present.
105
Simon Glass838723b2015-02-11 16:32:59 -0700106config SYS_MALLOC_F_LEN
107 default 0x1800
108
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900109source "arch/arm/mach-tegra/tegra20/Kconfig"
110source "arch/arm/mach-tegra/tegra30/Kconfig"
111source "arch/arm/mach-tegra/tegra114/Kconfig"
112source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700113source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600114source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900115
116endif