Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 2 | /* |
3 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 4 | */ |
5 | |||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 6 | #ifndef _MALTA_CONFIG_H |
7 | #define _MALTA_CONFIG_H | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 8 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | /* |
10 | * System configuration | ||||
11 | */ | ||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 12 | #define CONFIG_MALTA |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 13 | |
Gabor Juhos | 5e19515 | 2013-10-24 14:32:00 +0200 | [diff] [blame] | 14 | #define CONFIG_MEMSIZE_IN_BYTES |
15 | |||||
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 16 | #define CONFIG_PCI_GT64120 |
Paul Burton | 234882c | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 17 | #define CONFIG_PCI_MSC01 |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 18 | |
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 |
20 | |||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 21 | /* |
22 | * CPU Configuration | ||||
23 | */ | ||||
24 | #define CONFIG_SYS_MHZ 250 /* arbitrary value */ | ||||
25 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 26 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 27 | /* |
28 | * Memory map | ||||
29 | */ | ||||
Gabor Juhos | c1df370 | 2013-11-12 16:47:32 +0100 | [diff] [blame] | 30 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 31 | |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 32 | #ifdef CONFIG_64BIT |
33 | # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 | ||||
34 | #else | ||||
35 | # define CONFIG_SYS_SDRAM_BASE 0x80000000 | ||||
36 | #endif | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 37 | #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) |
38 | |||||
39 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 | ||||
40 | |||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 41 | #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) |
Paul Burton | 657b935 | 2013-11-26 17:45:28 +0000 | [diff] [blame] | 42 | #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 43 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 44 | /* |
45 | * Serial driver | ||||
46 | */ | ||||
Paul Burton | 58ce2cc | 2016-05-17 07:43:27 +0100 | [diff] [blame] | 47 | #define CONFIG_SYS_NS16550_PORT_MAPPED |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 48 | |
49 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 50 | * Flash configuration |
51 | */ | ||||
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 52 | #ifdef CONFIG_64BIT |
53 | # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 | ||||
54 | #else | ||||
55 | # define CONFIG_SYS_FLASH_BASE 0xbe000000 | ||||
56 | #endif | ||||
Gabor Juhos | 2c43477 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 57 | #define CONFIG_SYS_MAX_FLASH_SECT 128 |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 58 | |
59 | /* | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 60 | * Environment |
61 | */ | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 62 | |
63 | /* | ||||
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 64 | * IDE/ATA |
65 | */ | ||||
66 | #define CONFIG_SYS_IDE_MAXBUS 1 | ||||
67 | #define CONFIG_SYS_IDE_MAXDEVICE 2 | ||||
68 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS | ||||
69 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 | ||||
70 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 | ||||
71 | #define CONFIG_SYS_ATA_REG_OFFSET 0 | ||||
72 | |||||
73 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 74 | * Commands |
75 | */ | ||||
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 76 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 77 | #endif /* _MALTA_CONFIG_H */ |