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Gabor Juhos02c754a2013-05-22 03:57:37 +00001/*
2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3 *
Tom Rinifba23012013-07-24 09:34:30 -04004 * SPDX-License-Identifier: GPL-2.0
Gabor Juhos02c754a2013-05-22 03:57:37 +00005 */
6
Paul Burton10a74b52013-11-09 10:22:08 +00007#ifndef _MALTA_CONFIG_H
8#define _MALTA_CONFIG_H
Gabor Juhos02c754a2013-05-22 03:57:37 +00009
Gabor Juhos02c754a2013-05-22 03:57:37 +000010/*
11 * System configuration
12 */
Paul Burton10a74b52013-11-09 10:22:08 +000013#define CONFIG_MALTA
Paul Burtonc2150342014-04-07 10:11:23 +010014#define CONFIG_BOARD_EARLY_INIT_F
15#define CONFIG_DISPLAY_BOARDINFO
Gabor Juhos02c754a2013-05-22 03:57:37 +000016
Gabor Juhos5e195152013-10-24 14:32:00 +020017#define CONFIG_MEMSIZE_IN_BYTES
18
Gabor Juhos652ccee2013-05-22 03:57:42 +000019#define CONFIG_PCI
20#define CONFIG_PCI_GT64120
Paul Burton234882c2013-11-08 11:18:50 +000021#define CONFIG_PCI_MSC01
Gabor Juhos652ccee2013-05-22 03:57:42 +000022#define CONFIG_PCI_PNP
Gabor Juhos439c50c2013-05-22 03:57:44 +000023#define CONFIG_PCNET
Paul Burtonf38eea62013-11-08 11:18:52 +000024#define CONFIG_PCNET_79C973
25#define PCNET_HAS_PROM
Gabor Juhos652ccee2013-05-22 03:57:42 +000026
Paul Burtonc028f9b2013-11-08 11:18:55 +000027#define CONFIG_MISC_INIT_R
28#define CONFIG_RTC_MC146818
29#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
30
Gabor Juhos02c754a2013-05-22 03:57:37 +000031/*
32 * CPU Configuration
33 */
34#define CONFIG_SYS_MHZ 250 /* arbitrary value */
35#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos02c754a2013-05-22 03:57:37 +000036
Gabor Juhos02c754a2013-05-22 03:57:37 +000037/*
38 * Memory map
39 */
Gabor Juhosc1df3702013-11-12 16:47:32 +010040#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos02c754a2013-05-22 03:57:37 +000041
Paul Burton825cfbd2016-05-26 14:49:36 +010042#ifdef CONFIG_64BIT
43# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
44#else
45# define CONFIG_SYS_SDRAM_BASE 0x80000000
46#endif
Gabor Juhos02c754a2013-05-22 03:57:37 +000047#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
48
49#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
50
Paul Burton825cfbd2016-05-26 14:49:36 +010051#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
52#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
53#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
Gabor Juhos02c754a2013-05-22 03:57:37 +000054
55#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
56#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton657b9352013-11-26 17:45:28 +000057#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos02c754a2013-05-22 03:57:37 +000058
Gabor Juhos02c754a2013-05-22 03:57:37 +000059#define CONFIG_SYS_CBSIZE 256
60#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
61 sizeof(CONFIG_SYS_PROMPT) + 16)
62#define CONFIG_SYS_MAXARGS 16
63
64#define CONFIG_AUTO_COMPLETE
65#define CONFIG_CMDLINE_EDITING
66
67/*
68 * Serial driver
69 */
70#define CONFIG_BAUDRATE 115200
Paul Burton58ce2cc2016-05-17 07:43:27 +010071#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos02c754a2013-05-22 03:57:37 +000072
73/*
Gabor Juhos02c754a2013-05-22 03:57:37 +000074 * Flash configuration
75 */
Paul Burton825cfbd2016-05-26 14:49:36 +010076#ifdef CONFIG_64BIT
77# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
78#else
79# define CONFIG_SYS_FLASH_BASE 0xbe000000
80#endif
Gabor Juhos2c434772013-05-22 03:57:39 +000081#define CONFIG_SYS_MAX_FLASH_BANKS 1
82#define CONFIG_SYS_MAX_FLASH_SECT 128
83#define CONFIG_SYS_FLASH_CFI
84#define CONFIG_FLASH_CFI_DRIVER
85#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos02c754a2013-05-22 03:57:37 +000086
87/*
Paul Burton60465222013-11-08 11:18:56 +000088 * Environment
89 */
90#define CONFIG_ENV_IS_IN_FLASH
91#define CONFIG_ENV_SECT_SIZE 0x20000
92#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
93#define CONFIG_ENV_ADDR \
94 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
95
96/*
Paul Burtonc6c38532015-01-29 10:38:20 +000097 * IDE/ATA
98 */
99#define CONFIG_SYS_IDE_MAXBUS 1
100#define CONFIG_SYS_IDE_MAXDEVICE 2
101#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
102#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
103#define CONFIG_SYS_ATA_DATA_OFFSET 0
104#define CONFIG_SYS_ATA_REG_OFFSET 0
105
106/*
Gabor Juhos02c754a2013-05-22 03:57:37 +0000107 * Commands
108 */
Paul Burtonc028f9b2013-11-08 11:18:55 +0000109#define CONFIG_CMD_DATE
Paul Burtonc6c38532015-01-29 10:38:20 +0000110#define CONFIG_CMD_IDE
Gabor Juhos652ccee2013-05-22 03:57:42 +0000111#define CONFIG_CMD_PCI
112
Gabor Juhos02c754a2013-05-22 03:57:37 +0000113#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
114
Paul Burton10a74b52013-11-09 10:22:08 +0000115#endif /* _MALTA_CONFIG_H */