Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> |
| 3 | * |
Tom Rini | fba2301 | 2013-07-24 09:34:30 -0400 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 7 | #ifndef _MALTA_CONFIG_H |
| 8 | #define _MALTA_CONFIG_H |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | |
| 10 | #include <asm/addrspace.h> |
| 11 | #include <asm/malta.h> |
| 12 | |
| 13 | /* |
| 14 | * System configuration |
| 15 | */ |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 16 | #define CONFIG_MALTA |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 17 | |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 18 | #define CONFIG_PCI |
| 19 | #define CONFIG_PCI_GT64120 |
Paul Burton | 234882c | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 20 | #define CONFIG_PCI_MSC01 |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 21 | #define CONFIG_PCI_PNP |
Gabor Juhos | 439c50c | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 22 | #define CONFIG_PCNET |
Paul Burton | f38eea6 | 2013-11-08 11:18:52 +0000 | [diff] [blame] | 23 | #define CONFIG_PCNET_79C973 |
| 24 | #define PCNET_HAS_PROM |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 25 | |
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame^] | 26 | #define CONFIG_MISC_INIT_R |
| 27 | #define CONFIG_RTC_MC146818 |
| 28 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 |
| 29 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 30 | /* |
| 31 | * CPU Configuration |
| 32 | */ |
| 33 | #define CONFIG_SYS_MHZ 250 /* arbitrary value */ |
| 34 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 35 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 36 | #define CONFIG_SWAP_IO_SPACE |
| 37 | |
| 38 | /* |
| 39 | * Memory map |
| 40 | */ |
| 41 | #define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */ |
Gabor Juhos | 2c43477 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 42 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 43 | |
| 44 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ |
| 45 | #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) |
| 46 | |
| 47 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
| 48 | |
| 49 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 |
| 50 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
| 51 | #define CONFIG_SYS_MEMTEST_END 0x80800000 |
| 52 | |
| 53 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| 54 | #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) |
| 55 | |
| 56 | /* |
| 57 | * Console configuration |
| 58 | */ |
| 59 | #if defined(CONFIG_SYS_LITTLE_ENDIAN) |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 60 | #define CONFIG_SYS_PROMPT "maltael # " |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 61 | #else |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 62 | #define CONFIG_SYS_PROMPT "malta # " |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 63 | #endif |
| 64 | |
| 65 | #define CONFIG_SYS_CBSIZE 256 |
| 66 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 67 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 68 | #define CONFIG_SYS_MAXARGS 16 |
| 69 | |
| 70 | #define CONFIG_AUTO_COMPLETE |
| 71 | #define CONFIG_CMDLINE_EDITING |
| 72 | |
| 73 | /* |
| 74 | * Serial driver |
| 75 | */ |
| 76 | #define CONFIG_BAUDRATE 115200 |
| 77 | |
| 78 | #define CONFIG_SYS_NS16550 |
| 79 | #define CONFIG_SYS_NS16550_SERIAL |
| 80 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 81 | #define CONFIG_SYS_NS16550_CLK 115200 |
Paul Burton | 234882c | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 82 | #define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE) |
| 83 | #define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE) |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 84 | #define CONFIG_CONS_INDEX 1 |
| 85 | |
| 86 | /* |
| 87 | * Environment |
| 88 | */ |
| 89 | #define CONFIG_ENV_IS_NOWHERE |
| 90 | #define CONFIG_ENV_SIZE 0x10000 |
| 91 | |
| 92 | /* |
| 93 | * Flash configuration |
| 94 | */ |
Gabor Juhos | 2c43477 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 95 | #define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE) |
| 96 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 97 | #define CONFIG_SYS_MAX_FLASH_SECT 128 |
| 98 | #define CONFIG_SYS_FLASH_CFI |
| 99 | #define CONFIG_FLASH_CFI_DRIVER |
| 100 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 101 | |
| 102 | /* |
| 103 | * Commands |
| 104 | */ |
| 105 | #include <config_cmd_default.h> |
| 106 | |
| 107 | #undef CONFIG_CMD_FPGA |
| 108 | #undef CONFIG_CMD_LOADB |
| 109 | #undef CONFIG_CMD_LOADS |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 110 | #undef CONFIG_CMD_NFS |
| 111 | |
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame^] | 112 | #define CONFIG_CMD_DATE |
Paul Burton | f38eea6 | 2013-11-08 11:18:52 +0000 | [diff] [blame] | 113 | #define CONFIG_CMD_DHCP |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 114 | #define CONFIG_CMD_PCI |
Gabor Juhos | 439c50c | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 115 | #define CONFIG_CMD_PING |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 116 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 117 | #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ |
| 118 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 119 | #endif /* _MALTA_CONFIG_H */ |