Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> |
| 3 | * |
Tom Rini | fba2301 | 2013-07-24 09:34:30 -0400 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 7 | #ifndef _MALTA_CONFIG_H |
| 8 | #define _MALTA_CONFIG_H |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 10 | /* |
| 11 | * System configuration |
| 12 | */ |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 13 | #define CONFIG_MALTA |
Paul Burton | c215034 | 2014-04-07 10:11:23 +0100 | [diff] [blame] | 14 | #define CONFIG_BOARD_EARLY_INIT_F |
| 15 | #define CONFIG_DISPLAY_BOARDINFO |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 16 | |
Gabor Juhos | 5e19515 | 2013-10-24 14:32:00 +0200 | [diff] [blame] | 17 | #define CONFIG_MEMSIZE_IN_BYTES |
| 18 | |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 19 | #define CONFIG_PCI |
| 20 | #define CONFIG_PCI_GT64120 |
Paul Burton | 234882c | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 21 | #define CONFIG_PCI_MSC01 |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 22 | #define CONFIG_PCI_PNP |
Gabor Juhos | 439c50c | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 23 | #define CONFIG_PCNET |
Paul Burton | f38eea6 | 2013-11-08 11:18:52 +0000 | [diff] [blame] | 24 | #define CONFIG_PCNET_79C973 |
| 25 | #define PCNET_HAS_PROM |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 26 | |
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 27 | #define CONFIG_MISC_INIT_R |
| 28 | #define CONFIG_RTC_MC146818 |
| 29 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 |
| 30 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 31 | /* |
| 32 | * CPU Configuration |
| 33 | */ |
| 34 | #define CONFIG_SYS_MHZ 250 /* arbitrary value */ |
| 35 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 36 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 37 | /* |
| 38 | * Memory map |
| 39 | */ |
Gabor Juhos | c1df370 | 2013-11-12 16:47:32 +0100 | [diff] [blame] | 40 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 41 | |
| 42 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ |
| 43 | #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) |
| 44 | |
| 45 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
| 46 | |
| 47 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 |
| 48 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
| 49 | #define CONFIG_SYS_MEMTEST_END 0x80800000 |
| 50 | |
| 51 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| 52 | #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) |
Paul Burton | 657b935 | 2013-11-26 17:45:28 +0000 | [diff] [blame] | 53 | #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 54 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 55 | #define CONFIG_SYS_CBSIZE 256 |
| 56 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 57 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 58 | #define CONFIG_SYS_MAXARGS 16 |
| 59 | |
| 60 | #define CONFIG_AUTO_COMPLETE |
| 61 | #define CONFIG_CMDLINE_EDITING |
| 62 | |
| 63 | /* |
| 64 | * Serial driver |
| 65 | */ |
| 66 | #define CONFIG_BAUDRATE 115200 |
Paul Burton | 58ce2cc | 2016-05-17 07:43:27 +0100 | [diff] [blame] | 67 | #define CONFIG_SYS_NS16550_PORT_MAPPED |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 68 | |
| 69 | /* |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 70 | * Flash configuration |
| 71 | */ |
Daniel Schwierzeck | 535e08e | 2016-01-09 17:32:44 +0100 | [diff] [blame] | 72 | #define CONFIG_SYS_FLASH_BASE 0xbe000000 |
Gabor Juhos | 2c43477 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 73 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 74 | #define CONFIG_SYS_MAX_FLASH_SECT 128 |
| 75 | #define CONFIG_SYS_FLASH_CFI |
| 76 | #define CONFIG_FLASH_CFI_DRIVER |
| 77 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 78 | |
| 79 | /* |
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 80 | * Environment |
| 81 | */ |
| 82 | #define CONFIG_ENV_IS_IN_FLASH |
| 83 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| 84 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 85 | #define CONFIG_ENV_ADDR \ |
| 86 | (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) |
| 87 | |
| 88 | /* |
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 89 | * IDE/ATA |
| 90 | */ |
| 91 | #define CONFIG_SYS_IDE_MAXBUS 1 |
| 92 | #define CONFIG_SYS_IDE_MAXDEVICE 2 |
| 93 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS |
| 94 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 |
| 95 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 |
| 96 | #define CONFIG_SYS_ATA_REG_OFFSET 0 |
| 97 | |
| 98 | /* |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 99 | * Commands |
| 100 | */ |
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 101 | #define CONFIG_CMD_DATE |
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 102 | #define CONFIG_CMD_IDE |
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 103 | #define CONFIG_CMD_PCI |
| 104 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 105 | #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ |
| 106 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 107 | #endif /* _MALTA_CONFIG_H */ |