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git01.mediatek.com / filogic / uboot / f226038ba0f30bc6431231b01502cbf49b4df70c / . / configs / firefly-rk3288_defconfig
blob: 71145879cbadaefa8e332e3b95582005ba23c2b6 [file] [log] [blame]
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00000000
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]4CONFIG_SYS_MALLOC_F_LEN=0x2000
5CONFIG_ROCKCHIP_RK3288=y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200[diff] [blame]6CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]7CONFIG_TARGET_FIREFLY_RK3288=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]8CONFIG_DEBUG_UART_BASE=0xff690000
9CONFIG_DEBUG_UART_CLOCK=24000000
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]10CONFIG_SPL_STACK_R_ADDR=0x80000
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]12CONFIG_DEBUG_UART=y
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame^]13CONFIG_NR_DRAM_BANKS=1
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]14# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]15CONFIG_SILENT_CONSOLE=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]16CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]17# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]18CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]19CONFIG_SPL_STACK_R=y
Simon Glass3b4057b2016-01-21 19:43:35 -0700[diff] [blame]20CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]21CONFIG_CMD_GPIO=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]22CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]23CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]24CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]25CONFIG_CMD_SF=y
26CONFIG_CMD_SPI=y
Eddie Caid1ba93e2017-03-07 12:47:07 +0800[diff] [blame]27CONFIG_CMD_USB=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_TIME=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]31CONFIG_CMD_PMIC=y
32CONFIG_CMD_REGULATOR=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]33# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]34# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]35CONFIG_SPL_PARTITION_UUIDS=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]36CONFIG_SPL_OF_CONTROL=y
Simon Glass813d4602016-05-14 14:03:00 -0600[diff] [blame]37CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]38CONFIG_ENV_IS_IN_MMC=y
Romain Perier04cad6e2017-01-17 10:32:25 +0100[diff] [blame]39CONFIG_NET_RANDOM_ETHADDR=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]40CONFIG_REGMAP=y
huang lindd8515e2015-11-17 14:20:13 +0800[diff] [blame]41CONFIG_SPL_REGMAP=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]42CONFIG_SYSCON=y
Simon Glass3b4057b2016-01-21 19:43:35 -0700[diff] [blame]43CONFIG_SPL_SYSCON=y
Simon Glass70bad912016-01-21 19:43:49 -0700[diff] [blame]44# CONFIG_SPL_SIMPLE_BUS is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]45CONFIG_CLK=y
46CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]47CONFIG_FASTBOOT_FLASH=y
48CONFIG_FASTBOOT_FLASH_MMC_DEV=0
49CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]50CONFIG_ROCKCHIP_GPIO=y
51CONFIG_SYS_I2C_ROCKCHIP=y
Tom Rini4100de42017-07-31 18:59:01 -0400[diff] [blame]52CONFIG_DM_KEYBOARD=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]53CONFIG_LED=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]54CONFIG_LED_GPIO=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]55CONFIG_MMC_DW=y
Masahiro Yamadadc607f82017-01-10 13:32:03 +0900[diff] [blame]56CONFIG_MMC_DW_ROCKCHIP=y
Sjoerd Simons613848c2017-01-11 11:46:12 +0100[diff] [blame]57CONFIG_DM_ETH=y
Sjoerd Simons613848c2017-01-11 11:46:12 +0100[diff] [blame]58CONFIG_ETH_DESIGNWARE=y
59CONFIG_GMAC_ROCKCHIP=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]60CONFIG_PINCTRL=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]61CONFIG_SPL_PINCTRL=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]62# CONFIG_SPL_PINCTRL_FULL is not set
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200[diff] [blame]63CONFIG_PINCTRL_ROCKCHIP_RK3288=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]64CONFIG_DM_PMIC=y
Simon Glass52de6462016-01-21 19:45:20 -0700[diff] [blame]65# CONFIG_SPL_PMIC_CHILDREN is not set
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]66CONFIG_PMIC_ACT8846=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]67CONFIG_REGULATOR_ACT8846=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]68CONFIG_DM_REGULATOR_FIXED=y
Simon Glass52de6462016-01-21 19:45:20 -0700[diff] [blame]69CONFIG_PWM_ROCKCHIP=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]70CONFIG_RAM=y
71CONFIG_SPL_RAM=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]72CONFIG_DEBUG_UART_SHIFT=2
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]73CONFIG_SYSRESET=y
Eddie Caid1ba93e2017-03-07 12:47:07 +0800[diff] [blame]74CONFIG_USB=y
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]75CONFIG_USB_DWC2=y
Adam Fordd4183d62018-01-02 10:39:52 -0600[diff] [blame]76CONFIG_ROCKCHIP_USB2_PHY=y
Eddie Caid1ba93e2017-03-07 12:47:07 +0800[diff] [blame]77CONFIG_USB_STORAGE=y
Tom Rini4100de42017-07-31 18:59:01 -0400[diff] [blame]78CONFIG_USB_KEYBOARD=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]79CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]80CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
81CONFIG_USB_GADGET_VENDOR_NUM=0x2207
82CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]83CONFIG_USB_GADGET_DWC2_OTG=y
Lukasz Majewskie364e4b2018-01-29 19:25:54 +0100[diff] [blame]84CONFIG_USB_FUNCTION_MASS_STORAGE=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]85CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]86CONFIG_USB_ETHER_ASIX=y
87CONFIG_USB_ETHER_SMSC95XX=y
Simon Glass52de6462016-01-21 19:45:20 -0700[diff] [blame]88CONFIG_DM_VIDEO=y
Anatolij Gustschin4601eb42016-01-25 17:17:22 +0100[diff] [blame]89CONFIG_DISPLAY=y
Simon Glass52de6462016-01-21 19:45:20 -0700[diff] [blame]90CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.com735ddea2017-04-17 22:24:23 +0800[diff] [blame]91CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Simon Glassd76f29a2016-10-17 20:12:57 -0600[diff] [blame]92CONFIG_CONSOLE_SCROLL_LINES=10
Sjoerd Simonsf26619a2015-12-04 23:27:41 +0100[diff] [blame]93CONFIG_USE_TINY_PRINTF=y
Simon Glassec3be542015-08-30 16:55:41 -0600[diff] [blame]94CONFIG_CMD_DHRYSTONE=y
95CONFIG_ERRNO_STR=y