Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 2 | /* |
| 3 | * board/renesas/silk/silk.c |
| 4 | * |
| 5 | * Copyright (C) 2015 Renesas Electronics Corporation |
| 6 | * Copyright (C) 2015 Cogent Embedded, Inc. |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 10 | #include <cpu_func.h> |
Simon Glass | 0af6e2d | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 11 | #include <env.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame^] | 12 | #include <hang.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 13 | #include <malloc.h> |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 14 | #include <dm.h> |
| 15 | #include <dm/platform_data/serial_sh.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 16 | #include <env_internal.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 17 | #include <asm/processor.h> |
| 18 | #include <asm/mach-types.h> |
| 19 | #include <asm/io.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 20 | #include <linux/errno.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 21 | #include <asm/arch/sys_proto.h> |
| 22 | #include <asm/gpio.h> |
| 23 | #include <asm/arch/rmobile.h> |
| 24 | #include <asm/arch/rcar-mstp.h> |
| 25 | #include <asm/arch/mmc.h> |
Vladimir Barinov | c595133 | 2015-02-24 18:55:46 +0200 | [diff] [blame] | 26 | #include <asm/arch/sh_sdhi.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 27 | #include <netdev.h> |
| 28 | #include <miiphy.h> |
| 29 | #include <i2c.h> |
| 30 | #include <div64.h> |
| 31 | #include "qos.h" |
| 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 35 | void s_init(void) |
| 36 | { |
| 37 | struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; |
| 38 | struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; |
| 39 | |
| 40 | /* Watchdog init */ |
| 41 | writel(0xA5A5A500, &rwdt->rwtcsra); |
| 42 | writel(0xA5A5A500, &swdt->swtcsra); |
| 43 | |
| 44 | /* QoS */ |
| 45 | qos_init(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 46 | } |
| 47 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 48 | #define TMU0_MSTP125 BIT(25) |
| 49 | #define MMC0_MSTP315 BIT(15) |
Vladimir Barinov | c595133 | 2015-02-24 18:55:46 +0200 | [diff] [blame] | 50 | |
| 51 | #define SD1CKCR 0xE6150078 |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 52 | #define SD_97500KHZ 0x7 |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 53 | |
| 54 | int board_early_init_f(void) |
| 55 | { |
| 56 | /* TMU */ |
| 57 | mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); |
| 58 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 59 | /* Set SD1 to the 97.5MHz */ |
| 60 | writel(SD_97500KHZ, SD1CKCR); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 61 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 62 | return 0; |
| 63 | } |
| 64 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 65 | #define ETHERNET_PHY_RESET 56 /* GPIO 1 24 */ |
| 66 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 67 | int board_init(void) |
| 68 | { |
| 69 | /* adress of boot parameters */ |
| 70 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 71 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 72 | /* Force ethernet PHY out of reset */ |
| 73 | gpio_request(ETHERNET_PHY_RESET, "phy_reset"); |
| 74 | gpio_direction_output(ETHERNET_PHY_RESET, 0); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 75 | mdelay(20); |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 76 | gpio_direction_output(ETHERNET_PHY_RESET, 1); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 77 | udelay(1); |
| 78 | |
| 79 | return 0; |
| 80 | } |
| 81 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 82 | int dram_init(void) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 83 | { |
Siva Durga Prasad Paladugu | b3d55ea | 2018-07-16 15:56:11 +0530 | [diff] [blame] | 84 | if (fdtdec_setup_mem_size_base() != 0) |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 85 | return -EINVAL; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 86 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 87 | return 0; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 88 | } |
| 89 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 90 | int dram_init_banksize(void) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 91 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 92 | fdtdec_setup_memory_banksize(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 93 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 94 | return 0; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 95 | } |
| 96 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 97 | /* porter has KSZ8041RNLI */ |
| 98 | #define PHY_CONTROL1 0x1E |
Marek Vasut | 9580a45 | 2019-03-30 07:05:09 +0100 | [diff] [blame] | 99 | #define PHY_LED_MODE 0xC000 |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 100 | #define PHY_LED_MODE_ACK 0x4000 |
| 101 | int board_phy_config(struct phy_device *phydev) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 102 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 103 | int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1); |
| 104 | ret &= ~PHY_LED_MODE; |
| 105 | ret |= PHY_LED_MODE_ACK; |
| 106 | ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 111 | void reset_cpu(ulong addr) |
| 112 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 113 | struct udevice *dev; |
| 114 | const u8 pmic_bus = 1; |
Marek Vasut | fbea881 | 2018-04-22 04:44:05 +0200 | [diff] [blame] | 115 | const u8 pmic_addr = 0x5a; |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 116 | u8 data; |
| 117 | int ret; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 118 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 119 | ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev); |
| 120 | if (ret) |
| 121 | hang(); |
| 122 | |
| 123 | ret = dm_i2c_read(dev, 0x13, &data, 1); |
| 124 | if (ret) |
| 125 | hang(); |
| 126 | |
| 127 | data |= BIT(1); |
| 128 | |
| 129 | ret = dm_i2c_write(dev, 0x13, &data, 1); |
| 130 | if (ret) |
| 131 | hang(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 132 | } |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 133 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 134 | enum env_location env_get_location(enum env_operation op, int prio) |
| 135 | { |
| 136 | const u32 load_magic = 0xb33fc0de; |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 137 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 138 | /* Block environment access if loaded using JTAG */ |
| 139 | if ((readl(CONFIG_SPL_TEXT_BASE + 0x24) == load_magic) && |
| 140 | (op != ENVOP_INIT)) |
| 141 | return ENVL_UNKNOWN; |
| 142 | |
| 143 | if (prio) |
| 144 | return ENVL_UNKNOWN; |
| 145 | |
| 146 | return ENVL_SPI_FLASH; |
| 147 | } |