Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 2 | /* |
| 3 | * board/renesas/silk/silk.c |
| 4 | * |
| 5 | * Copyright (C) 2015 Renesas Electronics Corporation |
| 6 | * Copyright (C) 2015 Cogent Embedded, Inc. |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | 0af6e2d | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 10 | #include <env.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 11 | #include <malloc.h> |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 12 | #include <dm.h> |
| 13 | #include <dm/platform_data/serial_sh.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame^] | 14 | #include <env_internal.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 15 | #include <asm/processor.h> |
| 16 | #include <asm/mach-types.h> |
| 17 | #include <asm/io.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 18 | #include <linux/errno.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 19 | #include <asm/arch/sys_proto.h> |
| 20 | #include <asm/gpio.h> |
| 21 | #include <asm/arch/rmobile.h> |
| 22 | #include <asm/arch/rcar-mstp.h> |
| 23 | #include <asm/arch/mmc.h> |
Vladimir Barinov | c595133 | 2015-02-24 18:55:46 +0200 | [diff] [blame] | 24 | #include <asm/arch/sh_sdhi.h> |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 25 | #include <netdev.h> |
| 26 | #include <miiphy.h> |
| 27 | #include <i2c.h> |
| 28 | #include <div64.h> |
| 29 | #include "qos.h" |
| 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 33 | void s_init(void) |
| 34 | { |
| 35 | struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; |
| 36 | struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; |
| 37 | |
| 38 | /* Watchdog init */ |
| 39 | writel(0xA5A5A500, &rwdt->rwtcsra); |
| 40 | writel(0xA5A5A500, &swdt->swtcsra); |
| 41 | |
| 42 | /* QoS */ |
| 43 | qos_init(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 44 | } |
| 45 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 46 | #define TMU0_MSTP125 BIT(25) |
| 47 | #define MMC0_MSTP315 BIT(15) |
Vladimir Barinov | c595133 | 2015-02-24 18:55:46 +0200 | [diff] [blame] | 48 | |
| 49 | #define SD1CKCR 0xE6150078 |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 50 | #define SD_97500KHZ 0x7 |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 51 | |
| 52 | int board_early_init_f(void) |
| 53 | { |
| 54 | /* TMU */ |
| 55 | mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); |
| 56 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 57 | /* Set SD1 to the 97.5MHz */ |
| 58 | writel(SD_97500KHZ, SD1CKCR); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 59 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 60 | return 0; |
| 61 | } |
| 62 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 63 | #define ETHERNET_PHY_RESET 56 /* GPIO 1 24 */ |
| 64 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 65 | int board_init(void) |
| 66 | { |
| 67 | /* adress of boot parameters */ |
| 68 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 69 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 70 | /* Force ethernet PHY out of reset */ |
| 71 | gpio_request(ETHERNET_PHY_RESET, "phy_reset"); |
| 72 | gpio_direction_output(ETHERNET_PHY_RESET, 0); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 73 | mdelay(20); |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 74 | gpio_direction_output(ETHERNET_PHY_RESET, 1); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 75 | udelay(1); |
| 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 80 | int dram_init(void) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 81 | { |
Siva Durga Prasad Paladugu | b3d55ea | 2018-07-16 15:56:11 +0530 | [diff] [blame] | 82 | if (fdtdec_setup_mem_size_base() != 0) |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 83 | return -EINVAL; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 84 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 85 | return 0; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 86 | } |
| 87 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 88 | int dram_init_banksize(void) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 89 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 90 | fdtdec_setup_memory_banksize(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 91 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 92 | return 0; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 93 | } |
| 94 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 95 | /* porter has KSZ8041RNLI */ |
| 96 | #define PHY_CONTROL1 0x1E |
Marek Vasut | 9580a45 | 2019-03-30 07:05:09 +0100 | [diff] [blame] | 97 | #define PHY_LED_MODE 0xC000 |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 98 | #define PHY_LED_MODE_ACK 0x4000 |
| 99 | int board_phy_config(struct phy_device *phydev) |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 100 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 101 | int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1); |
| 102 | ret &= ~PHY_LED_MODE; |
| 103 | ret |= PHY_LED_MODE_ACK; |
| 104 | ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 109 | void reset_cpu(ulong addr) |
| 110 | { |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 111 | struct udevice *dev; |
| 112 | const u8 pmic_bus = 1; |
Marek Vasut | fbea881 | 2018-04-22 04:44:05 +0200 | [diff] [blame] | 113 | const u8 pmic_addr = 0x5a; |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 114 | u8 data; |
| 115 | int ret; |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 116 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 117 | ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev); |
| 118 | if (ret) |
| 119 | hang(); |
| 120 | |
| 121 | ret = dm_i2c_read(dev, 0x13, &data, 1); |
| 122 | if (ret) |
| 123 | hang(); |
| 124 | |
| 125 | data |= BIT(1); |
| 126 | |
| 127 | ret = dm_i2c_write(dev, 0x13, &data, 1); |
| 128 | if (ret) |
| 129 | hang(); |
Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 130 | } |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 131 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 132 | enum env_location env_get_location(enum env_operation op, int prio) |
| 133 | { |
| 134 | const u32 load_magic = 0xb33fc0de; |
Nobuhiro Iwamatsu | fafe6e9 | 2014-12-09 16:20:04 +0900 | [diff] [blame] | 135 | |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 136 | /* Block environment access if loaded using JTAG */ |
| 137 | if ((readl(CONFIG_SPL_TEXT_BASE + 0x24) == load_magic) && |
| 138 | (op != ENVOP_INIT)) |
| 139 | return ENVL_UNKNOWN; |
| 140 | |
| 141 | if (prio) |
| 142 | return ENVL_UNKNOWN; |
| 143 | |
| 144 | return ENVL_SPI_FLASH; |
| 145 | } |