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Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +03001/*
2 * board/renesas/silk/silk.c
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2015 Cogent Embedded, Inc.
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#include <common.h>
11#include <malloc.h>
Nobuhiro Iwamatsufafe6e92014-12-09 16:20:04 +090012#include <dm.h>
13#include <dm/platform_data/serial_sh.h>
Alex Kiernan9c215492018-04-01 09:22:38 +000014#include <environment.h>
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030015#include <asm/processor.h>
16#include <asm/mach-types.h>
17#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090018#include <linux/errno.h>
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030019#include <asm/arch/sys_proto.h>
20#include <asm/gpio.h>
21#include <asm/arch/rmobile.h>
22#include <asm/arch/rcar-mstp.h>
23#include <asm/arch/mmc.h>
Vladimir Barinovc5951332015-02-24 18:55:46 +020024#include <asm/arch/sh_sdhi.h>
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030025#include <netdev.h>
26#include <miiphy.h>
27#include <i2c.h>
28#include <div64.h>
29#include "qos.h"
30
31DECLARE_GLOBAL_DATA_PTR;
32
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030033void s_init(void)
34{
35 struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
36 struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
37
38 /* Watchdog init */
39 writel(0xA5A5A500, &rwdt->rwtcsra);
40 writel(0xA5A5A500, &swdt->swtcsra);
41
42 /* QoS */
43 qos_init();
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030044}
45
Marek Vasut52e0ee32018-04-21 16:19:56 +020046#define TMU0_MSTP125 BIT(25)
47#define MMC0_MSTP315 BIT(15)
Vladimir Barinovc5951332015-02-24 18:55:46 +020048
49#define SD1CKCR 0xE6150078
Marek Vasut52e0ee32018-04-21 16:19:56 +020050#define SD_97500KHZ 0x7
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030051
52int board_early_init_f(void)
53{
54 /* TMU */
55 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
56
Marek Vasut52e0ee32018-04-21 16:19:56 +020057 /* Set SD1 to the 97.5MHz */
58 writel(SD_97500KHZ, SD1CKCR);
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030059
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030060 return 0;
61}
62
Marek Vasut52e0ee32018-04-21 16:19:56 +020063#define ETHERNET_PHY_RESET 56 /* GPIO 1 24 */
64
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030065int board_init(void)
66{
67 /* adress of boot parameters */
68 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
69
Marek Vasut52e0ee32018-04-21 16:19:56 +020070 /* Force ethernet PHY out of reset */
71 gpio_request(ETHERNET_PHY_RESET, "phy_reset");
72 gpio_direction_output(ETHERNET_PHY_RESET, 0);
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030073 mdelay(20);
Marek Vasut52e0ee32018-04-21 16:19:56 +020074 gpio_direction_output(ETHERNET_PHY_RESET, 1);
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030075 udelay(1);
76
77 return 0;
78}
79
Marek Vasut52e0ee32018-04-21 16:19:56 +020080int dram_init(void)
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030081{
Marek Vasut52e0ee32018-04-21 16:19:56 +020082 if (fdtdec_setup_memory_size() != 0)
83 return -EINVAL;
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030084
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030085 return 0;
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030086}
87
Marek Vasut52e0ee32018-04-21 16:19:56 +020088int dram_init_banksize(void)
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030089{
Marek Vasut52e0ee32018-04-21 16:19:56 +020090 fdtdec_setup_memory_banksize();
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030091
Marek Vasut52e0ee32018-04-21 16:19:56 +020092 return 0;
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +030093}
94
Marek Vasut52e0ee32018-04-21 16:19:56 +020095/* porter has KSZ8041RNLI */
96#define PHY_CONTROL1 0x1E
97#define PHY_LED_MODE 0xC0000
98#define PHY_LED_MODE_ACK 0x4000
99int board_phy_config(struct phy_device *phydev)
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300100{
Marek Vasut52e0ee32018-04-21 16:19:56 +0200101 int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1);
102 ret &= ~PHY_LED_MODE;
103 ret |= PHY_LED_MODE_ACK;
104 ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret);
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300105
106 return 0;
107}
108
109const struct rmobile_sysinfo sysinfo = {
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900110 CONFIG_ARCH_RMOBILE_BOARD_STRING
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300111};
112
113void reset_cpu(ulong addr)
114{
Marek Vasut52e0ee32018-04-21 16:19:56 +0200115 struct udevice *dev;
116 const u8 pmic_bus = 1;
117 const u8 pmic_addr = 0x58;
118 u8 data;
119 int ret;
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300120
Marek Vasut52e0ee32018-04-21 16:19:56 +0200121 ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
122 if (ret)
123 hang();
124
125 ret = dm_i2c_read(dev, 0x13, &data, 1);
126 if (ret)
127 hang();
128
129 data |= BIT(1);
130
131 ret = dm_i2c_write(dev, 0x13, &data, 1);
132 if (ret)
133 hang();
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300134}
Nobuhiro Iwamatsufafe6e92014-12-09 16:20:04 +0900135
Marek Vasut52e0ee32018-04-21 16:19:56 +0200136enum env_location env_get_location(enum env_operation op, int prio)
137{
138 const u32 load_magic = 0xb33fc0de;
Nobuhiro Iwamatsufafe6e92014-12-09 16:20:04 +0900139
Marek Vasut52e0ee32018-04-21 16:19:56 +0200140 /* Block environment access if loaded using JTAG */
141 if ((readl(CONFIG_SPL_TEXT_BASE + 0x24) == load_magic) &&
142 (op != ENVOP_INIT))
143 return ENVL_UNKNOWN;
144
145 if (prio)
146 return ENVL_UNKNOWN;
147
148 return ENVL_SPI_FLASH;
149}