Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 2 | /* |
| 3 | * board/renesas/ulcb/ulcb.c |
| 4 | * This file is ULCB board support. |
| 5 | * |
| 6 | * Copyright (C) 2017 Renesas Electronics Corporation |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 9 | #include <asm/io.h> |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 10 | #include <asm/arch/rcar-mstp.h> |
Marek Vasut | b3d2ecb | 2025-01-29 18:04:32 +0100 | [diff] [blame] | 11 | #include <asm/arch/renesas.h> |
| 12 | #include <init.h> |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 13 | |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 14 | #define HSUSB_MSTP704 BIT(4) /* HSUSB */ |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 15 | |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 16 | /* HSUSB block registers */ |
| 17 | #define HSUSB_REG_LPSTS 0xE6590102 |
| 18 | #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) |
| 19 | #define HSUSB_REG_UGCTRL2 0xE6590184 |
| 20 | #define HSUSB_REG_UGCTRL2_USB0SEL 0x30 |
| 21 | #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10 |
| 22 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 23 | int board_init(void) |
| 24 | { |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 25 | /* USB1 pull-up */ |
| 26 | setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); |
| 27 | |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 28 | /* Configure the HSUSB block */ |
Hiroyuki Yokoyama | 7e17291 | 2018-09-26 16:00:09 +0900 | [diff] [blame] | 29 | mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 30 | /* Choice USB0SEL */ |
| 31 | clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, |
| 32 | HSUSB_REG_UGCTRL2_USB0SEL_EHCI); |
| 33 | /* low power status */ |
| 34 | setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL); |
| 35 | |
Marek Vasut | 7cf1c7f | 2017-08-20 17:13:48 +0200 | [diff] [blame] | 36 | return 0; |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 37 | } |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 38 | |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame] | 39 | #ifdef CONFIG_MULTI_DTB_FIT |
| 40 | int board_fit_config_name_match(const char *name) |
| 41 | { |
| 42 | /* PRR driver is not available yet */ |
Marek Vasut | 30fe98e | 2024-02-27 17:05:45 +0100 | [diff] [blame] | 43 | u32 cpu_type = renesas_get_cpu_type(); |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame] | 44 | |
Marek Vasut | f972661 | 2024-02-27 17:05:47 +0100 | [diff] [blame] | 45 | if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) && |
Marek Vasut | af66754 | 2024-03-18 15:59:37 +0100 | [diff] [blame] | 46 | !strcmp(name, "r8a77951-ulcb")) |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame] | 47 | return 0; |
| 48 | |
Marek Vasut | f972661 | 2024-02-27 17:05:47 +0100 | [diff] [blame] | 49 | if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) && |
Marek Vasut | e789aeb | 2024-03-17 07:23:38 +0100 | [diff] [blame] | 50 | !strcmp(name, "r8a77960-ulcb")) |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame] | 51 | return 0; |
| 52 | |
Marek Vasut | f972661 | 2024-02-27 17:05:47 +0100 | [diff] [blame] | 53 | if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) && |
Marek Vasut | e789aeb | 2024-03-17 07:23:38 +0100 | [diff] [blame] | 54 | !strcmp(name, "r8a77965-ulcb")) |
Marek Vasut | 5d611db | 2019-03-04 12:34:50 +0100 | [diff] [blame] | 55 | return 0; |
| 56 | |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame] | 57 | return -1; |
| 58 | } |
| 59 | #endif |