Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 2 | /* |
| 3 | * board/renesas/ulcb/ulcb.c |
| 4 | * This file is ULCB board support. |
| 5 | * |
| 6 | * Copyright (C) 2017 Renesas Electronics Corporation |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <malloc.h> |
| 11 | #include <netdev.h> |
| 12 | #include <dm.h> |
| 13 | #include <dm/platform_data/serial_sh.h> |
| 14 | #include <asm/processor.h> |
| 15 | #include <asm/mach-types.h> |
| 16 | #include <asm/io.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <asm/arch/sys_proto.h> |
| 19 | #include <asm/gpio.h> |
| 20 | #include <asm/arch/gpio.h> |
| 21 | #include <asm/arch/rmobile.h> |
| 22 | #include <asm/arch/rcar-mstp.h> |
| 23 | #include <asm/arch/sh_sdhi.h> |
| 24 | #include <i2c.h> |
| 25 | #include <mmc.h> |
| 26 | |
| 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 29 | void s_init(void) |
| 30 | { |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 31 | } |
| 32 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 33 | #define DVFS_MSTP926 BIT(26) |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 34 | #define HSUSB_MSTP704 BIT(4) /* HSUSB */ |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 35 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 36 | int board_early_init_f(void) |
| 37 | { |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 38 | #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) |
| 39 | /* DVFS for reset */ |
Hiroyuki Yokoyama | 7e17291 | 2018-09-26 16:00:09 +0900 | [diff] [blame] | 40 | mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 41 | #endif |
| 42 | return 0; |
| 43 | } |
| 44 | |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 45 | /* HSUSB block registers */ |
| 46 | #define HSUSB_REG_LPSTS 0xE6590102 |
| 47 | #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) |
| 48 | #define HSUSB_REG_UGCTRL2 0xE6590184 |
| 49 | #define HSUSB_REG_UGCTRL2_USB0SEL 0x30 |
| 50 | #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10 |
| 51 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 52 | int board_init(void) |
| 53 | { |
| 54 | /* adress of boot parameters */ |
| 55 | gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; |
| 56 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 57 | /* USB1 pull-up */ |
| 58 | setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); |
| 59 | |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 60 | /* Configure the HSUSB block */ |
Hiroyuki Yokoyama | 7e17291 | 2018-09-26 16:00:09 +0900 | [diff] [blame] | 61 | mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); |
Marek Vasut | cea5c8f | 2017-09-12 19:07:22 +0200 | [diff] [blame] | 62 | /* Choice USB0SEL */ |
| 63 | clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, |
| 64 | HSUSB_REG_UGCTRL2_USB0SEL_EHCI); |
| 65 | /* low power status */ |
| 66 | setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL); |
| 67 | |
Marek Vasut | 7cf1c7f | 2017-08-20 17:13:48 +0200 | [diff] [blame] | 68 | return 0; |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 69 | } |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 70 | |
| 71 | int dram_init(void) |
| 72 | { |
Siva Durga Prasad Paladugu | b3d55ea | 2018-07-16 15:56:11 +0530 | [diff] [blame] | 73 | if (fdtdec_setup_mem_size_base() != 0) |
Marek Vasut | 1c7ad49 | 2017-11-27 05:37:53 +0100 | [diff] [blame] | 74 | return -EINVAL; |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 75 | |
| 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | int dram_init_banksize(void) |
| 80 | { |
Marek Vasut | 1c7ad49 | 2017-11-27 05:37:53 +0100 | [diff] [blame] | 81 | fdtdec_setup_memory_banksize(); |
| 82 | |
Marek Vasut | ad43cd3 | 2017-07-21 23:15:21 +0200 | [diff] [blame] | 83 | return 0; |
| 84 | } |
Marek Vasut | 4726f06 | 2018-12-04 01:44:34 +0100 | [diff] [blame^] | 85 | |
| 86 | #ifdef CONFIG_MULTI_DTB_FIT |
| 87 | int board_fit_config_name_match(const char *name) |
| 88 | { |
| 89 | /* PRR driver is not available yet */ |
| 90 | u32 cpu_type = rmobile_get_cpu_type(); |
| 91 | |
| 92 | if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) && |
| 93 | !strcmp(name, "r8a7795-h3ulcb-u-boot")) |
| 94 | return 0; |
| 95 | |
| 96 | if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) && |
| 97 | !strcmp(name, "r8a7796-m3ulcb-u-boot")) |
| 98 | return 0; |
| 99 | |
| 100 | return -1; |
| 101 | } |
| 102 | #endif |