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wdenk2cefd152004-02-08 22:55:38 +00001/*
wdenke65527f2004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk2cefd152004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk2cefd152004-02-08 22:55:38 +00007 *
wdenke65527f2004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese12797482006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenke65527f2004-02-12 00:47:09 +000013 *
wdenk2cefd152004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk2cefd152004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2ebee312004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk2cefd152004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wangc123a382007-02-21 16:52:31 +010039#include <asm/io.h>
wdenkaeba06f2004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenkd0245fc2005-04-13 10:02:42 +000041#include <environment.h>
Stefan Roese6e83e342009-10-27 15:15:55 +010042#include <mtd/cfi_flash.h>
wdenke537b3b2004-02-23 23:54:43 +000043
wdenk2cefd152004-02-08 22:55:38 +000044/*
Haavard Skinnemoend523e392007-12-13 12:56:28 +010045 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
wdenk2cefd152004-02-08 22:55:38 +000051 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese12797482006-11-13 13:55:24 +010057 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk2cefd152004-02-08 22:55:38 +000060 *
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocher800db312007-01-19 18:05:26 +010062 * reading and writing ... (yes there is such a Hardware).
wdenk2cefd152004-02-08 22:55:38 +000063 */
64
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#ifndef CONFIG_SYS_FLASH_BANKS_LIST
66#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenke65527f2004-02-12 00:47:09 +000067#endif
68
Haavard Skinnemoend523e392007-12-13 12:56:28 +010069static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Piotr Ziecik2a7493c2008-11-17 15:49:32 +010070static uint flash_verbose = 1;
Wolfgang Denkafa0dd02006-12-27 01:26:13 +010071
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020072/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
73#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
74# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicz513b4a12005-10-11 19:09:42 +020075#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020076# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicz513b4a12005-10-11 19:09:42 +020077#endif
wdenk2cefd152004-02-08 22:55:38 +000078
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +020079flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
80
Stefan Roesec865e6c2006-02-28 15:29:58 +010081/*
82 * Check if chip width is defined. If not, start detecting with 8bit.
83 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020084#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
85#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roesec865e6c2006-02-28 15:29:58 +010086#endif
87
Stefan Roese38ae9822008-11-17 14:45:22 +010088static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +010089{
90 __raw_writeb(value, addr);
91}
92
Stefan Roese38ae9822008-11-17 14:45:22 +010093static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +010094{
95 __raw_writew(value, addr);
96}
97
Stefan Roese38ae9822008-11-17 14:45:22 +010098static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +010099{
100 __raw_writel(value, addr);
101}
102
Stefan Roese38ae9822008-11-17 14:45:22 +0100103static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100104{
105 /* No architectures currently implement __raw_writeq() */
106 *(volatile u64 *)addr = value;
107}
108
Stefan Roese38ae9822008-11-17 14:45:22 +0100109static u8 __flash_read8(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100110{
111 return __raw_readb(addr);
112}
113
Stefan Roese38ae9822008-11-17 14:45:22 +0100114static u16 __flash_read16(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100115{
116 return __raw_readw(addr);
117}
118
Stefan Roese38ae9822008-11-17 14:45:22 +0100119static u32 __flash_read32(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100120{
121 return __raw_readl(addr);
122}
123
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100124static u64 __flash_read64(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100125{
126 /* No architectures currently implement __raw_readq() */
127 return *(volatile u64 *)addr;
128}
129
Stefan Roese38ae9822008-11-17 14:45:22 +0100130#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
131void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
132void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
133void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
134void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
135u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
136u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
137u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100138u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese38ae9822008-11-17 14:45:22 +0100139#else
140#define flash_write8 __flash_write8
141#define flash_write16 __flash_write16
142#define flash_write32 __flash_write32
143#define flash_write64 __flash_write64
144#define flash_read8 __flash_read8
145#define flash_read16 __flash_read16
146#define flash_read32 __flash_read32
147#define flash_read64 __flash_read64
148#endif
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100149
wdenk2cefd152004-02-08 22:55:38 +0000150/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000151 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4c0f0052009-02-10 09:53:29 +0100153flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200154{
155 int i;
156 flash_info_t * info = 0;
wdenk2cefd152004-02-08 22:55:38 +0000157
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200159 info = & flash_info[i];
160 if (info->size && info->start[0] <= base &&
161 base <= info->start[0] + info->size - 1)
162 break;
163 }
wdenk2cefd152004-02-08 22:55:38 +0000164
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200166}
wdenk2cefd152004-02-08 22:55:38 +0000167#endif
168
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100169unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
170{
171 if (sect != (info->sector_count - 1))
172 return info->start[sect + 1] - info->start[sect];
173 else
174 return info->start[0] + info->size - info->start[sect];
175}
176
wdenke65527f2004-02-12 00:47:09 +0000177/*-----------------------------------------------------------------------
178 * create an address based on the offset and the port width
179 */
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100180static inline void *
181flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenke65527f2004-02-12 00:47:09 +0000182{
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100183 unsigned int byte_offset = offset * info->portwidth;
184
Becky Bruce9d1f6af2009-02-02 16:34:51 -0600185 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100186}
187
188static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
189 unsigned int offset, void *addr)
190{
wdenke65527f2004-02-12 00:47:09 +0000191}
192
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200193/*-----------------------------------------------------------------------
194 * make a proper sized command based on the port and chip widths
195 */
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200196static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200197{
198 int i;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400199 int cword_offset;
200 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewiord528cd62008-07-16 20:04:49 +0200202 u32 cmd_le = cpu_to_le32(cmd);
203#endif
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400204 uchar val;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200205 uchar *cp = (uchar *) cmdbuf;
206
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400207 for (i = info->portwidth; i > 0; i--){
208 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400210 cp_offset = info->portwidth - i;
Sebastian Siewiord528cd62008-07-16 20:04:49 +0200211 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200212#else
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400213 cp_offset = i - 1;
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200215#endif
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400217 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200218}
219
wdenk2cefd152004-02-08 22:55:38 +0000220#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000221/*-----------------------------------------------------------------------
222 * Debug support
223 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100224static void print_longlong (char *str, unsigned long long data)
wdenk2cefd152004-02-08 22:55:38 +0000225{
226 int i;
227 char *cp;
wdenke65527f2004-02-12 00:47:09 +0000228
Wolfgang Denk49f4f6a2009-02-04 09:42:20 +0100229 cp = (char *) &data;
wdenke65527f2004-02-12 00:47:09 +0000230 for (i = 0; i < 8; i++)
231 sprintf (&str[i * 2], "%2.2x", *cp++);
wdenk2cefd152004-02-08 22:55:38 +0000232}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200233
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100234static void flash_printqry (struct cfi_qry *qry)
wdenke65527f2004-02-12 00:47:09 +0000235{
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100236 u8 *p = (u8 *)qry;
wdenke65527f2004-02-12 00:47:09 +0000237 int x, y;
238
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
240 debug("%02x : ", x);
241 for (y = 0; y < 16; y++)
242 debug("%2.2x ", p[x + y]);
243 debug(" ");
wdenke65527f2004-02-12 00:47:09 +0000244 for (y = 0; y < 16; y++) {
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100245 unsigned char c = p[x + y];
246 if (c >= 0x20 && c <= 0x7e)
247 debug("%c", c);
248 else
249 debug(".");
wdenke65527f2004-02-12 00:47:09 +0000250 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100251 debug("\n");
wdenke65527f2004-02-12 00:47:09 +0000252 }
253}
wdenk2cefd152004-02-08 22:55:38 +0000254#endif
255
256
257/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000258 * read a character at a port width address
259 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100260static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000261{
262 uchar *cp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100263 uchar retval;
wdenke65527f2004-02-12 00:47:09 +0000264
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100265 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200266#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100267 retval = flash_read8(cp);
wdenke65527f2004-02-12 00:47:09 +0000268#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100269 retval = flash_read8(cp + info->portwidth - 1);
wdenke65527f2004-02-12 00:47:09 +0000270#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100271 flash_unmap (info, 0, offset, cp);
272 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000273}
274
275/*-----------------------------------------------------------------------
Tor Krill7f2a3052008-03-28 11:29:10 +0100276 * read a word at a port width address, assume 16bit bus
277 */
278static inline ushort flash_read_word (flash_info_t * info, uint offset)
279{
280 ushort *addr, retval;
281
282 addr = flash_map (info, 0, offset);
283 retval = flash_read16 (addr);
284 flash_unmap (info, 0, offset, addr);
285 return retval;
286}
287
288
289/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +0100290 * read a long word by picking the least significant byte of each maximum
wdenk2cefd152004-02-08 22:55:38 +0000291 * port size word. Swap for ppc format.
292 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100293static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
294 uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000295{
wdenke65527f2004-02-12 00:47:09 +0000296 uchar *addr;
297 ulong retval;
298
299#ifdef DEBUG
300 int x;
301#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100302 addr = flash_map (info, sect, offset);
wdenk2cefd152004-02-08 22:55:38 +0000303
wdenke65527f2004-02-12 00:47:09 +0000304#ifdef DEBUG
305 debug ("long addr is at %p info->portwidth = %d\n", addr,
306 info->portwidth);
307 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenke65527f2004-02-12 00:47:09 +0000309 }
310#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200311#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100312 retval = ((flash_read8(addr) << 16) |
313 (flash_read8(addr + info->portwidth) << 24) |
314 (flash_read8(addr + 2 * info->portwidth)) |
315 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenke65527f2004-02-12 00:47:09 +0000316#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
318 (flash_read8(addr + info->portwidth - 1) << 16) |
319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
320 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenke65527f2004-02-12 00:47:09 +0000321#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100322 flash_unmap(info, sect, offset, addr);
323
wdenke65527f2004-02-12 00:47:09 +0000324 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000325}
326
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200327/*
328 * Write a proper sized command to the correct address
Michael Schwingen73d044d2007-12-07 23:35:02 +0100329 */
Stefan Roese6e83e342009-10-27 15:15:55 +0100330void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
331 uint offset, u32 cmd)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100332{
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100333
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100334 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200335 cfiword_t cword;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100336
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100337 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200338 flash_make_cmd (info, cmd, &cword);
339 switch (info->portwidth) {
340 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100343 flash_write8(cword.c, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200344 break;
345 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200347 cmd, cword.w,
348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100349 flash_write16(cword.w, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200350 break;
351 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200353 cmd, cword.l,
354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100355 flash_write32(cword.l, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200356 break;
357 case FLASH_CFI_64BIT:
358#ifdef DEBUG
359 {
360 char str[20];
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100361
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200362 print_longlong (str, cword.ll);
363
364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100365 addr, cmd, str,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100367 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200368#endif
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100369 flash_write64(cword.ll, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200370 break;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100371 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200372
373 /* Ensure all the instructions are fully finished */
374 sync();
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100375
376 flash_unmap(info, sect, offset, addr);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100377}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200378
379static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100380{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100383}
Michael Schwingen73d044d2007-12-07 23:35:02 +0100384
385/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000386 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200387static int flash_isequal (flash_info_t * info, flash_sect_t sect,
388 uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000389{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100390 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200391 cfiword_t cword;
392 int retval;
wdenk2cefd152004-02-08 22:55:38 +0000393
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100394 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200395 flash_make_cmd (info, cmd, &cword);
Stefan Roeseefef95b2006-04-01 13:41:03 +0200396
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200398 switch (info->portwidth) {
399 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100400 debug ("is= %x %x\n", flash_read8(addr), cword.c);
401 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200402 break;
403 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
405 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200406 break;
407 case FLASH_CFI_32BIT:
Andrew Klossner7ddfafc2008-08-21 07:12:26 -0700408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100409 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200410 break;
411 case FLASH_CFI_64BIT:
412#ifdef DEBUG
413 {
414 char str1[20];
415 char str2[20];
Michael Schwingen73d044d2007-12-07 23:35:02 +0100416
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100417 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200418 print_longlong (str2, cword.ll);
419 debug ("is= %s %s\n", str1, str2);
wdenk2cefd152004-02-08 22:55:38 +0000420 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200421#endif
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100422 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200423 break;
424 default:
425 retval = 0;
426 break;
427 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100428 flash_unmap(info, sect, offset, addr);
429
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200430 return retval;
431}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200432
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200433/*-----------------------------------------------------------------------
434 */
435static int flash_isset (flash_info_t * info, flash_sect_t sect,
436 uint offset, uchar cmd)
437{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100438 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200439 cfiword_t cword;
440 int retval;
Stefan Roeseefef95b2006-04-01 13:41:03 +0200441
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100442 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200443 flash_make_cmd (info, cmd, &cword);
444 switch (info->portwidth) {
445 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100446 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200447 break;
448 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100449 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200450 break;
451 case FLASH_CFI_32BIT:
Stefan Roesed4e37c02008-01-02 14:05:37 +0100452 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200453 break;
454 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100455 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200456 break;
457 default:
458 retval = 0;
459 break;
460 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100461 flash_unmap(info, sect, offset, addr);
462
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200463 return retval;
464}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200465
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200466/*-----------------------------------------------------------------------
467 */
468static int flash_toggle (flash_info_t * info, flash_sect_t sect,
469 uint offset, uchar cmd)
470{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100471 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200472 cfiword_t cword;
473 int retval;
wdenke85b7a52004-10-10 22:16:06 +0000474
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100475 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200476 flash_make_cmd (info, cmd, &cword);
477 switch (info->portwidth) {
478 case FLASH_CFI_8BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200479 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200480 break;
481 case FLASH_CFI_16BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200482 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200483 break;
484 case FLASH_CFI_32BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200485 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200486 break;
487 case FLASH_CFI_64BIT:
Wolfgang Denk600e1832008-10-31 01:12:28 +0100488 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
489 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200490 break;
491 default:
492 retval = 0;
493 break;
494 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100495 flash_unmap(info, sect, offset, addr);
496
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200497 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000498}
499
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200500/*
501 * flash_is_busy - check to see if the flash is busy
502 *
503 * This routine checks the status of the chip and returns true if the
504 * chip is busy.
wdenk2cefd152004-02-08 22:55:38 +0000505 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200506static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
wdenk5c71a7a2005-05-16 15:23:22 +0000507{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200508 int retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000509
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200510 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400511 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200512 case CFI_CMDSET_INTEL_STANDARD:
513 case CFI_CMDSET_INTEL_EXTENDED:
514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
515 break;
516 case CFI_CMDSET_AMD_STANDARD:
517 case CFI_CMDSET_AMD_EXTENDED:
518#ifdef CONFIG_FLASH_CFI_LEGACY
519 case CFI_CMDSET_AMD_LEGACY:
520#endif
521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
522 break;
523 default:
524 retval = 0;
wdenk5c71a7a2005-05-16 15:23:22 +0000525 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200526 debug ("flash_is_busy: %d\n", retval);
527 return retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000528}
529
530/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200531 * wait for XSR.7 to be set. Time out with an error if it does not.
532 * This routine does not set the flash to read-array mode.
wdenk5c71a7a2005-05-16 15:23:22 +0000533 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200534static int flash_status_check (flash_info_t * info, flash_sect_t sector,
535 ulong tout, char *prompt)
wdenk2cefd152004-02-08 22:55:38 +0000536{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200537 ulong start;
wdenk2cefd152004-02-08 22:55:38 +0000538
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200539#if CONFIG_SYS_HZ != 1000
Renato Andreolaac6693d2010-03-24 23:00:47 +0800540 if ((ulong)CONFIG_SYS_HZ > 100000)
541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
542 else
543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200544#endif
wdenk2cefd152004-02-08 22:55:38 +0000545
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200546 /* Wait for command completion */
Thomas Chou4b7e6682010-04-01 11:15:05 +0800547 reset_timer();
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200548 start = get_timer (0);
549 while (flash_is_busy (info, sector)) {
550 if (get_timer (start) > tout) {
551 printf ("Flash %s timeout at address %lx data %lx\n",
552 prompt, info->start[sector],
553 flash_read_long (info, sector, 0));
554 flash_write_cmd (info, sector, 0, info->cmd_reset);
555 return ERR_TIMOUT;
wdenk2cefd152004-02-08 22:55:38 +0000556 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200557 udelay (1); /* also triggers watchdog */
wdenk2cefd152004-02-08 22:55:38 +0000558 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200559 return ERR_OK;
560}
wdenk2cefd152004-02-08 22:55:38 +0000561
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200562/*-----------------------------------------------------------------------
563 * Wait for XSR.7 to be set, if it times out print an error, otherwise
564 * do a full status check.
565 *
566 * This routine sets the flash to read-array mode.
567 */
568static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
569 ulong tout, char *prompt)
570{
571 int retcode;
wdenk2cefd152004-02-08 22:55:38 +0000572
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200573 retcode = flash_status_check (info, sector, tout, prompt);
574 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400575 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200576 case CFI_CMDSET_INTEL_EXTENDED:
577 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout2da14102008-10-09 01:26:36 -0500578 if ((retcode != ERR_OK)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200579 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
580 retcode = ERR_INVAL;
581 printf ("Flash %s error at address %lx\n", prompt,
582 info->start[sector]);
583 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
584 FLASH_STATUS_PSLBS)) {
585 puts ("Command Sequence Error.\n");
586 } else if (flash_isset (info, sector, 0,
587 FLASH_STATUS_ECLBS)) {
588 puts ("Block Erase Error.\n");
589 retcode = ERR_NOT_ERASED;
590 } else if (flash_isset (info, sector, 0,
591 FLASH_STATUS_PSLBS)) {
592 puts ("Locking Error\n");
wdenk2cefd152004-02-08 22:55:38 +0000593 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200594 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
595 puts ("Block locked.\n");
596 retcode = ERR_PROTECTED;
597 }
598 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
599 puts ("Vpp Low Error.\n");
wdenk2cefd152004-02-08 22:55:38 +0000600 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200601 flash_write_cmd (info, sector, 0, info->cmd_reset);
602 break;
603 default:
604 break;
wdenk2cefd152004-02-08 22:55:38 +0000605 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200606 return retcode;
wdenk2cefd152004-02-08 22:55:38 +0000607}
608
Thomas Chou076767a2010-03-26 08:17:00 +0800609static int use_flash_status_poll(flash_info_t *info)
610{
611#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
612 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
613 info->vendor == CFI_CMDSET_AMD_STANDARD)
614 return 1;
615#endif
616 return 0;
617}
618
619static int flash_status_poll(flash_info_t *info, void *src, void *dst,
620 ulong tout, char *prompt)
621{
622#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
623 ulong start;
624 int ready;
625
626#if CONFIG_SYS_HZ != 1000
627 if ((ulong)CONFIG_SYS_HZ > 100000)
628 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
629 else
630 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
631#endif
632
633 /* Wait for command completion */
Thomas Chou4b7e6682010-04-01 11:15:05 +0800634 reset_timer();
Thomas Chou076767a2010-03-26 08:17:00 +0800635 start = get_timer(0);
636 while (1) {
637 switch (info->portwidth) {
638 case FLASH_CFI_8BIT:
639 ready = flash_read8(dst) == flash_read8(src);
640 break;
641 case FLASH_CFI_16BIT:
642 ready = flash_read16(dst) == flash_read16(src);
643 break;
644 case FLASH_CFI_32BIT:
645 ready = flash_read32(dst) == flash_read32(src);
646 break;
647 case FLASH_CFI_64BIT:
648 ready = flash_read64(dst) == flash_read64(src);
649 break;
650 default:
651 ready = 0;
652 break;
653 }
654 if (ready)
655 break;
656 if (get_timer(start) > tout) {
657 printf("Flash %s timeout at address %lx data %lx\n",
658 prompt, (ulong)dst, (ulong)flash_read8(dst));
659 return ERR_TIMOUT;
660 }
661 udelay(1); /* also triggers watchdog */
662 }
663#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
664 return ERR_OK;
665}
666
wdenk2cefd152004-02-08 22:55:38 +0000667/*-----------------------------------------------------------------------
668 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200669static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
wdenk2cefd152004-02-08 22:55:38 +0000670{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200671#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200672 unsigned short w;
673 unsigned int l;
674 unsigned long long ll;
675#endif
wdenk2cefd152004-02-08 22:55:38 +0000676
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200677 switch (info->portwidth) {
678 case FLASH_CFI_8BIT:
679 cword->c = c;
680 break;
681 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200682#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200683 w = c;
684 w <<= 8;
685 cword->w = (cword->w >> 8) | w;
686#else
687 cword->w = (cword->w << 8) | c;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100688#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200689 break;
690 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200691#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200692 l = c;
693 l <<= 24;
694 cword->l = (cword->l >> 8) | l;
695#else
696 cword->l = (cword->l << 8) | c;
697#endif
698 break;
699 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200700#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200701 ll = c;
702 ll <<= 56;
703 cword->ll = (cword->ll >> 8) | ll;
704#else
705 cword->ll = (cword->ll << 8) | c;
706#endif
707 break;
Stefan Roese12797482006-11-13 13:55:24 +0100708 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200709}
wdenk2cefd152004-02-08 22:55:38 +0000710
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100711/*
712 * Loop through the sector table starting from the previously found sector.
713 * Searches forwards or backwards, dependent on the passed address.
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200714 */
715static flash_sect_t find_sector (flash_info_t * info, ulong addr)
716{
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100717 static flash_sect_t saved_sector = 0; /* previously found sector */
718 flash_sect_t sector = saved_sector;
719
720 while ((info->start[sector] < addr)
721 && (sector < info->sector_count - 1))
722 sector++;
723 while ((info->start[sector] > addr) && (sector > 0))
724 /*
725 * also decrements the sector in case of an overshot
726 * in the first loop
727 */
728 sector--;
wdenk2cefd152004-02-08 22:55:38 +0000729
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100730 saved_sector = sector;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200731 return sector;
wdenk2cefd152004-02-08 22:55:38 +0000732}
733
734/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000735 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200736static int flash_write_cfiword (flash_info_t * info, ulong dest,
737 cfiword_t cword)
wdenk2cefd152004-02-08 22:55:38 +0000738{
Becky Bruce9d1f6af2009-02-02 16:34:51 -0600739 void *dstaddr = (void *)dest;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200740 int flag;
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100741 flash_sect_t sect = 0;
742 char sect_found = 0;
wdenk2cefd152004-02-08 22:55:38 +0000743
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200744 /* Check if Flash is (sufficiently) erased */
745 switch (info->portwidth) {
746 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100747 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200748 break;
749 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100750 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200751 break;
752 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100753 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200754 break;
755 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100756 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200757 break;
758 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100759 flag = 0;
760 break;
wdenk2cefd152004-02-08 22:55:38 +0000761 }
Becky Bruce9d1f6af2009-02-02 16:34:51 -0600762 if (!flag)
Stefan Roese707c1462007-12-27 07:50:54 +0100763 return ERR_NOT_ERASED;
wdenk2cefd152004-02-08 22:55:38 +0000764
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200765 /* Disable interrupts which might cause a timeout here */
766 flag = disable_interrupts ();
Stefan Roesec865e6c2006-02-28 15:29:58 +0100767
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200768 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400769 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200770 case CFI_CMDSET_INTEL_EXTENDED:
771 case CFI_CMDSET_INTEL_STANDARD:
772 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
773 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
774 break;
775 case CFI_CMDSET_AMD_EXTENDED:
776 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout2da14102008-10-09 01:26:36 -0500777 sect = find_sector(info, dest);
778 flash_unlock_seq (info, sect);
779 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100780 sect_found = 1;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200781 break;
Po-Yu Chuang3f483402009-07-10 18:03:57 +0800782#ifdef CONFIG_FLASH_CFI_LEGACY
783 case CFI_CMDSET_AMD_LEGACY:
784 sect = find_sector(info, dest);
785 flash_unlock_seq (info, 0);
786 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
787 sect_found = 1;
788 break;
789#endif
wdenk2cefd152004-02-08 22:55:38 +0000790 }
791
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200792 switch (info->portwidth) {
793 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100794 flash_write8(cword.c, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200795 break;
796 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100797 flash_write16(cword.w, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200798 break;
799 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100800 flash_write32(cword.l, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200801 break;
802 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100803 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200804 break;
wdenk2cefd152004-02-08 22:55:38 +0000805 }
806
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200807 /* re-enable interrupts if necessary */
808 if (flag)
809 enable_interrupts ();
wdenk2cefd152004-02-08 22:55:38 +0000810
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100811 if (!sect_found)
812 sect = find_sector (info, dest);
813
Thomas Chou076767a2010-03-26 08:17:00 +0800814 if (use_flash_status_poll(info))
815 return flash_status_poll(info, &cword, dstaddr,
816 info->write_tout, "write");
817 else
818 return flash_full_status_check(info, sect,
819 info->write_tout, "write");
wdenk2cefd152004-02-08 22:55:38 +0000820}
821
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200822#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenk2cefd152004-02-08 22:55:38 +0000823
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200824static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
825 int len)
wdenk2cefd152004-02-08 22:55:38 +0000826{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200827 flash_sect_t sector;
828 int cnt;
829 int retcode;
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100830 void *src = cp;
Stefan Roese42c6ace2009-02-05 11:25:57 +0100831 void *dst = (void *)dest;
Stefan Roese707c1462007-12-27 07:50:54 +0100832 void *dst2 = dst;
833 int flag = 0;
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200834 uint offset = 0;
835 unsigned int shift;
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400836 uchar write_cmd;
Stefan Roese707c1462007-12-27 07:50:54 +0100837
838 switch (info->portwidth) {
839 case FLASH_CFI_8BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200840 shift = 0;
Stefan Roese707c1462007-12-27 07:50:54 +0100841 break;
842 case FLASH_CFI_16BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200843 shift = 1;
Stefan Roese707c1462007-12-27 07:50:54 +0100844 break;
845 case FLASH_CFI_32BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200846 shift = 2;
Stefan Roese707c1462007-12-27 07:50:54 +0100847 break;
848 case FLASH_CFI_64BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200849 shift = 3;
Stefan Roese707c1462007-12-27 07:50:54 +0100850 break;
851 default:
852 retcode = ERR_INVAL;
853 goto out_unmap;
854 }
855
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200856 cnt = len >> shift;
857
Stefan Roese707c1462007-12-27 07:50:54 +0100858 while ((cnt-- > 0) && (flag == 0)) {
859 switch (info->portwidth) {
860 case FLASH_CFI_8BIT:
861 flag = ((flash_read8(dst2) & flash_read8(src)) ==
862 flash_read8(src));
863 src += 1, dst2 += 1;
864 break;
865 case FLASH_CFI_16BIT:
866 flag = ((flash_read16(dst2) & flash_read16(src)) ==
867 flash_read16(src));
868 src += 2, dst2 += 2;
869 break;
870 case FLASH_CFI_32BIT:
871 flag = ((flash_read32(dst2) & flash_read32(src)) ==
872 flash_read32(src));
873 src += 4, dst2 += 4;
874 break;
875 case FLASH_CFI_64BIT:
876 flag = ((flash_read64(dst2) & flash_read64(src)) ==
877 flash_read64(src));
878 src += 8, dst2 += 8;
879 break;
880 }
881 }
882 if (!flag) {
883 retcode = ERR_NOT_ERASED;
884 goto out_unmap;
885 }
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100886
Stefan Roese707c1462007-12-27 07:50:54 +0100887 src = cp;
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100888 sector = find_sector (info, dest);
wdenke65527f2004-02-12 00:47:09 +0000889
890 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400891 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +0000892 case CFI_CMDSET_INTEL_STANDARD:
893 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400894 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
895 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200896 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400897 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
898 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200899 retcode = flash_status_check (info, sector,
900 info->buffer_write_tout,
901 "write to buffer");
902 if (retcode == ERR_OK) {
903 /* reduce the number of loops by the width of
904 * the port */
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200905 cnt = len >> shift;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400906 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200907 while (cnt-- > 0) {
908 switch (info->portwidth) {
909 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100910 flash_write8(flash_read8(src), dst);
911 src += 1, dst += 1;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200912 break;
913 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100914 flash_write16(flash_read16(src), dst);
915 src += 2, dst += 2;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200916 break;
917 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100918 flash_write32(flash_read32(src), dst);
919 src += 4, dst += 4;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200920 break;
921 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100922 flash_write64(flash_read64(src), dst);
923 src += 8, dst += 8;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200924 break;
925 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100926 retcode = ERR_INVAL;
927 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200928 }
929 }
930 flash_write_cmd (info, sector, 0,
931 FLASH_CMD_WRITE_BUFFER_CONFIRM);
932 retcode = flash_full_status_check (
933 info, sector, info->buffer_write_tout,
934 "buffer write");
935 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100936
937 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200938
wdenk2cefd152004-02-08 22:55:38 +0000939 case CFI_CMDSET_AMD_STANDARD:
940 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200941 flash_unlock_seq(info,0);
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200942
943#ifdef CONFIG_FLASH_SPANSION_S29WS_N
944 offset = ((unsigned long)dst - info->start[sector]) >> shift;
945#endif
946 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
947 cnt = len >> shift;
John Schmolleree355882009-08-12 10:55:47 -0500948 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200949
950 switch (info->portwidth) {
951 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100952 while (cnt-- > 0) {
953 flash_write8(flash_read8(src), dst);
954 src += 1, dst += 1;
955 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200956 break;
957 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100958 while (cnt-- > 0) {
959 flash_write16(flash_read16(src), dst);
960 src += 2, dst += 2;
961 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200962 break;
963 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100964 while (cnt-- > 0) {
965 flash_write32(flash_read32(src), dst);
966 src += 4, dst += 4;
967 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200968 break;
969 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100970 while (cnt-- > 0) {
971 flash_write64(flash_read64(src), dst);
972 src += 8, dst += 8;
973 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200974 break;
975 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100976 retcode = ERR_INVAL;
977 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200978 }
979
980 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Chou076767a2010-03-26 08:17:00 +0800981 if (use_flash_status_poll(info))
982 retcode = flash_status_poll(info, src - (1 << shift),
983 dst - (1 << shift),
984 info->buffer_write_tout,
985 "buffer write");
986 else
987 retcode = flash_full_status_check(info, sector,
988 info->buffer_write_tout,
989 "buffer write");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100990 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200991
wdenk2cefd152004-02-08 22:55:38 +0000992 default:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200993 debug ("Unknown Command Set\n");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100994 retcode = ERR_INVAL;
995 break;
wdenk2cefd152004-02-08 22:55:38 +0000996 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100997
998out_unmap:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100999 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001000}
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001001#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001002
wdenke65527f2004-02-12 00:47:09 +00001003
wdenk2cefd152004-02-08 22:55:38 +00001004/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +00001005 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001006int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk2cefd152004-02-08 22:55:38 +00001007{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001008 int rcode = 0;
1009 int prot;
1010 flash_sect_t sect;
Thomas Chou076767a2010-03-26 08:17:00 +08001011 int st;
wdenk2cefd152004-02-08 22:55:38 +00001012
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001013 if (info->flash_id != FLASH_MAN_CFI) {
1014 puts ("Can't erase unknown flash type - aborted\n");
1015 return 1;
1016 }
1017 if ((s_first < 0) || (s_first > s_last)) {
1018 puts ("- no sectors to erase\n");
1019 return 1;
1020 }
Stefan Roeseefef95b2006-04-01 13:41:03 +02001021
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001022 prot = 0;
1023 for (sect = s_first; sect <= s_last; ++sect) {
1024 if (info->protect[sect]) {
1025 prot++;
wdenk2cefd152004-02-08 22:55:38 +00001026 }
1027 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001028 if (prot) {
1029 printf ("- Warning: %d protected sectors will not be erased!\n",
1030 prot);
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001031 } else if (flash_verbose) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001032 putc ('\n');
1033 }
wdenke65527f2004-02-12 00:47:09 +00001034
wdenke65527f2004-02-12 00:47:09 +00001035
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001036 for (sect = s_first; sect <= s_last; sect++) {
1037 if (info->protect[sect] == 0) { /* not protected */
1038 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001039 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001040 case CFI_CMDSET_INTEL_STANDARD:
1041 case CFI_CMDSET_INTEL_EXTENDED:
1042 flash_write_cmd (info, sect, 0,
1043 FLASH_CMD_CLEAR_STATUS);
1044 flash_write_cmd (info, sect, 0,
1045 FLASH_CMD_BLOCK_ERASE);
1046 flash_write_cmd (info, sect, 0,
1047 FLASH_CMD_ERASE_CONFIRM);
1048 break;
1049 case CFI_CMDSET_AMD_STANDARD:
1050 case CFI_CMDSET_AMD_EXTENDED:
1051 flash_unlock_seq (info, sect);
1052 flash_write_cmd (info, sect,
1053 info->addr_unlock1,
1054 AMD_CMD_ERASE_START);
1055 flash_unlock_seq (info, sect);
1056 flash_write_cmd (info, sect, 0,
1057 AMD_CMD_ERASE_SECTOR);
1058 break;
1059#ifdef CONFIG_FLASH_CFI_LEGACY
1060 case CFI_CMDSET_AMD_LEGACY:
1061 flash_unlock_seq (info, 0);
1062 flash_write_cmd (info, 0, info->addr_unlock1,
1063 AMD_CMD_ERASE_START);
1064 flash_unlock_seq (info, 0);
1065 flash_write_cmd (info, sect, 0,
1066 AMD_CMD_ERASE_SECTOR);
1067 break;
1068#endif
1069 default:
1070 debug ("Unkown flash vendor %d\n",
1071 info->vendor);
1072 break;
wdenke65527f2004-02-12 00:47:09 +00001073 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001074
Thomas Chou076767a2010-03-26 08:17:00 +08001075 if (use_flash_status_poll(info)) {
1076 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1077 void *dest;
1078 dest = flash_map(info, sect, 0);
1079 st = flash_status_poll(info, &cword, dest,
1080 info->erase_blk_tout, "erase");
1081 flash_unmap(info, sect, 0, dest);
1082 } else
1083 st = flash_full_status_check(info, sect,
1084 info->erase_blk_tout,
1085 "erase");
1086 if (st)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001087 rcode = 1;
Thomas Chou076767a2010-03-26 08:17:00 +08001088 else if (flash_verbose)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001089 putc ('.');
wdenk2cefd152004-02-08 22:55:38 +00001090 }
wdenk2cefd152004-02-08 22:55:38 +00001091 }
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001092
1093 if (flash_verbose)
1094 puts (" done\n");
1095
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001096 return rcode;
wdenk2cefd152004-02-08 22:55:38 +00001097}
wdenke65527f2004-02-12 00:47:09 +00001098
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001099#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1100static int sector_erased(flash_info_t *info, int i)
1101{
1102 int k;
1103 int size;
1104 volatile unsigned long *flash;
1105
1106 /*
1107 * Check if whole sector is erased
1108 */
1109 size = flash_sector_size(info, i);
1110 flash = (volatile unsigned long *) info->start[i];
1111 /* divide by 4 for longword access */
1112 size = size >> 2;
1113
1114 for (k = 0; k < size; k++) {
1115 if (*flash++ != 0xffffffff)
1116 return 0; /* not erased */
1117 }
1118
1119 return 1; /* erased */
1120}
1121#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1122
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001123void flash_print_info (flash_info_t * info)
wdenk2cefd152004-02-08 22:55:38 +00001124{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001125 int i;
wdenk369d43d2004-03-14 14:09:05 +00001126
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001127 if (info->flash_id != FLASH_MAN_CFI) {
1128 puts ("missing or unknown FLASH type\n");
1129 return;
1130 }
1131
1132 printf ("%s FLASH (%d x %d)",
1133 info->name,
1134 (info->portwidth << 3), (info->chipwidth << 3));
1135 if (info->size < 1024*1024)
1136 printf (" Size: %ld kB in %d Sectors\n",
1137 info->size >> 10, info->sector_count);
1138 else
1139 printf (" Size: %ld MB in %d Sectors\n",
1140 info->size >> 20, info->sector_count);
1141 printf (" ");
1142 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001143 case CFI_CMDSET_INTEL_PROG_REGIONS:
1144 printf ("Intel Prog Regions");
1145 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001146 case CFI_CMDSET_INTEL_STANDARD:
1147 printf ("Intel Standard");
1148 break;
1149 case CFI_CMDSET_INTEL_EXTENDED:
1150 printf ("Intel Extended");
1151 break;
1152 case CFI_CMDSET_AMD_STANDARD:
1153 printf ("AMD Standard");
1154 break;
1155 case CFI_CMDSET_AMD_EXTENDED:
1156 printf ("AMD Extended");
1157 break;
1158#ifdef CONFIG_FLASH_CFI_LEGACY
1159 case CFI_CMDSET_AMD_LEGACY:
1160 printf ("AMD Legacy");
1161 break;
wdenk369d43d2004-03-14 14:09:05 +00001162#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001163 default:
1164 printf ("Unknown (%d)", info->vendor);
1165 break;
wdenk2cefd152004-02-08 22:55:38 +00001166 }
Philippe De Muyter35bc0812010-08-10 16:54:52 +02001167 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1168 info->manufacturer_id);
1169 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1170 info->device_id);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001171 if (info->device_id == 0x7E) {
1172 printf("%04X", info->device_id2);
1173 }
1174 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1175 info->erase_blk_tout,
1176 info->write_tout);
1177 if (info->buffer_size > 1) {
1178 printf (" Buffer write timeout: %ld ms, "
1179 "buffer size: %d bytes\n",
1180 info->buffer_write_tout,
1181 info->buffer_size);
1182 }
wdenk2cefd152004-02-08 22:55:38 +00001183
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001184 puts ("\n Sector Start Addresses:");
1185 for (i = 0; i < info->sector_count; ++i) {
Kim Phillipsc8836f12010-07-26 18:35:39 -05001186 if (ctrlc())
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001187 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001188 if ((i % 5) == 0)
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001189 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001190#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001191 /* print empty and read-only info */
1192 printf (" %08lX %c %s ",
1193 info->start[i],
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001194 sector_erased(info, i) ? 'E' : ' ',
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001195 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001196#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001197 printf (" %08lX %s ",
1198 info->start[i],
1199 info->protect[i] ? "RO" : " ");
wdenke65527f2004-02-12 00:47:09 +00001200#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001201 }
1202 putc ('\n');
1203 return;
wdenk2cefd152004-02-08 22:55:38 +00001204}
1205
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001206/*-----------------------------------------------------------------------
Jerry Van Barenaae73572008-03-08 13:48:01 -05001207 * This is used in a few places in write_buf() to show programming
1208 * progress. Making it a function is nasty because it needs to do side
1209 * effect updates to digit and dots. Repeated code is nasty too, so
1210 * we define it once here.
1211 */
Stefan Roese7758c162008-03-19 07:09:26 +01001212#ifdef CONFIG_FLASH_SHOW_PROGRESS
1213#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001214 if (flash_verbose) { \
1215 dots -= dots_sub; \
1216 if ((scale > 0) && (dots <= 0)) { \
1217 if ((digit % 5) == 0) \
1218 printf ("%d", digit / 5); \
1219 else \
1220 putc ('.'); \
1221 digit--; \
1222 dots += scale; \
1223 } \
Jerry Van Barenaae73572008-03-08 13:48:01 -05001224 }
Stefan Roese7758c162008-03-19 07:09:26 +01001225#else
1226#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1227#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001228
1229/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001230 * Copy memory to flash, returns:
1231 * 0 - OK
1232 * 1 - write timeout
1233 * 2 - Flash not erased
wdenk2cefd152004-02-08 22:55:38 +00001234 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001235int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk2cefd152004-02-08 22:55:38 +00001236{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001237 ulong wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001238 uchar *p;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001239 int aln;
wdenk2cefd152004-02-08 22:55:38 +00001240 cfiword_t cword;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001241 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001242#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001243 int buffered_size;
wdenk2cefd152004-02-08 22:55:38 +00001244#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001245#ifdef CONFIG_FLASH_SHOW_PROGRESS
1246 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1247 int scale = 0;
1248 int dots = 0;
1249
1250 /*
1251 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1252 */
1253 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1254 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1255 CONFIG_FLASH_SHOW_PROGRESS);
1256 }
1257#endif
1258
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001259 /* get lower aligned address */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001260 wp = (addr & ~(info->portwidth - 1));
Haiying Wangc123a382007-02-21 16:52:31 +01001261
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001262 /* handle unaligned start */
1263 if ((aln = addr - wp) != 0) {
1264 cword.l = 0;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001265 p = (uchar *)wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001266 for (i = 0; i < aln; ++i)
1267 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk2cefd152004-02-08 22:55:38 +00001268
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001269 for (; (i < info->portwidth) && (cnt > 0); i++) {
1270 flash_add_byte (info, &cword, *src++);
1271 cnt--;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001272 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001273 for (; (cnt == 0) && (i < info->portwidth); ++i)
1274 flash_add_byte (info, &cword, flash_read8(p + i));
1275
1276 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001277 if (rc != 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001278 return rc;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001279
1280 wp += i;
Stefan Roese7758c162008-03-19 07:09:26 +01001281 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001282 }
1283
1284 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001285#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001286 buffered_size = (info->portwidth / info->chipwidth);
1287 buffered_size *= info->buffer_size;
1288 while (cnt >= info->portwidth) {
1289 /* prohibit buffer write when buffer_size is 1 */
1290 if (info->buffer_size == 1) {
1291 cword.l = 0;
1292 for (i = 0; i < info->portwidth; i++)
1293 flash_add_byte (info, &cword, *src++);
1294 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1295 return rc;
1296 wp += info->portwidth;
1297 cnt -= info->portwidth;
1298 continue;
1299 }
1300
1301 /* write buffer until next buffered_size aligned boundary */
1302 i = buffered_size - (wp % buffered_size);
1303 if (i > cnt)
1304 i = cnt;
1305 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1306 return rc;
1307 i -= i & (info->portwidth - 1);
1308 wp += i;
1309 src += i;
1310 cnt -= i;
Stefan Roese7758c162008-03-19 07:09:26 +01001311 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001312 }
1313#else
1314 while (cnt >= info->portwidth) {
1315 cword.l = 0;
1316 for (i = 0; i < info->portwidth; i++) {
1317 flash_add_byte (info, &cword, *src++);
1318 }
1319 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1320 return rc;
1321 wp += info->portwidth;
1322 cnt -= info->portwidth;
Stefan Roese7758c162008-03-19 07:09:26 +01001323 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001324 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001325#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Barenaae73572008-03-08 13:48:01 -05001326
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001327 if (cnt == 0) {
1328 return (0);
1329 }
1330
1331 /*
1332 * handle unaligned tail bytes
1333 */
1334 cword.l = 0;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001335 p = (uchar *)wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001336 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001337 flash_add_byte (info, &cword, *src++);
1338 --cnt;
1339 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001340 for (; i < info->portwidth; ++i)
1341 flash_add_byte (info, &cword, flash_read8(p + i));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001342
1343 return flash_write_cfiword (info, wp, cword);
wdenk2cefd152004-02-08 22:55:38 +00001344}
wdenke65527f2004-02-12 00:47:09 +00001345
wdenk2cefd152004-02-08 22:55:38 +00001346/*-----------------------------------------------------------------------
1347 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001348#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001349
1350int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk2cefd152004-02-08 22:55:38 +00001351{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001352 int retcode = 0;
wdenke65527f2004-02-12 00:47:09 +00001353
Rafael Campos13d2b612008-07-31 10:22:20 +02001354 switch (info->vendor) {
1355 case CFI_CMDSET_INTEL_PROG_REGIONS:
1356 case CFI_CMDSET_INTEL_STANDARD:
Nick Spenceec81b472008-08-19 22:21:16 -07001357 case CFI_CMDSET_INTEL_EXTENDED:
Philippe De Muyterca6cd162010-08-17 18:40:25 +02001358 /*
1359 * see errata called
1360 * "Numonyx Axcell P33/P30 Specification Update" :)
1361 */
1362 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1363 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1364 prot)) {
1365 /*
1366 * cmd must come before FLASH_CMD_PROTECT + 20us
1367 * Disable interrupts which might cause a timeout here.
1368 */
1369 int flag = disable_interrupts ();
1370 unsigned short cmd;
1371
1372 if (prot)
1373 cmd = FLASH_CMD_PROTECT_SET;
1374 else
1375 cmd = FLASH_CMD_PROTECT_CLEAR;
1376
Rafael Campos13d2b612008-07-31 10:22:20 +02001377 flash_write_cmd (info, sector, 0,
Philippe De Muyterca6cd162010-08-17 18:40:25 +02001378 FLASH_CMD_PROTECT);
1379 flash_write_cmd (info, sector, 0, cmd);
1380 /* re-enable interrupts if necessary */
1381 if (flag)
1382 enable_interrupts ();
1383 }
Rafael Campos13d2b612008-07-31 10:22:20 +02001384 break;
1385 case CFI_CMDSET_AMD_EXTENDED:
1386 case CFI_CMDSET_AMD_STANDARD:
Rafael Campos13d2b612008-07-31 10:22:20 +02001387 /* U-Boot only checks the first byte */
1388 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1389 if (prot) {
1390 flash_unlock_seq (info, 0);
1391 flash_write_cmd (info, 0,
1392 info->addr_unlock1,
1393 ATM_CMD_SOFTLOCK_START);
1394 flash_unlock_seq (info, 0);
1395 flash_write_cmd (info, sector, 0,
1396 ATM_CMD_LOCK_SECT);
1397 } else {
1398 flash_write_cmd (info, 0,
1399 info->addr_unlock1,
1400 AMD_CMD_UNLOCK_START);
1401 if (info->device_id == ATM_ID_BV6416)
1402 flash_write_cmd (info, sector,
1403 0, ATM_CMD_UNLOCK_SECT);
1404 }
1405 }
1406 break;
TsiChung Liewb8c19292008-08-19 16:53:39 +00001407#ifdef CONFIG_FLASH_CFI_LEGACY
1408 case CFI_CMDSET_AMD_LEGACY:
1409 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1410 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1411 if (prot)
1412 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1413 else
1414 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1415#endif
Rafael Campos13d2b612008-07-31 10:22:20 +02001416 };
wdenk2cefd152004-02-08 22:55:38 +00001417
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001418 if ((retcode =
1419 flash_full_status_check (info, sector, info->erase_blk_tout,
1420 prot ? "protect" : "unprotect")) == 0) {
wdenke65527f2004-02-12 00:47:09 +00001421
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001422 info->protect[sector] = prot;
1423
1424 /*
1425 * On some of Intel's flash chips (marked via legacy_unlock)
1426 * unprotect unprotects all locking.
1427 */
1428 if ((prot == 0) && (info->legacy_unlock)) {
1429 flash_sect_t i;
1430
1431 for (i = 0; i < info->sector_count; i++) {
1432 if (info->protect[i])
1433 flash_real_protect (info, i, 1);
1434 }
wdenk2cefd152004-02-08 22:55:38 +00001435 }
wdenk2cefd152004-02-08 22:55:38 +00001436 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001437 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001438}
wdenke65527f2004-02-12 00:47:09 +00001439
wdenk2cefd152004-02-08 22:55:38 +00001440/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001441 * flash_read_user_serial - read the OneTimeProgramming cells
wdenk2cefd152004-02-08 22:55:38 +00001442 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001443void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1444 int len)
wdenk2cefd152004-02-08 22:55:38 +00001445{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001446 uchar *src;
1447 uchar *dst;
wdenke65527f2004-02-12 00:47:09 +00001448
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001449 dst = buffer;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001450 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001451 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1452 memcpy (dst, src + offset, len);
1453 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001454 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001455}
1456
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001457/*
1458 * flash_read_factory_serial - read the device Id from the protection area
wdenk2cefd152004-02-08 22:55:38 +00001459 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001460void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1461 int len)
wdenk2cefd152004-02-08 22:55:38 +00001462{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001463 uchar *src;
wdenke65527f2004-02-12 00:47:09 +00001464
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001465 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001466 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1467 memcpy (buffer, src + offset, len);
1468 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001469 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001470}
1471
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001472#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001473
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001474/*-----------------------------------------------------------------------
1475 * Reverse the order of the erase regions in the CFI QRY structure.
1476 * This is needed for chips that are either a) correctly detected as
1477 * top-boot, or b) buggy.
1478 */
1479static void cfi_reverse_geometry(struct cfi_qry *qry)
1480{
1481 unsigned int i, j;
1482 u32 tmp;
1483
1484 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1485 tmp = qry->erase_region_info[i];
1486 qry->erase_region_info[i] = qry->erase_region_info[j];
1487 qry->erase_region_info[j] = tmp;
1488 }
1489}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001490
wdenk2cefd152004-02-08 22:55:38 +00001491/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +01001492 * read jedec ids from device and set corresponding fields in info struct
1493 *
1494 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1495 *
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001496 */
1497static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1498{
1499 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1500 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1501 udelay(1000); /* some flash are slow to respond */
1502 info->manufacturer_id = flash_read_uchar (info,
1503 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyter35bc0812010-08-10 16:54:52 +02001504 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1505 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1506 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001507 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1508}
1509
1510static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1511{
1512 info->cmd_reset = FLASH_CMD_RESET;
1513
1514 cmdset_intel_read_jedec_ids(info);
1515 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1516
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001517#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001518 /* read legacy lock/unlock bit from intel flash */
1519 if (info->ext_addr) {
1520 info->legacy_unlock = flash_read_uchar (info,
1521 info->ext_addr + 5) & 0x08;
1522 }
1523#endif
1524
1525 return 0;
1526}
1527
1528static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1529{
Niklaus Gigerf447f712009-07-22 17:13:24 +02001530 ushort bankId = 0;
1531 uchar manuId;
1532
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001533 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1534 flash_unlock_seq(info, 0);
1535 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1536 udelay(1000); /* some flash are slow to respond */
Tor Krill7f2a3052008-03-28 11:29:10 +01001537
Niklaus Gigerf447f712009-07-22 17:13:24 +02001538 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1539 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1540 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1541 bankId += 0x100;
1542 manuId = flash_read_uchar (info,
1543 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1544 }
1545 info->manufacturer_id = manuId;
Tor Krill7f2a3052008-03-28 11:29:10 +01001546
1547 switch (info->chipwidth){
1548 case FLASH_CFI_8BIT:
1549 info->device_id = flash_read_uchar (info,
1550 FLASH_OFFSET_DEVICE_ID);
1551 if (info->device_id == 0x7E) {
1552 /* AMD 3-byte (expanded) device ids */
1553 info->device_id2 = flash_read_uchar (info,
1554 FLASH_OFFSET_DEVICE_ID2);
1555 info->device_id2 <<= 8;
1556 info->device_id2 |= flash_read_uchar (info,
1557 FLASH_OFFSET_DEVICE_ID3);
1558 }
1559 break;
1560 case FLASH_CFI_16BIT:
1561 info->device_id = flash_read_word (info,
1562 FLASH_OFFSET_DEVICE_ID);
1563 break;
1564 default:
1565 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001566 }
1567 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1568}
1569
1570static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1571{
1572 info->cmd_reset = AMD_CMD_RESET;
1573
1574 cmdset_amd_read_jedec_ids(info);
1575 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1576
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001577 return 0;
1578}
1579
1580#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese12797482006-11-13 13:55:24 +01001581static void flash_read_jedec_ids (flash_info_t * info)
1582{
1583 info->manufacturer_id = 0;
1584 info->device_id = 0;
1585 info->device_id2 = 0;
1586
1587 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001588 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese12797482006-11-13 13:55:24 +01001589 case CFI_CMDSET_INTEL_STANDARD:
1590 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001591 cmdset_intel_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001592 break;
1593 case CFI_CMDSET_AMD_STANDARD:
1594 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001595 cmdset_amd_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001596 break;
1597 default:
1598 break;
1599 }
1600}
1601
1602/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001603 * Call board code to request info about non-CFI flash.
1604 * board_flash_get_legacy needs to fill in at least:
1605 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001606 */
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001607static int flash_detect_legacy(phys_addr_t base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001608{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001609 flash_info_t *info = &flash_info[banknum];
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001610
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001611 if (board_flash_get_legacy(base, banknum, info)) {
1612 /* board code may have filled info completely. If not, we
1613 use JEDEC ID probing. */
1614 if (!info->vendor) {
1615 int modes[] = {
1616 CFI_CMDSET_AMD_STANDARD,
1617 CFI_CMDSET_INTEL_STANDARD
1618 };
1619 int i;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001620
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001621 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1622 info->vendor = modes[i];
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001623 info->start[0] =
1624 (ulong)map_physmem(base,
Stefan Roeseb8443702009-02-05 11:44:52 +01001625 info->portwidth,
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001626 MAP_NOCACHE);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001627 if (info->portwidth == FLASH_CFI_8BIT
1628 && info->interface == FLASH_CFI_X8X16) {
1629 info->addr_unlock1 = 0x2AAA;
1630 info->addr_unlock2 = 0x5555;
1631 } else {
1632 info->addr_unlock1 = 0x5555;
1633 info->addr_unlock2 = 0x2AAA;
1634 }
1635 flash_read_jedec_ids(info);
1636 debug("JEDEC PROBE: ID %x %x %x\n",
1637 info->manufacturer_id,
1638 info->device_id,
1639 info->device_id2);
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001640 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001641 break;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001642 else
Stefan Roeseb8443702009-02-05 11:44:52 +01001643 unmap_physmem((void *)info->start[0],
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001644 MAP_NOCACHE);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001645 }
1646 }
1647
1648 switch(info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001649 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001650 case CFI_CMDSET_INTEL_STANDARD:
1651 case CFI_CMDSET_INTEL_EXTENDED:
1652 info->cmd_reset = FLASH_CMD_RESET;
1653 break;
1654 case CFI_CMDSET_AMD_STANDARD:
1655 case CFI_CMDSET_AMD_EXTENDED:
1656 case CFI_CMDSET_AMD_LEGACY:
1657 info->cmd_reset = AMD_CMD_RESET;
1658 break;
1659 }
1660 info->flash_id = FLASH_MAN_CFI;
1661 return 1;
1662 }
1663 return 0; /* use CFI */
1664}
1665#else
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001666static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001667{
1668 return 0; /* use CFI */
1669}
1670#endif
1671
1672/*-----------------------------------------------------------------------
1673 * detect if flash is compatible with the Common Flash Interface (CFI)
1674 * http://www.jedec.org/download/search/jesd68.pdf
1675 */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001676static void flash_read_cfi (flash_info_t *info, void *buf,
1677 unsigned int start, size_t len)
1678{
1679 u8 *p = buf;
1680 unsigned int i;
1681
1682 for (i = 0; i < len; i++)
1683 p[i] = flash_read_uchar(info, start + i);
1684}
Stefan Roese6e83e342009-10-27 15:15:55 +01001685
1686void __flash_cmd_reset(flash_info_t *info)
1687{
1688 /*
1689 * We do not yet know what kind of commandset to use, so we issue
1690 * the reset command in both Intel and AMD variants, in the hope
1691 * that AMD flash roms ignore the Intel command.
1692 */
1693 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1694 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1695}
1696void flash_cmd_reset(flash_info_t *info)
1697 __attribute__((weak,alias("__flash_cmd_reset")));
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001698
1699static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001700{
1701 int cfi_offset;
1702
Stefan Roese6e83e342009-10-27 15:15:55 +01001703 /* Issue FLASH reset command */
1704 flash_cmd_reset(info);
Michael Schwingen4661cf72008-02-18 23:16:35 +01001705
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001706 for (cfi_offset=0;
1707 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1708 cfi_offset++) {
1709 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1710 FLASH_CMD_CFI);
1711 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1712 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1713 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001714 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1715 sizeof(struct cfi_qry));
1716 info->interface = le16_to_cpu(qry->interface_desc);
1717
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001718 info->cfi_offset = flash_offset_cfi[cfi_offset];
1719 debug ("device interface is %d\n",
1720 info->interface);
1721 debug ("found port %d chip %d ",
1722 info->portwidth, info->chipwidth);
1723 debug ("port %d bits chip %d bits\n",
1724 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1725 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1726
1727 /* calculate command offsets as in the Linux driver */
1728 info->addr_unlock1 = 0x555;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001729 info->addr_unlock2 = 0x2aa;
1730
1731 /*
1732 * modify the unlock address if we are
1733 * in compatibility mode
1734 */
1735 if ( /* x8/x16 in x8 mode */
1736 ((info->chipwidth == FLASH_CFI_BY8) &&
1737 (info->interface == FLASH_CFI_X8X16)) ||
1738 /* x16/x32 in x16 mode */
1739 ((info->chipwidth == FLASH_CFI_BY16) &&
1740 (info->interface == FLASH_CFI_X16X32)))
1741 {
1742 info->addr_unlock1 = 0xaaa;
1743 info->addr_unlock2 = 0x555;
1744 }
1745
1746 info->name = "CFI conformant";
1747 return 1;
1748 }
1749 }
1750
1751 return 0;
1752}
1753
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001754static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001755{
wdenke65527f2004-02-12 00:47:09 +00001756 debug ("flash detect cfi\n");
wdenk2cefd152004-02-08 22:55:38 +00001757
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001758 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenke65527f2004-02-12 00:47:09 +00001759 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1760 for (info->chipwidth = FLASH_CFI_BY8;
1761 info->chipwidth <= info->portwidth;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001762 info->chipwidth <<= 1)
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001763 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001764 return 1;
wdenk2cefd152004-02-08 22:55:38 +00001765 }
wdenke65527f2004-02-12 00:47:09 +00001766 debug ("not found\n");
wdenk2cefd152004-02-08 22:55:38 +00001767 return 0;
1768}
wdenke65527f2004-02-12 00:47:09 +00001769
wdenk2cefd152004-02-08 22:55:38 +00001770/*
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001771 * Manufacturer-specific quirks. Add workarounds for geometry
1772 * reversal, etc. here.
1773 */
1774static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1775{
1776 /* check if flash geometry needs reversal */
1777 if (qry->num_erase_regions > 1) {
1778 /* reverse geometry if top boot part */
1779 if (info->cfi_version < 0x3131) {
1780 /* CFI < 1.1, try to guess from device id */
1781 if ((info->device_id & 0x80) != 0)
1782 cfi_reverse_geometry(qry);
1783 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1784 /* CFI >= 1.1, deduct from top/bottom flag */
1785 /* note: ext_addr is valid since cfi_version > 0 */
1786 cfi_reverse_geometry(qry);
1787 }
1788 }
1789}
1790
1791static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1792{
1793 int reverse_geometry = 0;
1794
1795 /* Check the "top boot" bit in the PRI */
1796 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1797 reverse_geometry = 1;
1798
1799 /* AT49BV6416(T) list the erase regions in the wrong order.
1800 * However, the device ID is identical with the non-broken
Ulf Samuelsson07f9b4e2009-03-27 23:26:43 +01001801 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001802 */
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001803 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1804 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001805
1806 if (reverse_geometry)
1807 cfi_reverse_geometry(qry);
1808}
1809
Richard Retanubunbe4dca22009-01-14 08:44:26 -05001810static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1811{
1812 /* check if flash geometry needs reversal */
1813 if (qry->num_erase_regions > 1) {
1814 /* reverse geometry if top boot part */
1815 if (info->cfi_version < 0x3131) {
Richard Retanubun47255a52009-03-06 10:09:37 -05001816 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1817 if (info->device_id == 0x22CA ||
1818 info->device_id == 0x2256) {
Richard Retanubunbe4dca22009-01-14 08:44:26 -05001819 cfi_reverse_geometry(qry);
1820 }
1821 }
1822 }
1823}
1824
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001825/*
wdenk2cefd152004-02-08 22:55:38 +00001826 * The following code cannot be run from FLASH!
1827 *
1828 */
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001829ulong flash_get_size (phys_addr_t base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001830{
wdenke65527f2004-02-12 00:47:09 +00001831 flash_info_t *info = &flash_info[banknum];
wdenk2cefd152004-02-08 22:55:38 +00001832 int i, j;
1833 flash_sect_t sect_cnt;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001834 phys_addr_t sector;
wdenk2cefd152004-02-08 22:55:38 +00001835 unsigned long tmp;
1836 int size_ratio;
1837 uchar num_erase_regions;
wdenke65527f2004-02-12 00:47:09 +00001838 int erase_region_size;
1839 int erase_region_count;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001840 struct cfi_qry qry;
Stefan Roese12797482006-11-13 13:55:24 +01001841
Kumar Gala899032b2008-05-15 15:13:08 -05001842 memset(&qry, 0, sizeof(qry));
1843
Stefan Roese12797482006-11-13 13:55:24 +01001844 info->ext_addr = 0;
1845 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001846#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roeseefef95b2006-04-01 13:41:03 +02001847 info->legacy_unlock = 0;
1848#endif
wdenk2cefd152004-02-08 22:55:38 +00001849
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001850 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk2cefd152004-02-08 22:55:38 +00001851
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001852 if (flash_detect_cfi (info, &qry)) {
1853 info->vendor = le16_to_cpu(qry.p_id);
1854 info->ext_addr = le16_to_cpu(qry.p_adr);
1855 num_erase_regions = qry.num_erase_regions;
1856
Stefan Roese12797482006-11-13 13:55:24 +01001857 if (info->ext_addr) {
1858 info->cfi_version = (ushort) flash_read_uchar (info,
1859 info->ext_addr + 3) << 8;
1860 info->cfi_version |= (ushort) flash_read_uchar (info,
1861 info->ext_addr + 4);
1862 }
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001863
wdenke65527f2004-02-12 00:47:09 +00001864#ifdef DEBUG
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001865 flash_printqry (&qry);
wdenke65527f2004-02-12 00:47:09 +00001866#endif
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001867
wdenke65527f2004-02-12 00:47:09 +00001868 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001869 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +00001870 case CFI_CMDSET_INTEL_STANDARD:
1871 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001872 cmdset_intel_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00001873 break;
1874 case CFI_CMDSET_AMD_STANDARD:
1875 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001876 cmdset_amd_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00001877 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001878 default:
1879 printf("CFI: Unknown command set 0x%x\n",
1880 info->vendor);
1881 /*
1882 * Unfortunately, this means we don't know how
1883 * to get the chip back to Read mode. Might
1884 * as well try an Intel-style reset...
1885 */
1886 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1887 return 0;
wdenk2cefd152004-02-08 22:55:38 +00001888 }
wdenk6cfa84e2004-02-10 00:03:41 +00001889
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001890 /* Do manufacturer-specific fixups */
1891 switch (info->manufacturer_id) {
1892 case 0x0001:
1893 flash_fixup_amd(info, &qry);
1894 break;
1895 case 0x001f:
1896 flash_fixup_atmel(info, &qry);
1897 break;
Richard Retanubunbe4dca22009-01-14 08:44:26 -05001898 case 0x0020:
1899 flash_fixup_stm(info, &qry);
1900 break;
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001901 }
1902
wdenke65527f2004-02-12 00:47:09 +00001903 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese12797482006-11-13 13:55:24 +01001904 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1905 debug ("device id is 0x%x\n", info->device_id);
1906 debug ("device id2 is 0x%x\n", info->device_id2);
1907 debug ("cfi version is 0x%04x\n", info->cfi_version);
1908
wdenk2cefd152004-02-08 22:55:38 +00001909 size_ratio = info->portwidth / info->chipwidth;
wdenke65527f2004-02-12 00:47:09 +00001910 /* if the chip is x8/x16 reduce the ratio by half */
1911 if ((info->interface == FLASH_CFI_X8X16)
1912 && (info->chipwidth == FLASH_CFI_BY8)) {
1913 size_ratio >>= 1;
1914 }
wdenke65527f2004-02-12 00:47:09 +00001915 debug ("size_ratio %d port %d bits chip %d bits\n",
1916 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1917 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1918 debug ("found %d erase regions\n", num_erase_regions);
wdenk2cefd152004-02-08 22:55:38 +00001919 sect_cnt = 0;
1920 sector = base;
wdenke65527f2004-02-12 00:47:09 +00001921 for (i = 0; i < num_erase_regions; i++) {
1922 if (i > NUM_ERASE_REGIONS) {
wdenke537b3b2004-02-23 23:54:43 +00001923 printf ("%d erase regions found, only %d used\n",
1924 num_erase_regions, NUM_ERASE_REGIONS);
wdenk2cefd152004-02-08 22:55:38 +00001925 break;
1926 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001927
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001928 tmp = le32_to_cpu(qry.erase_region_info[i]);
1929 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001930
1931 erase_region_count = (tmp & 0xffff) + 1;
1932 tmp >>= 16;
wdenke65527f2004-02-12 00:47:09 +00001933 erase_region_size =
1934 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenkaeba06f2004-06-09 17:34:58 +00001935 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenke537b3b2004-02-23 23:54:43 +00001936 erase_region_count, erase_region_size);
wdenke65527f2004-02-12 00:47:09 +00001937 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001938 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen73d044d2007-12-07 23:35:02 +01001939 printf("ERROR: too many flash sectors\n");
1940 break;
1941 }
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001942 info->start[sect_cnt] =
1943 (ulong)map_physmem(sector,
1944 info->portwidth,
1945 MAP_NOCACHE);
wdenk2cefd152004-02-08 22:55:38 +00001946 sector += (erase_region_size * size_ratio);
wdenk26c58432005-01-09 17:12:27 +00001947
1948 /*
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001949 * Only read protection status from
1950 * supported devices (intel...)
wdenk26c58432005-01-09 17:12:27 +00001951 */
1952 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001953 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk26c58432005-01-09 17:12:27 +00001954 case CFI_CMDSET_INTEL_EXTENDED:
1955 case CFI_CMDSET_INTEL_STANDARD:
1956 info->protect[sect_cnt] =
1957 flash_isset (info, sect_cnt,
1958 FLASH_OFFSET_PROTECT,
1959 FLASH_STATUS_PROTECT);
1960 break;
1961 default:
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001962 /* default: not protected */
1963 info->protect[sect_cnt] = 0;
wdenk26c58432005-01-09 17:12:27 +00001964 }
1965
wdenk2cefd152004-02-08 22:55:38 +00001966 sect_cnt++;
1967 }
1968 }
1969
1970 info->sector_count = sect_cnt;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001971 info->size = 1 << qry.dev_size;
wdenk2cefd152004-02-08 22:55:38 +00001972 /* multiply the size by the number of chips */
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001973 info->size *= size_ratio;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001974 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1975 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001976 info->erase_blk_tout = tmp *
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001977 (1 << qry.block_erase_timeout_max);
1978 tmp = (1 << qry.buf_write_timeout_typ) *
1979 (1 << qry.buf_write_timeout_max);
1980
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001981 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001982 info->buffer_write_tout = (tmp + 999) / 1000;
1983 tmp = (1 << qry.word_write_timeout_typ) *
1984 (1 << qry.word_write_timeout_max);
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001985 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001986 info->write_tout = (tmp + 999) / 1000;
wdenk2cefd152004-02-08 22:55:38 +00001987 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001988 if ((info->interface == FLASH_CFI_X8X16) &&
1989 (info->chipwidth == FLASH_CFI_BY8)) {
1990 /* XXX - Need to test on x8/x16 in parallel. */
1991 info->portwidth >>= 1;
wdenked2ac4b2004-03-14 18:23:55 +00001992 }
Mike Frysinger59404ee2008-10-02 01:55:38 -04001993
1994 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +00001995 }
1996
wdenke65527f2004-02-12 00:47:09 +00001997 return (info->size);
wdenk2cefd152004-02-08 22:55:38 +00001998}
1999
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01002000void flash_set_verbose(uint v)
2001{
2002 flash_verbose = v;
2003}
2004
wdenk2cefd152004-02-08 22:55:38 +00002005/*-----------------------------------------------------------------------
2006 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002007unsigned long flash_init (void)
wdenk2cefd152004-02-08 22:55:38 +00002008{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002009 unsigned long size = 0;
2010 int i;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002011#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchs50431522008-04-18 16:29:40 +02002012 struct apl_s {
2013 ulong start;
2014 ulong size;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002015 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchs50431522008-04-18 16:29:40 +02002016#endif
wdenk2cefd152004-02-08 22:55:38 +00002017
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002018#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann8f7ee7d2009-03-21 09:59:34 -04002019 /* read environment from EEPROM */
2020 char s[64];
Wolfgang Denk76af2782010-07-24 21:55:43 +02002021 getenv_f("unlock", s, sizeof(s));
Michael Schwingen73d044d2007-12-07 23:35:02 +01002022#endif
wdenk2cefd152004-02-08 22:55:38 +00002023
Becky Bruce9d1f6af2009-02-02 16:34:51 -06002024#define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +02002025
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002026 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002027 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002028 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk2cefd152004-02-08 22:55:38 +00002029
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +02002030 if (!flash_detect_legacy (BANK_BASE(i), i))
2031 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002032 size += flash_info[i].size;
2033 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002034#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002035 printf ("## Unknown FLASH on Bank %d "
2036 "- Size = 0x%08lx = %ld MB\n",
2037 i+1, flash_info[i].size,
2038 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002039#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002040 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002041#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002042 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2043 /*
2044 * Only the U-Boot image and it's environment
2045 * is protected, all other sectors are
2046 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002047 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002048 * and the environment variable "unlock" is
2049 * set to "yes".
2050 */
2051 if (flash_info[i].legacy_unlock) {
2052 int k;
wdenk2cefd152004-02-08 22:55:38 +00002053
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002054 /*
2055 * Disable legacy_unlock temporarily,
2056 * since flash_real_protect would
2057 * relock all other sectors again
2058 * otherwise.
2059 */
2060 flash_info[i].legacy_unlock = 0;
wdenk2cefd152004-02-08 22:55:38 +00002061
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002062 /*
2063 * Legacy unlocking (e.g. Intel J3) ->
2064 * unlock only one sector. This will
2065 * unlock all sectors.
2066 */
2067 flash_real_protect (&flash_info[i], 0, 0);
wdenk2cefd152004-02-08 22:55:38 +00002068
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002069 flash_info[i].legacy_unlock = 1;
wdenk2cefd152004-02-08 22:55:38 +00002070
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002071 /*
2072 * Manually mark other sectors as
2073 * unlocked (unprotected)
2074 */
2075 for (k = 1; k < flash_info[i].sector_count; k++)
2076 flash_info[i].protect[k] = 0;
2077 } else {
2078 /*
2079 * No legancy unlocking -> unlock all sectors
2080 */
2081 flash_protect (FLAG_PROTECT_CLEAR,
2082 flash_info[i].start[0],
2083 flash_info[i].start[0]
2084 + flash_info[i].size - 1,
2085 &flash_info[i]);
Stefan Roesec865e6c2006-02-28 15:29:58 +01002086 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002087 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002088#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002089 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002090
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002091 /* Monitor protection ON by default */
Wolfgang Wegner0e18d042010-03-02 10:59:19 +01002092#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2093 (!defined(CONFIG_MONITOR_IS_IN_RAM))
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002094 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002095 CONFIG_SYS_MONITOR_BASE,
2096 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2097 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002098#endif
Stefan Roesec865e6c2006-02-28 15:29:58 +01002099
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002100 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +02002101#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002102 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002103 CONFIG_ENV_ADDR,
2104 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2105 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002106#endif
Stefan Roesec865e6c2006-02-28 15:29:58 +01002107
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002108 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002109#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002110 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002111 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denk47913832009-05-15 00:16:03 +02002112 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002113 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002114#endif
Matthias Fuchs50431522008-04-18 16:29:40 +02002115
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002116#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchs50431522008-04-18 16:29:40 +02002117 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2118 debug("autoprotecting from %08x to %08x\n",
2119 apl[i].start, apl[i].start + apl[i].size - 1);
2120 flash_protect (FLAG_PROTECT_SET,
2121 apl[i].start,
2122 apl[i].start + apl[i].size - 1,
2123 flash_get_info(apl[i].start));
2124 }
2125#endif
Piotr Ziecik3e939e92008-11-17 15:57:58 +01002126
2127#ifdef CONFIG_FLASH_CFI_MTD
2128 cfi_mtd_init();
2129#endif
2130
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002131 return (size);
wdenk2cefd152004-02-08 22:55:38 +00002132}