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wdenk2cefd152004-02-08 22:55:38 +00001/*
wdenke65527f2004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk2cefd152004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk2cefd152004-02-08 22:55:38 +00007 *
wdenke65527f2004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese12797482006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenke65527f2004-02-12 00:47:09 +000013 *
wdenk2cefd152004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk2cefd152004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2ebee312004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk2cefd152004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wangc123a382007-02-21 16:52:31 +010039#include <asm/io.h>
wdenkaeba06f2004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenkd0245fc2005-04-13 10:02:42 +000041#include <environment.h>
wdenke537b3b2004-02-23 23:54:43 +000042
wdenk2cefd152004-02-08 22:55:38 +000043/*
Haavard Skinnemoend523e392007-12-13 12:56:28 +010044 * This file implements a Common Flash Interface (CFI) driver for
45 * U-Boot.
46 *
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
wdenk2cefd152004-02-08 22:55:38 +000050 *
51 * References
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese12797482006-11-13 13:55:24 +010056 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk2cefd152004-02-08 22:55:38 +000059 *
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020060 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocher800db312007-01-19 18:05:26 +010061 * reading and writing ... (yes there is such a Hardware).
wdenk2cefd152004-02-08 22:55:38 +000062 */
63
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064#ifndef CONFIG_SYS_FLASH_BANKS_LIST
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenke65527f2004-02-12 00:47:09 +000066#endif
67
wdenk2cefd152004-02-08 22:55:38 +000068#define FLASH_CMD_CFI 0x98
69#define FLASH_CMD_READ_ID 0x90
70#define FLASH_CMD_RESET 0xff
71#define FLASH_CMD_BLOCK_ERASE 0x20
72#define FLASH_CMD_ERASE_CONFIRM 0xD0
73#define FLASH_CMD_WRITE 0x40
74#define FLASH_CMD_PROTECT 0x60
75#define FLASH_CMD_PROTECT_SET 0x01
76#define FLASH_CMD_PROTECT_CLEAR 0xD0
77#define FLASH_CMD_CLEAR_STATUS 0x50
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +040078#define FLASH_CMD_READ_STATUS 0x70
wdenke65527f2004-02-12 00:47:09 +000079#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +040080#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
wdenke65527f2004-02-12 00:47:09 +000081#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk2cefd152004-02-08 22:55:38 +000082
83#define FLASH_STATUS_DONE 0x80
84#define FLASH_STATUS_ESS 0x40
85#define FLASH_STATUS_ECLBS 0x20
86#define FLASH_STATUS_PSLBS 0x10
87#define FLASH_STATUS_VPENS 0x08
88#define FLASH_STATUS_PSS 0x04
89#define FLASH_STATUS_DPS 0x02
90#define FLASH_STATUS_R 0x01
91#define FLASH_STATUS_PROTECT 0x01
92
93#define AMD_CMD_RESET 0xF0
94#define AMD_CMD_WRITE 0xA0
95#define AMD_CMD_ERASE_START 0x80
96#define AMD_CMD_ERASE_SECTOR 0x30
wdenked2ac4b2004-03-14 18:23:55 +000097#define AMD_CMD_UNLOCK_START 0xAA
98#define AMD_CMD_UNLOCK_ACK 0x55
Stefan Roesec865e6c2006-02-28 15:29:58 +010099#define AMD_CMD_WRITE_TO_BUFFER 0x25
100#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
wdenk2cefd152004-02-08 22:55:38 +0000101
102#define AMD_STATUS_TOGGLE 0x40
103#define AMD_STATUS_ERROR 0x20
Stefan Roesec865e6c2006-02-28 15:29:58 +0100104
Rafael Campos13d2b612008-07-31 10:22:20 +0200105#define ATM_CMD_UNLOCK_SECT 0x70
106#define ATM_CMD_SOFTLOCK_START 0x80
107#define ATM_CMD_LOCK_SECT 0x40
108
Stefan Roese12797482006-11-13 13:55:24 +0100109#define FLASH_OFFSET_MANUFACTURER_ID 0x00
110#define FLASH_OFFSET_DEVICE_ID 0x01
111#define FLASH_OFFSET_DEVICE_ID2 0x0E
112#define FLASH_OFFSET_DEVICE_ID3 0x0F
wdenk2cefd152004-02-08 22:55:38 +0000113#define FLASH_OFFSET_CFI 0x55
Wolfgang Denkafa0dd02006-12-27 01:26:13 +0100114#define FLASH_OFFSET_CFI_ALT 0x555
wdenk2cefd152004-02-08 22:55:38 +0000115#define FLASH_OFFSET_CFI_RESP 0x10
wdenke65527f2004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100117/* extended query table primary address */
118#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
wdenk2cefd152004-02-08 22:55:38 +0000119#define FLASH_OFFSET_WTOUT 0x1F
wdenke65527f2004-02-12 00:47:09 +0000120#define FLASH_OFFSET_WBTOUT 0x20
wdenk2cefd152004-02-08 22:55:38 +0000121#define FLASH_OFFSET_ETOUT 0x21
wdenke65527f2004-02-12 00:47:09 +0000122#define FLASH_OFFSET_CETOUT 0x22
wdenk2cefd152004-02-08 22:55:38 +0000123#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenke65527f2004-02-12 00:47:09 +0000124#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk2cefd152004-02-08 22:55:38 +0000125#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenke65527f2004-02-12 00:47:09 +0000126#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk2cefd152004-02-08 22:55:38 +0000127#define FLASH_OFFSET_SIZE 0x27
wdenke65527f2004-02-12 00:47:09 +0000128#define FLASH_OFFSET_INTERFACE 0x28
129#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk2cefd152004-02-08 22:55:38 +0000130#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131#define FLASH_OFFSET_ERASE_REGIONS 0x2D
132#define FLASH_OFFSET_PROTECT 0x02
wdenke65527f2004-02-12 00:47:09 +0000133#define FLASH_OFFSET_USER_PROTECTION 0x85
134#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk2cefd152004-02-08 22:55:38 +0000135
Stefan Roese12797482006-11-13 13:55:24 +0100136#define CFI_CMDSET_NONE 0
137#define CFI_CMDSET_INTEL_EXTENDED 1
138#define CFI_CMDSET_AMD_STANDARD 2
139#define CFI_CMDSET_INTEL_STANDARD 3
140#define CFI_CMDSET_AMD_EXTENDED 4
141#define CFI_CMDSET_MITSU_STANDARD 256
142#define CFI_CMDSET_MITSU_EXTENDED 257
143#define CFI_CMDSET_SST 258
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400144#define CFI_CMDSET_INTEL_PROG_REGIONS 512
wdenk2cefd152004-02-08 22:55:38 +0000145
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
wdenk51242782004-12-18 22:35:43 +0000147# undef FLASH_CMD_RESET
Stefan Roese12797482006-11-13 13:55:24 +0100148# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
wdenk51242782004-12-18 22:35:43 +0000149#endif
150
wdenk2cefd152004-02-08 22:55:38 +0000151typedef union {
152 unsigned char c;
153 unsigned short w;
154 unsigned long l;
155 unsigned long long ll;
156} cfiword_t;
157
Stefan Roese12797482006-11-13 13:55:24 +0100158#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
wdenk2cefd152004-02-08 22:55:38 +0000159
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100160static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Wolfgang Denkafa0dd02006-12-27 01:26:13 +0100161
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
163#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
164# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200165#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200166# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200167#endif
wdenk2cefd152004-02-08 22:55:38 +0000168
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +0200169flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
170
Stefan Roesec865e6c2006-02-28 15:29:58 +0100171/*
172 * Check if chip width is defined. If not, start detecting with 8bit.
173 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
175#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roesec865e6c2006-02-28 15:29:58 +0100176#endif
177
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200178typedef unsigned long flash_sect_t;
wdenk2cefd152004-02-08 22:55:38 +0000179
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100180/* CFI standard query structure */
181struct cfi_qry {
182 u8 qry[3];
183 u16 p_id;
184 u16 p_adr;
185 u16 a_id;
186 u16 a_adr;
187 u8 vcc_min;
188 u8 vcc_max;
189 u8 vpp_min;
190 u8 vpp_max;
191 u8 word_write_timeout_typ;
192 u8 buf_write_timeout_typ;
193 u8 block_erase_timeout_typ;
194 u8 chip_erase_timeout_typ;
195 u8 word_write_timeout_max;
196 u8 buf_write_timeout_max;
197 u8 block_erase_timeout_max;
198 u8 chip_erase_timeout_max;
199 u8 dev_size;
200 u16 interface_desc;
201 u16 max_buf_write_size;
202 u8 num_erase_regions;
203 u32 erase_region_info[NUM_ERASE_REGIONS];
204} __attribute__((packed));
205
206struct cfi_pri_hdr {
207 u8 pri[3];
208 u8 major_version;
209 u8 minor_version;
210} __attribute__((packed));
211
Stefan Roese38ae9822008-11-17 14:45:22 +0100212static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100213{
214 __raw_writeb(value, addr);
215}
216
Stefan Roese38ae9822008-11-17 14:45:22 +0100217static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100218{
219 __raw_writew(value, addr);
220}
221
Stefan Roese38ae9822008-11-17 14:45:22 +0100222static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100223{
224 __raw_writel(value, addr);
225}
226
Stefan Roese38ae9822008-11-17 14:45:22 +0100227static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100228{
229 /* No architectures currently implement __raw_writeq() */
230 *(volatile u64 *)addr = value;
231}
232
Stefan Roese38ae9822008-11-17 14:45:22 +0100233static u8 __flash_read8(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100234{
235 return __raw_readb(addr);
236}
237
Stefan Roese38ae9822008-11-17 14:45:22 +0100238static u16 __flash_read16(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100239{
240 return __raw_readw(addr);
241}
242
Stefan Roese38ae9822008-11-17 14:45:22 +0100243static u32 __flash_read32(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100244{
245 return __raw_readl(addr);
246}
247
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100248static u64 __flash_read64(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100249{
250 /* No architectures currently implement __raw_readq() */
251 return *(volatile u64 *)addr;
252}
253
Stefan Roese38ae9822008-11-17 14:45:22 +0100254#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
255void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
256void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
257void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
258void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
259u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
260u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
261u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100262u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese38ae9822008-11-17 14:45:22 +0100263#else
264#define flash_write8 __flash_write8
265#define flash_write16 __flash_write16
266#define flash_write32 __flash_write32
267#define flash_write64 __flash_write64
268#define flash_read8 __flash_read8
269#define flash_read16 __flash_read16
270#define flash_read32 __flash_read32
271#define flash_read64 __flash_read64
272#endif
Daniel Hellstromcfd71382008-03-28 20:40:19 +0100273
wdenk2cefd152004-02-08 22:55:38 +0000274/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000275 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200276#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200277static flash_info_t *flash_get_info(ulong base)
278{
279 int i;
280 flash_info_t * info = 0;
wdenk2cefd152004-02-08 22:55:38 +0000281
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200282 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200283 info = & flash_info[i];
284 if (info->size && info->start[0] <= base &&
285 base <= info->start[0] + info->size - 1)
286 break;
287 }
wdenk2cefd152004-02-08 22:55:38 +0000288
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200289 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200290}
wdenk2cefd152004-02-08 22:55:38 +0000291#endif
292
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100293unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
294{
295 if (sect != (info->sector_count - 1))
296 return info->start[sect + 1] - info->start[sect];
297 else
298 return info->start[0] + info->size - info->start[sect];
299}
300
wdenke65527f2004-02-12 00:47:09 +0000301/*-----------------------------------------------------------------------
302 * create an address based on the offset and the port width
303 */
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100304static inline void *
305flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenke65527f2004-02-12 00:47:09 +0000306{
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100307 unsigned int byte_offset = offset * info->portwidth;
308
309 return map_physmem(info->start[sect] + byte_offset,
310 flash_sector_size(info, sect) - byte_offset,
311 MAP_NOCACHE);
312}
313
314static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
315 unsigned int offset, void *addr)
316{
317 unsigned int byte_offset = offset * info->portwidth;
318
319 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
wdenke65527f2004-02-12 00:47:09 +0000320}
321
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200322/*-----------------------------------------------------------------------
323 * make a proper sized command based on the port and chip widths
324 */
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200325static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200326{
327 int i;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400328 int cword_offset;
329 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200330#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewiord528cd62008-07-16 20:04:49 +0200331 u32 cmd_le = cpu_to_le32(cmd);
332#endif
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400333 uchar val;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200334 uchar *cp = (uchar *) cmdbuf;
335
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400336 for (i = info->portwidth; i > 0; i--){
337 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200338#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400339 cp_offset = info->portwidth - i;
Sebastian Siewiord528cd62008-07-16 20:04:49 +0200340 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200341#else
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400342 cp_offset = i - 1;
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200343 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200344#endif
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200345 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400346 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200347}
348
wdenk2cefd152004-02-08 22:55:38 +0000349#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000350/*-----------------------------------------------------------------------
351 * Debug support
352 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100353static void print_longlong (char *str, unsigned long long data)
wdenk2cefd152004-02-08 22:55:38 +0000354{
355 int i;
356 char *cp;
wdenke65527f2004-02-12 00:47:09 +0000357
358 cp = (unsigned char *) &data;
359 for (i = 0; i < 8; i++)
360 sprintf (&str[i * 2], "%2.2x", *cp++);
wdenk2cefd152004-02-08 22:55:38 +0000361}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200362
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100363static void flash_printqry (struct cfi_qry *qry)
wdenke65527f2004-02-12 00:47:09 +0000364{
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100365 u8 *p = (u8 *)qry;
wdenke65527f2004-02-12 00:47:09 +0000366 int x, y;
367
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100368 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
369 debug("%02x : ", x);
370 for (y = 0; y < 16; y++)
371 debug("%2.2x ", p[x + y]);
372 debug(" ");
wdenke65527f2004-02-12 00:47:09 +0000373 for (y = 0; y < 16; y++) {
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100374 unsigned char c = p[x + y];
375 if (c >= 0x20 && c <= 0x7e)
376 debug("%c", c);
377 else
378 debug(".");
wdenke65527f2004-02-12 00:47:09 +0000379 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100380 debug("\n");
wdenke65527f2004-02-12 00:47:09 +0000381 }
382}
wdenk2cefd152004-02-08 22:55:38 +0000383#endif
384
385
386/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000387 * read a character at a port width address
388 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100389static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000390{
391 uchar *cp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100392 uchar retval;
wdenke65527f2004-02-12 00:47:09 +0000393
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100394 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200395#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100396 retval = flash_read8(cp);
wdenke65527f2004-02-12 00:47:09 +0000397#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100398 retval = flash_read8(cp + info->portwidth - 1);
wdenke65527f2004-02-12 00:47:09 +0000399#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100400 flash_unmap (info, 0, offset, cp);
401 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000402}
403
404/*-----------------------------------------------------------------------
Tor Krill7f2a3052008-03-28 11:29:10 +0100405 * read a word at a port width address, assume 16bit bus
406 */
407static inline ushort flash_read_word (flash_info_t * info, uint offset)
408{
409 ushort *addr, retval;
410
411 addr = flash_map (info, 0, offset);
412 retval = flash_read16 (addr);
413 flash_unmap (info, 0, offset, addr);
414 return retval;
415}
416
417
418/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +0100419 * read a long word by picking the least significant byte of each maximum
wdenk2cefd152004-02-08 22:55:38 +0000420 * port size word. Swap for ppc format.
421 */
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100422static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
423 uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000424{
wdenke65527f2004-02-12 00:47:09 +0000425 uchar *addr;
426 ulong retval;
427
428#ifdef DEBUG
429 int x;
430#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100431 addr = flash_map (info, sect, offset);
wdenk2cefd152004-02-08 22:55:38 +0000432
wdenke65527f2004-02-12 00:47:09 +0000433#ifdef DEBUG
434 debug ("long addr is at %p info->portwidth = %d\n", addr,
435 info->portwidth);
436 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100437 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenke65527f2004-02-12 00:47:09 +0000438 }
439#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200440#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100441 retval = ((flash_read8(addr) << 16) |
442 (flash_read8(addr + info->portwidth) << 24) |
443 (flash_read8(addr + 2 * info->portwidth)) |
444 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenke65527f2004-02-12 00:47:09 +0000445#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100446 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
447 (flash_read8(addr + info->portwidth - 1) << 16) |
448 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
449 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenke65527f2004-02-12 00:47:09 +0000450#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100451 flash_unmap(info, sect, offset, addr);
452
wdenke65527f2004-02-12 00:47:09 +0000453 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000454}
455
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200456/*
457 * Write a proper sized command to the correct address
Michael Schwingen73d044d2007-12-07 23:35:02 +0100458 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200459static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200460 uint offset, u32 cmd)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100461{
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100462
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100463 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200464 cfiword_t cword;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100465
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100466 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200467 flash_make_cmd (info, cmd, &cword);
468 switch (info->portwidth) {
469 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100470 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200471 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100472 flash_write8(cword.c, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200473 break;
474 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100475 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200476 cmd, cword.w,
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100478 flash_write16(cword.w, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100481 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200482 cmd, cword.l,
483 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100484 flash_write32(cword.l, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200485 break;
486 case FLASH_CFI_64BIT:
487#ifdef DEBUG
488 {
489 char str[20];
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100490
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200491 print_longlong (str, cword.ll);
492
493 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100494 addr, cmd, str,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200495 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100496 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200497#endif
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100498 flash_write64(cword.ll, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200499 break;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100500 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200501
502 /* Ensure all the instructions are fully finished */
503 sync();
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100504
505 flash_unmap(info, sect, offset, addr);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100506}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200507
508static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100509{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200510 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
511 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100512}
Michael Schwingen73d044d2007-12-07 23:35:02 +0100513
514/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000515 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200516static int flash_isequal (flash_info_t * info, flash_sect_t sect,
517 uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000518{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100519 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200520 cfiword_t cword;
521 int retval;
wdenk2cefd152004-02-08 22:55:38 +0000522
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100523 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200524 flash_make_cmd (info, cmd, &cword);
Stefan Roeseefef95b2006-04-01 13:41:03 +0200525
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100526 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200527 switch (info->portwidth) {
528 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100529 debug ("is= %x %x\n", flash_read8(addr), cword.c);
530 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200531 break;
532 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100533 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
534 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200535 break;
536 case FLASH_CFI_32BIT:
Andrew Klossner7ddfafc2008-08-21 07:12:26 -0700537 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100538 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200539 break;
540 case FLASH_CFI_64BIT:
541#ifdef DEBUG
542 {
543 char str1[20];
544 char str2[20];
Michael Schwingen73d044d2007-12-07 23:35:02 +0100545
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100546 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200547 print_longlong (str2, cword.ll);
548 debug ("is= %s %s\n", str1, str2);
wdenk2cefd152004-02-08 22:55:38 +0000549 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200550#endif
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100551 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200552 break;
553 default:
554 retval = 0;
555 break;
556 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100557 flash_unmap(info, sect, offset, addr);
558
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200559 return retval;
560}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200561
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200562/*-----------------------------------------------------------------------
563 */
564static int flash_isset (flash_info_t * info, flash_sect_t sect,
565 uint offset, uchar cmd)
566{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100567 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200568 cfiword_t cword;
569 int retval;
Stefan Roeseefef95b2006-04-01 13:41:03 +0200570
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100571 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200572 flash_make_cmd (info, cmd, &cword);
573 switch (info->portwidth) {
574 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100575 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200576 break;
577 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100578 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200579 break;
580 case FLASH_CFI_32BIT:
Stefan Roesed4e37c02008-01-02 14:05:37 +0100581 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200582 break;
583 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100584 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200585 break;
586 default:
587 retval = 0;
588 break;
589 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100590 flash_unmap(info, sect, offset, addr);
591
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200592 return retval;
593}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200594
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200595/*-----------------------------------------------------------------------
596 */
597static int flash_toggle (flash_info_t * info, flash_sect_t sect,
598 uint offset, uchar cmd)
599{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100600 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200601 cfiword_t cword;
602 int retval;
wdenke85b7a52004-10-10 22:16:06 +0000603
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100604 addr = flash_map (info, sect, offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200605 flash_make_cmd (info, cmd, &cword);
606 switch (info->portwidth) {
607 case FLASH_CFI_8BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200608 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200609 break;
610 case FLASH_CFI_16BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200611 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200612 break;
613 case FLASH_CFI_32BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200614 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200615 break;
616 case FLASH_CFI_64BIT:
Wolfgang Denk600e1832008-10-31 01:12:28 +0100617 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
618 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200619 break;
620 default:
621 retval = 0;
622 break;
623 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100624 flash_unmap(info, sect, offset, addr);
625
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200626 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000627}
628
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200629/*
630 * flash_is_busy - check to see if the flash is busy
631 *
632 * This routine checks the status of the chip and returns true if the
633 * chip is busy.
wdenk2cefd152004-02-08 22:55:38 +0000634 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200635static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
wdenk5c71a7a2005-05-16 15:23:22 +0000636{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200637 int retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000638
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200639 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400640 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200641 case CFI_CMDSET_INTEL_STANDARD:
642 case CFI_CMDSET_INTEL_EXTENDED:
643 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
644 break;
645 case CFI_CMDSET_AMD_STANDARD:
646 case CFI_CMDSET_AMD_EXTENDED:
647#ifdef CONFIG_FLASH_CFI_LEGACY
648 case CFI_CMDSET_AMD_LEGACY:
649#endif
650 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
651 break;
652 default:
653 retval = 0;
wdenk5c71a7a2005-05-16 15:23:22 +0000654 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200655 debug ("flash_is_busy: %d\n", retval);
656 return retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000657}
658
659/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200660 * wait for XSR.7 to be set. Time out with an error if it does not.
661 * This routine does not set the flash to read-array mode.
wdenk5c71a7a2005-05-16 15:23:22 +0000662 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200663static int flash_status_check (flash_info_t * info, flash_sect_t sector,
664 ulong tout, char *prompt)
wdenk2cefd152004-02-08 22:55:38 +0000665{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200666 ulong start;
wdenk2cefd152004-02-08 22:55:38 +0000667
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200668#if CONFIG_SYS_HZ != 1000
669 tout *= CONFIG_SYS_HZ/1000;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200670#endif
wdenk2cefd152004-02-08 22:55:38 +0000671
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200672 /* Wait for command completion */
673 start = get_timer (0);
674 while (flash_is_busy (info, sector)) {
675 if (get_timer (start) > tout) {
676 printf ("Flash %s timeout at address %lx data %lx\n",
677 prompt, info->start[sector],
678 flash_read_long (info, sector, 0));
679 flash_write_cmd (info, sector, 0, info->cmd_reset);
680 return ERR_TIMOUT;
wdenk2cefd152004-02-08 22:55:38 +0000681 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200682 udelay (1); /* also triggers watchdog */
wdenk2cefd152004-02-08 22:55:38 +0000683 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200684 return ERR_OK;
685}
wdenk2cefd152004-02-08 22:55:38 +0000686
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200687/*-----------------------------------------------------------------------
688 * Wait for XSR.7 to be set, if it times out print an error, otherwise
689 * do a full status check.
690 *
691 * This routine sets the flash to read-array mode.
692 */
693static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
694 ulong tout, char *prompt)
695{
696 int retcode;
wdenk2cefd152004-02-08 22:55:38 +0000697
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200698 retcode = flash_status_check (info, sector, tout, prompt);
699 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400700 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200701 case CFI_CMDSET_INTEL_EXTENDED:
702 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout2da14102008-10-09 01:26:36 -0500703 if ((retcode != ERR_OK)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200704 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
705 retcode = ERR_INVAL;
706 printf ("Flash %s error at address %lx\n", prompt,
707 info->start[sector]);
708 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
709 FLASH_STATUS_PSLBS)) {
710 puts ("Command Sequence Error.\n");
711 } else if (flash_isset (info, sector, 0,
712 FLASH_STATUS_ECLBS)) {
713 puts ("Block Erase Error.\n");
714 retcode = ERR_NOT_ERASED;
715 } else if (flash_isset (info, sector, 0,
716 FLASH_STATUS_PSLBS)) {
717 puts ("Locking Error\n");
wdenk2cefd152004-02-08 22:55:38 +0000718 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200719 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
720 puts ("Block locked.\n");
721 retcode = ERR_PROTECTED;
722 }
723 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
724 puts ("Vpp Low Error.\n");
wdenk2cefd152004-02-08 22:55:38 +0000725 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200726 flash_write_cmd (info, sector, 0, info->cmd_reset);
727 break;
728 default:
729 break;
wdenk2cefd152004-02-08 22:55:38 +0000730 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200731 return retcode;
wdenk2cefd152004-02-08 22:55:38 +0000732}
733
734/*-----------------------------------------------------------------------
735 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200736static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
wdenk2cefd152004-02-08 22:55:38 +0000737{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200738#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200739 unsigned short w;
740 unsigned int l;
741 unsigned long long ll;
742#endif
wdenk2cefd152004-02-08 22:55:38 +0000743
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200744 switch (info->portwidth) {
745 case FLASH_CFI_8BIT:
746 cword->c = c;
747 break;
748 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200749#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200750 w = c;
751 w <<= 8;
752 cword->w = (cword->w >> 8) | w;
753#else
754 cword->w = (cword->w << 8) | c;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100755#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200756 break;
757 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200758#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200759 l = c;
760 l <<= 24;
761 cword->l = (cword->l >> 8) | l;
762#else
763 cword->l = (cword->l << 8) | c;
764#endif
765 break;
766 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200767#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200768 ll = c;
769 ll <<= 56;
770 cword->ll = (cword->ll >> 8) | ll;
771#else
772 cword->ll = (cword->ll << 8) | c;
773#endif
774 break;
Stefan Roese12797482006-11-13 13:55:24 +0100775 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200776}
wdenk2cefd152004-02-08 22:55:38 +0000777
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200778/* loop through the sectors from the highest address when the passed
779 * address is greater or equal to the sector address we have a match
780 */
781static flash_sect_t find_sector (flash_info_t * info, ulong addr)
782{
783 flash_sect_t sector;
wdenk2cefd152004-02-08 22:55:38 +0000784
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200785 for (sector = info->sector_count - 1; sector >= 0; sector--) {
786 if (addr >= info->start[sector])
787 break;
wdenk2cefd152004-02-08 22:55:38 +0000788 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200789 return sector;
wdenk2cefd152004-02-08 22:55:38 +0000790}
791
792/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000793 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200794static int flash_write_cfiword (flash_info_t * info, ulong dest,
795 cfiword_t cword)
wdenk2cefd152004-02-08 22:55:38 +0000796{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100797 void *dstaddr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200798 int flag;
Ed Swarthout2da14102008-10-09 01:26:36 -0500799 flash_sect_t sect;
wdenk2cefd152004-02-08 22:55:38 +0000800
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100801 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
wdenk2cefd152004-02-08 22:55:38 +0000802
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200803 /* Check if Flash is (sufficiently) erased */
804 switch (info->portwidth) {
805 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100806 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200807 break;
808 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100809 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200810 break;
811 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100812 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200813 break;
814 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100815 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200816 break;
817 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100818 flag = 0;
819 break;
wdenk2cefd152004-02-08 22:55:38 +0000820 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100821 if (!flag) {
822 unmap_physmem(dstaddr, info->portwidth);
Stefan Roese707c1462007-12-27 07:50:54 +0100823 return ERR_NOT_ERASED;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100824 }
wdenk2cefd152004-02-08 22:55:38 +0000825
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200826 /* Disable interrupts which might cause a timeout here */
827 flag = disable_interrupts ();
Stefan Roesec865e6c2006-02-28 15:29:58 +0100828
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200829 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400830 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200831 case CFI_CMDSET_INTEL_EXTENDED:
832 case CFI_CMDSET_INTEL_STANDARD:
833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
835 break;
836 case CFI_CMDSET_AMD_EXTENDED:
837 case CFI_CMDSET_AMD_STANDARD:
838#ifdef CONFIG_FLASH_CFI_LEGACY
839 case CFI_CMDSET_AMD_LEGACY:
840#endif
Ed Swarthout2da14102008-10-09 01:26:36 -0500841 sect = find_sector(info, dest);
842 flash_unlock_seq (info, sect);
843 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200844 break;
wdenk2cefd152004-02-08 22:55:38 +0000845 }
846
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200847 switch (info->portwidth) {
848 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100849 flash_write8(cword.c, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200850 break;
851 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100852 flash_write16(cword.w, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200853 break;
854 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100855 flash_write32(cword.l, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200856 break;
857 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100858 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200859 break;
wdenk2cefd152004-02-08 22:55:38 +0000860 }
861
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200862 /* re-enable interrupts if necessary */
863 if (flag)
864 enable_interrupts ();
wdenk2cefd152004-02-08 22:55:38 +0000865
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100866 unmap_physmem(dstaddr, info->portwidth);
867
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200868 return flash_full_status_check (info, find_sector (info, dest),
869 info->write_tout, "write");
wdenk2cefd152004-02-08 22:55:38 +0000870}
871
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200872#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenk2cefd152004-02-08 22:55:38 +0000873
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200874static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
875 int len)
wdenk2cefd152004-02-08 22:55:38 +0000876{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200877 flash_sect_t sector;
878 int cnt;
879 int retcode;
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100880 void *src = cp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100881 void *dst = map_physmem(dest, len, MAP_NOCACHE);
Stefan Roese707c1462007-12-27 07:50:54 +0100882 void *dst2 = dst;
883 int flag = 0;
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200884 uint offset = 0;
885 unsigned int shift;
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400886 uchar write_cmd;
Stefan Roese707c1462007-12-27 07:50:54 +0100887
888 switch (info->portwidth) {
889 case FLASH_CFI_8BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200890 shift = 0;
Stefan Roese707c1462007-12-27 07:50:54 +0100891 break;
892 case FLASH_CFI_16BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200893 shift = 1;
Stefan Roese707c1462007-12-27 07:50:54 +0100894 break;
895 case FLASH_CFI_32BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200896 shift = 2;
Stefan Roese707c1462007-12-27 07:50:54 +0100897 break;
898 case FLASH_CFI_64BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200899 shift = 3;
Stefan Roese707c1462007-12-27 07:50:54 +0100900 break;
901 default:
902 retcode = ERR_INVAL;
903 goto out_unmap;
904 }
905
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200906 cnt = len >> shift;
907
Stefan Roese707c1462007-12-27 07:50:54 +0100908 while ((cnt-- > 0) && (flag == 0)) {
909 switch (info->portwidth) {
910 case FLASH_CFI_8BIT:
911 flag = ((flash_read8(dst2) & flash_read8(src)) ==
912 flash_read8(src));
913 src += 1, dst2 += 1;
914 break;
915 case FLASH_CFI_16BIT:
916 flag = ((flash_read16(dst2) & flash_read16(src)) ==
917 flash_read16(src));
918 src += 2, dst2 += 2;
919 break;
920 case FLASH_CFI_32BIT:
921 flag = ((flash_read32(dst2) & flash_read32(src)) ==
922 flash_read32(src));
923 src += 4, dst2 += 4;
924 break;
925 case FLASH_CFI_64BIT:
926 flag = ((flash_read64(dst2) & flash_read64(src)) ==
927 flash_read64(src));
928 src += 8, dst2 += 8;
929 break;
930 }
931 }
932 if (!flag) {
933 retcode = ERR_NOT_ERASED;
934 goto out_unmap;
935 }
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100936
Stefan Roese707c1462007-12-27 07:50:54 +0100937 src = cp;
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100938 sector = find_sector (info, dest);
wdenke65527f2004-02-12 00:47:09 +0000939
940 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400941 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +0000942 case CFI_CMDSET_INTEL_STANDARD:
943 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400944 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
945 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200946 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400947 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
948 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200949 retcode = flash_status_check (info, sector,
950 info->buffer_write_tout,
951 "write to buffer");
952 if (retcode == ERR_OK) {
953 /* reduce the number of loops by the width of
954 * the port */
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200955 cnt = len >> shift;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400956 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200957 while (cnt-- > 0) {
958 switch (info->portwidth) {
959 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100960 flash_write8(flash_read8(src), dst);
961 src += 1, dst += 1;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200962 break;
963 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100964 flash_write16(flash_read16(src), dst);
965 src += 2, dst += 2;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200966 break;
967 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100968 flash_write32(flash_read32(src), dst);
969 src += 4, dst += 4;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200970 break;
971 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100972 flash_write64(flash_read64(src), dst);
973 src += 8, dst += 8;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200974 break;
975 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100976 retcode = ERR_INVAL;
977 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200978 }
979 }
980 flash_write_cmd (info, sector, 0,
981 FLASH_CMD_WRITE_BUFFER_CONFIRM);
982 retcode = flash_full_status_check (
983 info, sector, info->buffer_write_tout,
984 "buffer write");
985 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100986
987 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200988
wdenk2cefd152004-02-08 22:55:38 +0000989 case CFI_CMDSET_AMD_STANDARD:
990 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200991 flash_unlock_seq(info,0);
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200992
993#ifdef CONFIG_FLASH_SPANSION_S29WS_N
994 offset = ((unsigned long)dst - info->start[sector]) >> shift;
995#endif
996 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
997 cnt = len >> shift;
998 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200999
1000 switch (info->portwidth) {
1001 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001002 while (cnt-- > 0) {
1003 flash_write8(flash_read8(src), dst);
1004 src += 1, dst += 1;
1005 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001006 break;
1007 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001008 while (cnt-- > 0) {
1009 flash_write16(flash_read16(src), dst);
1010 src += 2, dst += 2;
1011 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001012 break;
1013 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001014 while (cnt-- > 0) {
1015 flash_write32(flash_read32(src), dst);
1016 src += 4, dst += 4;
1017 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001018 break;
1019 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001020 while (cnt-- > 0) {
1021 flash_write64(flash_read64(src), dst);
1022 src += 8, dst += 8;
1023 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001024 break;
1025 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001026 retcode = ERR_INVAL;
1027 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001028 }
1029
1030 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1031 retcode = flash_full_status_check (info, sector,
1032 info->buffer_write_tout,
1033 "buffer write");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001034 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001035
wdenk2cefd152004-02-08 22:55:38 +00001036 default:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001037 debug ("Unknown Command Set\n");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001038 retcode = ERR_INVAL;
1039 break;
wdenk2cefd152004-02-08 22:55:38 +00001040 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001041
1042out_unmap:
1043 unmap_physmem(dst, len);
1044 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001045}
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001046#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001047
wdenke65527f2004-02-12 00:47:09 +00001048
wdenk2cefd152004-02-08 22:55:38 +00001049/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +00001050 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001051int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk2cefd152004-02-08 22:55:38 +00001052{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001053 int rcode = 0;
1054 int prot;
1055 flash_sect_t sect;
wdenk2cefd152004-02-08 22:55:38 +00001056
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001057 if (info->flash_id != FLASH_MAN_CFI) {
1058 puts ("Can't erase unknown flash type - aborted\n");
1059 return 1;
1060 }
1061 if ((s_first < 0) || (s_first > s_last)) {
1062 puts ("- no sectors to erase\n");
1063 return 1;
1064 }
Stefan Roeseefef95b2006-04-01 13:41:03 +02001065
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001066 prot = 0;
1067 for (sect = s_first; sect <= s_last; ++sect) {
1068 if (info->protect[sect]) {
1069 prot++;
wdenk2cefd152004-02-08 22:55:38 +00001070 }
1071 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001072 if (prot) {
1073 printf ("- Warning: %d protected sectors will not be erased!\n",
1074 prot);
1075 } else {
1076 putc ('\n');
1077 }
wdenke65527f2004-02-12 00:47:09 +00001078
wdenke65527f2004-02-12 00:47:09 +00001079
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001080 for (sect = s_first; sect <= s_last; sect++) {
1081 if (info->protect[sect] == 0) { /* not protected */
1082 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001083 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001084 case CFI_CMDSET_INTEL_STANDARD:
1085 case CFI_CMDSET_INTEL_EXTENDED:
1086 flash_write_cmd (info, sect, 0,
1087 FLASH_CMD_CLEAR_STATUS);
1088 flash_write_cmd (info, sect, 0,
1089 FLASH_CMD_BLOCK_ERASE);
1090 flash_write_cmd (info, sect, 0,
1091 FLASH_CMD_ERASE_CONFIRM);
1092 break;
1093 case CFI_CMDSET_AMD_STANDARD:
1094 case CFI_CMDSET_AMD_EXTENDED:
1095 flash_unlock_seq (info, sect);
1096 flash_write_cmd (info, sect,
1097 info->addr_unlock1,
1098 AMD_CMD_ERASE_START);
1099 flash_unlock_seq (info, sect);
1100 flash_write_cmd (info, sect, 0,
1101 AMD_CMD_ERASE_SECTOR);
1102 break;
1103#ifdef CONFIG_FLASH_CFI_LEGACY
1104 case CFI_CMDSET_AMD_LEGACY:
1105 flash_unlock_seq (info, 0);
1106 flash_write_cmd (info, 0, info->addr_unlock1,
1107 AMD_CMD_ERASE_START);
1108 flash_unlock_seq (info, 0);
1109 flash_write_cmd (info, sect, 0,
1110 AMD_CMD_ERASE_SECTOR);
1111 break;
1112#endif
1113 default:
1114 debug ("Unkown flash vendor %d\n",
1115 info->vendor);
1116 break;
wdenke65527f2004-02-12 00:47:09 +00001117 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001118
1119 if (flash_full_status_check
1120 (info, sect, info->erase_blk_tout, "erase")) {
1121 rcode = 1;
1122 } else
1123 putc ('.');
wdenk2cefd152004-02-08 22:55:38 +00001124 }
wdenk2cefd152004-02-08 22:55:38 +00001125 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001126 puts (" done\n");
1127 return rcode;
wdenk2cefd152004-02-08 22:55:38 +00001128}
wdenke65527f2004-02-12 00:47:09 +00001129
wdenk2cefd152004-02-08 22:55:38 +00001130/*-----------------------------------------------------------------------
1131 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001132void flash_print_info (flash_info_t * info)
wdenk2cefd152004-02-08 22:55:38 +00001133{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001134 int i;
wdenk369d43d2004-03-14 14:09:05 +00001135
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001136 if (info->flash_id != FLASH_MAN_CFI) {
1137 puts ("missing or unknown FLASH type\n");
1138 return;
1139 }
1140
1141 printf ("%s FLASH (%d x %d)",
1142 info->name,
1143 (info->portwidth << 3), (info->chipwidth << 3));
1144 if (info->size < 1024*1024)
1145 printf (" Size: %ld kB in %d Sectors\n",
1146 info->size >> 10, info->sector_count);
1147 else
1148 printf (" Size: %ld MB in %d Sectors\n",
1149 info->size >> 20, info->sector_count);
1150 printf (" ");
1151 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001152 case CFI_CMDSET_INTEL_PROG_REGIONS:
1153 printf ("Intel Prog Regions");
1154 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001155 case CFI_CMDSET_INTEL_STANDARD:
1156 printf ("Intel Standard");
1157 break;
1158 case CFI_CMDSET_INTEL_EXTENDED:
1159 printf ("Intel Extended");
1160 break;
1161 case CFI_CMDSET_AMD_STANDARD:
1162 printf ("AMD Standard");
1163 break;
1164 case CFI_CMDSET_AMD_EXTENDED:
1165 printf ("AMD Extended");
1166 break;
1167#ifdef CONFIG_FLASH_CFI_LEGACY
1168 case CFI_CMDSET_AMD_LEGACY:
1169 printf ("AMD Legacy");
1170 break;
wdenk369d43d2004-03-14 14:09:05 +00001171#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001172 default:
1173 printf ("Unknown (%d)", info->vendor);
1174 break;
wdenk2cefd152004-02-08 22:55:38 +00001175 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001176 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1177 info->manufacturer_id, info->device_id);
1178 if (info->device_id == 0x7E) {
1179 printf("%04X", info->device_id2);
1180 }
1181 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1182 info->erase_blk_tout,
1183 info->write_tout);
1184 if (info->buffer_size > 1) {
1185 printf (" Buffer write timeout: %ld ms, "
1186 "buffer size: %d bytes\n",
1187 info->buffer_write_tout,
1188 info->buffer_size);
1189 }
wdenk2cefd152004-02-08 22:55:38 +00001190
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001191 puts ("\n Sector Start Addresses:");
1192 for (i = 0; i < info->sector_count; ++i) {
1193 if ((i % 5) == 0)
1194 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001195#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001196 int k;
1197 int size;
1198 int erased;
1199 volatile unsigned long *flash;
wdenk2cefd152004-02-08 22:55:38 +00001200
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001201 /*
1202 * Check if whole sector is erased
1203 */
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001204 size = flash_sector_size(info, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001205 erased = 1;
1206 flash = (volatile unsigned long *) info->start[i];
1207 size = size >> 2; /* divide by 4 for longword access */
1208 for (k = 0; k < size; k++) {
1209 if (*flash++ != 0xffffffff) {
1210 erased = 0;
1211 break;
1212 }
1213 }
wdenke65527f2004-02-12 00:47:09 +00001214
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001215 /* print empty and read-only info */
1216 printf (" %08lX %c %s ",
1217 info->start[i],
1218 erased ? 'E' : ' ',
1219 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001220#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001221 printf (" %08lX %s ",
1222 info->start[i],
1223 info->protect[i] ? "RO" : " ");
wdenke65527f2004-02-12 00:47:09 +00001224#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001225 }
1226 putc ('\n');
1227 return;
wdenk2cefd152004-02-08 22:55:38 +00001228}
1229
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001230/*-----------------------------------------------------------------------
Jerry Van Barenaae73572008-03-08 13:48:01 -05001231 * This is used in a few places in write_buf() to show programming
1232 * progress. Making it a function is nasty because it needs to do side
1233 * effect updates to digit and dots. Repeated code is nasty too, so
1234 * we define it once here.
1235 */
Stefan Roese7758c162008-03-19 07:09:26 +01001236#ifdef CONFIG_FLASH_SHOW_PROGRESS
1237#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1238 dots -= dots_sub; \
Jerry Van Barenaae73572008-03-08 13:48:01 -05001239 if ((scale > 0) && (dots <= 0)) { \
1240 if ((digit % 5) == 0) \
1241 printf ("%d", digit / 5); \
1242 else \
1243 putc ('.'); \
1244 digit--; \
1245 dots += scale; \
1246 }
Stefan Roese7758c162008-03-19 07:09:26 +01001247#else
1248#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1249#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001250
1251/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001252 * Copy memory to flash, returns:
1253 * 0 - OK
1254 * 1 - write timeout
1255 * 2 - Flash not erased
wdenk2cefd152004-02-08 22:55:38 +00001256 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001257int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk2cefd152004-02-08 22:55:38 +00001258{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001259 ulong wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001260 uchar *p;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001261 int aln;
wdenk2cefd152004-02-08 22:55:38 +00001262 cfiword_t cword;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001263 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001264#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001265 int buffered_size;
wdenk2cefd152004-02-08 22:55:38 +00001266#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001267#ifdef CONFIG_FLASH_SHOW_PROGRESS
1268 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1269 int scale = 0;
1270 int dots = 0;
1271
1272 /*
1273 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1274 */
1275 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1276 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1277 CONFIG_FLASH_SHOW_PROGRESS);
1278 }
1279#endif
1280
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001281 /* get lower aligned address */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001282 wp = (addr & ~(info->portwidth - 1));
Haiying Wangc123a382007-02-21 16:52:31 +01001283
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001284 /* handle unaligned start */
1285 if ((aln = addr - wp) != 0) {
1286 cword.l = 0;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001287 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1288 for (i = 0; i < aln; ++i)
1289 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk2cefd152004-02-08 22:55:38 +00001290
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001291 for (; (i < info->portwidth) && (cnt > 0); i++) {
1292 flash_add_byte (info, &cword, *src++);
1293 cnt--;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001294 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001295 for (; (cnt == 0) && (i < info->portwidth); ++i)
1296 flash_add_byte (info, &cword, flash_read8(p + i));
1297
1298 rc = flash_write_cfiword (info, wp, cword);
1299 unmap_physmem(p, info->portwidth);
1300 if (rc != 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001301 return rc;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001302
1303 wp += i;
Stefan Roese7758c162008-03-19 07:09:26 +01001304 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001305 }
1306
1307 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001308#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001309 buffered_size = (info->portwidth / info->chipwidth);
1310 buffered_size *= info->buffer_size;
1311 while (cnt >= info->portwidth) {
1312 /* prohibit buffer write when buffer_size is 1 */
1313 if (info->buffer_size == 1) {
1314 cword.l = 0;
1315 for (i = 0; i < info->portwidth; i++)
1316 flash_add_byte (info, &cword, *src++);
1317 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1318 return rc;
1319 wp += info->portwidth;
1320 cnt -= info->portwidth;
1321 continue;
1322 }
1323
1324 /* write buffer until next buffered_size aligned boundary */
1325 i = buffered_size - (wp % buffered_size);
1326 if (i > cnt)
1327 i = cnt;
1328 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1329 return rc;
1330 i -= i & (info->portwidth - 1);
1331 wp += i;
1332 src += i;
1333 cnt -= i;
Stefan Roese7758c162008-03-19 07:09:26 +01001334 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001335 }
1336#else
1337 while (cnt >= info->portwidth) {
1338 cword.l = 0;
1339 for (i = 0; i < info->portwidth; i++) {
1340 flash_add_byte (info, &cword, *src++);
1341 }
1342 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1343 return rc;
1344 wp += info->portwidth;
1345 cnt -= info->portwidth;
Stefan Roese7758c162008-03-19 07:09:26 +01001346 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001347 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001348#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Barenaae73572008-03-08 13:48:01 -05001349
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001350 if (cnt == 0) {
1351 return (0);
1352 }
1353
1354 /*
1355 * handle unaligned tail bytes
1356 */
1357 cword.l = 0;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001358 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1359 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001360 flash_add_byte (info, &cword, *src++);
1361 --cnt;
1362 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001363 for (; i < info->portwidth; ++i)
1364 flash_add_byte (info, &cword, flash_read8(p + i));
1365 unmap_physmem(p, info->portwidth);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001366
1367 return flash_write_cfiword (info, wp, cword);
wdenk2cefd152004-02-08 22:55:38 +00001368}
wdenke65527f2004-02-12 00:47:09 +00001369
wdenk2cefd152004-02-08 22:55:38 +00001370/*-----------------------------------------------------------------------
1371 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001372#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001373
1374int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk2cefd152004-02-08 22:55:38 +00001375{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001376 int retcode = 0;
wdenke65527f2004-02-12 00:47:09 +00001377
Rafael Campos13d2b612008-07-31 10:22:20 +02001378 switch (info->vendor) {
1379 case CFI_CMDSET_INTEL_PROG_REGIONS:
1380 case CFI_CMDSET_INTEL_STANDARD:
Nick Spenceec81b472008-08-19 22:21:16 -07001381 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Campos13d2b612008-07-31 10:22:20 +02001382 flash_write_cmd (info, sector, 0,
1383 FLASH_CMD_CLEAR_STATUS);
1384 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1385 if (prot)
1386 flash_write_cmd (info, sector, 0,
1387 FLASH_CMD_PROTECT_SET);
1388 else
1389 flash_write_cmd (info, sector, 0,
1390 FLASH_CMD_PROTECT_CLEAR);
1391 break;
1392 case CFI_CMDSET_AMD_EXTENDED:
1393 case CFI_CMDSET_AMD_STANDARD:
Rafael Campos13d2b612008-07-31 10:22:20 +02001394 /* U-Boot only checks the first byte */
1395 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1396 if (prot) {
1397 flash_unlock_seq (info, 0);
1398 flash_write_cmd (info, 0,
1399 info->addr_unlock1,
1400 ATM_CMD_SOFTLOCK_START);
1401 flash_unlock_seq (info, 0);
1402 flash_write_cmd (info, sector, 0,
1403 ATM_CMD_LOCK_SECT);
1404 } else {
1405 flash_write_cmd (info, 0,
1406 info->addr_unlock1,
1407 AMD_CMD_UNLOCK_START);
1408 if (info->device_id == ATM_ID_BV6416)
1409 flash_write_cmd (info, sector,
1410 0, ATM_CMD_UNLOCK_SECT);
1411 }
1412 }
1413 break;
TsiChung Liewb8c19292008-08-19 16:53:39 +00001414#ifdef CONFIG_FLASH_CFI_LEGACY
1415 case CFI_CMDSET_AMD_LEGACY:
1416 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1417 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1418 if (prot)
1419 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1420 else
1421 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1422#endif
Rafael Campos13d2b612008-07-31 10:22:20 +02001423 };
wdenk2cefd152004-02-08 22:55:38 +00001424
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001425 if ((retcode =
1426 flash_full_status_check (info, sector, info->erase_blk_tout,
1427 prot ? "protect" : "unprotect")) == 0) {
wdenke65527f2004-02-12 00:47:09 +00001428
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001429 info->protect[sector] = prot;
1430
1431 /*
1432 * On some of Intel's flash chips (marked via legacy_unlock)
1433 * unprotect unprotects all locking.
1434 */
1435 if ((prot == 0) && (info->legacy_unlock)) {
1436 flash_sect_t i;
1437
1438 for (i = 0; i < info->sector_count; i++) {
1439 if (info->protect[i])
1440 flash_real_protect (info, i, 1);
1441 }
wdenk2cefd152004-02-08 22:55:38 +00001442 }
wdenk2cefd152004-02-08 22:55:38 +00001443 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001444 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001445}
wdenke65527f2004-02-12 00:47:09 +00001446
wdenk2cefd152004-02-08 22:55:38 +00001447/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001448 * flash_read_user_serial - read the OneTimeProgramming cells
wdenk2cefd152004-02-08 22:55:38 +00001449 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001450void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1451 int len)
wdenk2cefd152004-02-08 22:55:38 +00001452{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001453 uchar *src;
1454 uchar *dst;
wdenke65527f2004-02-12 00:47:09 +00001455
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001456 dst = buffer;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001457 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001458 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1459 memcpy (dst, src + offset, len);
1460 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001461 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001462}
1463
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001464/*
1465 * flash_read_factory_serial - read the device Id from the protection area
wdenk2cefd152004-02-08 22:55:38 +00001466 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001467void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1468 int len)
wdenk2cefd152004-02-08 22:55:38 +00001469{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001470 uchar *src;
wdenke65527f2004-02-12 00:47:09 +00001471
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001472 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001473 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1474 memcpy (buffer, src + offset, len);
1475 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001476 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001477}
1478
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001479#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001480
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001481/*-----------------------------------------------------------------------
1482 * Reverse the order of the erase regions in the CFI QRY structure.
1483 * This is needed for chips that are either a) correctly detected as
1484 * top-boot, or b) buggy.
1485 */
1486static void cfi_reverse_geometry(struct cfi_qry *qry)
1487{
1488 unsigned int i, j;
1489 u32 tmp;
1490
1491 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1492 tmp = qry->erase_region_info[i];
1493 qry->erase_region_info[i] = qry->erase_region_info[j];
1494 qry->erase_region_info[j] = tmp;
1495 }
1496}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001497
wdenk2cefd152004-02-08 22:55:38 +00001498/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +01001499 * read jedec ids from device and set corresponding fields in info struct
1500 *
1501 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1502 *
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001503 */
1504static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1505{
1506 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1507 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1508 udelay(1000); /* some flash are slow to respond */
1509 info->manufacturer_id = flash_read_uchar (info,
1510 FLASH_OFFSET_MANUFACTURER_ID);
1511 info->device_id = flash_read_uchar (info,
1512 FLASH_OFFSET_DEVICE_ID);
1513 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1514}
1515
1516static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1517{
1518 info->cmd_reset = FLASH_CMD_RESET;
1519
1520 cmdset_intel_read_jedec_ids(info);
1521 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1522
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001523#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001524 /* read legacy lock/unlock bit from intel flash */
1525 if (info->ext_addr) {
1526 info->legacy_unlock = flash_read_uchar (info,
1527 info->ext_addr + 5) & 0x08;
1528 }
1529#endif
1530
1531 return 0;
1532}
1533
1534static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1535{
1536 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1537 flash_unlock_seq(info, 0);
1538 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1539 udelay(1000); /* some flash are slow to respond */
Tor Krill7f2a3052008-03-28 11:29:10 +01001540
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001541 info->manufacturer_id = flash_read_uchar (info,
1542 FLASH_OFFSET_MANUFACTURER_ID);
Tor Krill7f2a3052008-03-28 11:29:10 +01001543
1544 switch (info->chipwidth){
1545 case FLASH_CFI_8BIT:
1546 info->device_id = flash_read_uchar (info,
1547 FLASH_OFFSET_DEVICE_ID);
1548 if (info->device_id == 0x7E) {
1549 /* AMD 3-byte (expanded) device ids */
1550 info->device_id2 = flash_read_uchar (info,
1551 FLASH_OFFSET_DEVICE_ID2);
1552 info->device_id2 <<= 8;
1553 info->device_id2 |= flash_read_uchar (info,
1554 FLASH_OFFSET_DEVICE_ID3);
1555 }
1556 break;
1557 case FLASH_CFI_16BIT:
1558 info->device_id = flash_read_word (info,
1559 FLASH_OFFSET_DEVICE_ID);
1560 break;
1561 default:
1562 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001563 }
1564 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1565}
1566
1567static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1568{
1569 info->cmd_reset = AMD_CMD_RESET;
1570
1571 cmdset_amd_read_jedec_ids(info);
1572 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1573
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001574 return 0;
1575}
1576
1577#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese12797482006-11-13 13:55:24 +01001578static void flash_read_jedec_ids (flash_info_t * info)
1579{
1580 info->manufacturer_id = 0;
1581 info->device_id = 0;
1582 info->device_id2 = 0;
1583
1584 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001585 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese12797482006-11-13 13:55:24 +01001586 case CFI_CMDSET_INTEL_STANDARD:
1587 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001588 cmdset_intel_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001589 break;
1590 case CFI_CMDSET_AMD_STANDARD:
1591 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001592 cmdset_amd_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001593 break;
1594 default:
1595 break;
1596 }
1597}
1598
1599/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001600 * Call board code to request info about non-CFI flash.
1601 * board_flash_get_legacy needs to fill in at least:
1602 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001603 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001604static int flash_detect_legacy(ulong base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001605{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001606 flash_info_t *info = &flash_info[banknum];
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001607
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001608 if (board_flash_get_legacy(base, banknum, info)) {
1609 /* board code may have filled info completely. If not, we
1610 use JEDEC ID probing. */
1611 if (!info->vendor) {
1612 int modes[] = {
1613 CFI_CMDSET_AMD_STANDARD,
1614 CFI_CMDSET_INTEL_STANDARD
1615 };
1616 int i;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001617
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001618 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1619 info->vendor = modes[i];
1620 info->start[0] = base;
1621 if (info->portwidth == FLASH_CFI_8BIT
1622 && info->interface == FLASH_CFI_X8X16) {
1623 info->addr_unlock1 = 0x2AAA;
1624 info->addr_unlock2 = 0x5555;
1625 } else {
1626 info->addr_unlock1 = 0x5555;
1627 info->addr_unlock2 = 0x2AAA;
1628 }
1629 flash_read_jedec_ids(info);
1630 debug("JEDEC PROBE: ID %x %x %x\n",
1631 info->manufacturer_id,
1632 info->device_id,
1633 info->device_id2);
1634 if (jedec_flash_match(info, base))
1635 break;
1636 }
1637 }
1638
1639 switch(info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001640 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001641 case CFI_CMDSET_INTEL_STANDARD:
1642 case CFI_CMDSET_INTEL_EXTENDED:
1643 info->cmd_reset = FLASH_CMD_RESET;
1644 break;
1645 case CFI_CMDSET_AMD_STANDARD:
1646 case CFI_CMDSET_AMD_EXTENDED:
1647 case CFI_CMDSET_AMD_LEGACY:
1648 info->cmd_reset = AMD_CMD_RESET;
1649 break;
1650 }
1651 info->flash_id = FLASH_MAN_CFI;
1652 return 1;
1653 }
1654 return 0; /* use CFI */
1655}
1656#else
1657static inline int flash_detect_legacy(ulong base, int banknum)
1658{
1659 return 0; /* use CFI */
1660}
1661#endif
1662
1663/*-----------------------------------------------------------------------
1664 * detect if flash is compatible with the Common Flash Interface (CFI)
1665 * http://www.jedec.org/download/search/jesd68.pdf
1666 */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001667static void flash_read_cfi (flash_info_t *info, void *buf,
1668 unsigned int start, size_t len)
1669{
1670 u8 *p = buf;
1671 unsigned int i;
1672
1673 for (i = 0; i < len; i++)
1674 p[i] = flash_read_uchar(info, start + i);
1675}
1676
1677static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001678{
1679 int cfi_offset;
1680
Michael Schwingen4661cf72008-02-18 23:16:35 +01001681 /* We do not yet know what kind of commandset to use, so we issue
1682 the reset command in both Intel and AMD variants, in the hope
1683 that AMD flash roms ignore the Intel command. */
1684 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1685 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1686
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001687 for (cfi_offset=0;
1688 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1689 cfi_offset++) {
1690 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1691 FLASH_CMD_CFI);
1692 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1693 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1694 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001695 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1696 sizeof(struct cfi_qry));
1697 info->interface = le16_to_cpu(qry->interface_desc);
1698
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001699 info->cfi_offset = flash_offset_cfi[cfi_offset];
1700 debug ("device interface is %d\n",
1701 info->interface);
1702 debug ("found port %d chip %d ",
1703 info->portwidth, info->chipwidth);
1704 debug ("port %d bits chip %d bits\n",
1705 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1706 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1707
1708 /* calculate command offsets as in the Linux driver */
1709 info->addr_unlock1 = 0x555;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001710 info->addr_unlock2 = 0x2aa;
1711
1712 /*
1713 * modify the unlock address if we are
1714 * in compatibility mode
1715 */
1716 if ( /* x8/x16 in x8 mode */
1717 ((info->chipwidth == FLASH_CFI_BY8) &&
1718 (info->interface == FLASH_CFI_X8X16)) ||
1719 /* x16/x32 in x16 mode */
1720 ((info->chipwidth == FLASH_CFI_BY16) &&
1721 (info->interface == FLASH_CFI_X16X32)))
1722 {
1723 info->addr_unlock1 = 0xaaa;
1724 info->addr_unlock2 = 0x555;
1725 }
1726
1727 info->name = "CFI conformant";
1728 return 1;
1729 }
1730 }
1731
1732 return 0;
1733}
1734
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001735static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001736{
wdenke65527f2004-02-12 00:47:09 +00001737 debug ("flash detect cfi\n");
wdenk2cefd152004-02-08 22:55:38 +00001738
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001739 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenke65527f2004-02-12 00:47:09 +00001740 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1741 for (info->chipwidth = FLASH_CFI_BY8;
1742 info->chipwidth <= info->portwidth;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001743 info->chipwidth <<= 1)
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001744 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001745 return 1;
wdenk2cefd152004-02-08 22:55:38 +00001746 }
wdenke65527f2004-02-12 00:47:09 +00001747 debug ("not found\n");
wdenk2cefd152004-02-08 22:55:38 +00001748 return 0;
1749}
wdenke65527f2004-02-12 00:47:09 +00001750
wdenk2cefd152004-02-08 22:55:38 +00001751/*
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001752 * Manufacturer-specific quirks. Add workarounds for geometry
1753 * reversal, etc. here.
1754 */
1755static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1756{
1757 /* check if flash geometry needs reversal */
1758 if (qry->num_erase_regions > 1) {
1759 /* reverse geometry if top boot part */
1760 if (info->cfi_version < 0x3131) {
1761 /* CFI < 1.1, try to guess from device id */
1762 if ((info->device_id & 0x80) != 0)
1763 cfi_reverse_geometry(qry);
1764 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1765 /* CFI >= 1.1, deduct from top/bottom flag */
1766 /* note: ext_addr is valid since cfi_version > 0 */
1767 cfi_reverse_geometry(qry);
1768 }
1769 }
1770}
1771
1772static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1773{
1774 int reverse_geometry = 0;
1775
1776 /* Check the "top boot" bit in the PRI */
1777 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1778 reverse_geometry = 1;
1779
1780 /* AT49BV6416(T) list the erase regions in the wrong order.
1781 * However, the device ID is identical with the non-broken
1782 * AT49BV642D since u-boot only reads the low byte (they
1783 * differ in the high byte.) So leave out this fixup for now.
1784 */
1785#if 0
1786 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1787 reverse_geometry = !reverse_geometry;
1788#endif
1789
1790 if (reverse_geometry)
1791 cfi_reverse_geometry(qry);
1792}
1793
1794/*
wdenk2cefd152004-02-08 22:55:38 +00001795 * The following code cannot be run from FLASH!
1796 *
1797 */
Marian Balakowicz513b4a12005-10-11 19:09:42 +02001798ulong flash_get_size (ulong base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001799{
wdenke65527f2004-02-12 00:47:09 +00001800 flash_info_t *info = &flash_info[banknum];
wdenk2cefd152004-02-08 22:55:38 +00001801 int i, j;
1802 flash_sect_t sect_cnt;
1803 unsigned long sector;
1804 unsigned long tmp;
1805 int size_ratio;
1806 uchar num_erase_regions;
wdenke65527f2004-02-12 00:47:09 +00001807 int erase_region_size;
1808 int erase_region_count;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001809 struct cfi_qry qry;
Stefan Roese12797482006-11-13 13:55:24 +01001810
Kumar Gala899032b2008-05-15 15:13:08 -05001811 memset(&qry, 0, sizeof(qry));
1812
Stefan Roese12797482006-11-13 13:55:24 +01001813 info->ext_addr = 0;
1814 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001815#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roeseefef95b2006-04-01 13:41:03 +02001816 info->legacy_unlock = 0;
1817#endif
wdenk2cefd152004-02-08 22:55:38 +00001818
1819 info->start[0] = base;
1820
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001821 if (flash_detect_cfi (info, &qry)) {
1822 info->vendor = le16_to_cpu(qry.p_id);
1823 info->ext_addr = le16_to_cpu(qry.p_adr);
1824 num_erase_regions = qry.num_erase_regions;
1825
Stefan Roese12797482006-11-13 13:55:24 +01001826 if (info->ext_addr) {
1827 info->cfi_version = (ushort) flash_read_uchar (info,
1828 info->ext_addr + 3) << 8;
1829 info->cfi_version |= (ushort) flash_read_uchar (info,
1830 info->ext_addr + 4);
1831 }
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001832
wdenke65527f2004-02-12 00:47:09 +00001833#ifdef DEBUG
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001834 flash_printqry (&qry);
wdenke65527f2004-02-12 00:47:09 +00001835#endif
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001836
wdenke65527f2004-02-12 00:47:09 +00001837 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001838 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +00001839 case CFI_CMDSET_INTEL_STANDARD:
1840 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001841 cmdset_intel_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00001842 break;
1843 case CFI_CMDSET_AMD_STANDARD:
1844 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001845 cmdset_amd_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00001846 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001847 default:
1848 printf("CFI: Unknown command set 0x%x\n",
1849 info->vendor);
1850 /*
1851 * Unfortunately, this means we don't know how
1852 * to get the chip back to Read mode. Might
1853 * as well try an Intel-style reset...
1854 */
1855 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1856 return 0;
wdenk2cefd152004-02-08 22:55:38 +00001857 }
wdenk6cfa84e2004-02-10 00:03:41 +00001858
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01001859 /* Do manufacturer-specific fixups */
1860 switch (info->manufacturer_id) {
1861 case 0x0001:
1862 flash_fixup_amd(info, &qry);
1863 break;
1864 case 0x001f:
1865 flash_fixup_atmel(info, &qry);
1866 break;
1867 }
1868
wdenke65527f2004-02-12 00:47:09 +00001869 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese12797482006-11-13 13:55:24 +01001870 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1871 debug ("device id is 0x%x\n", info->device_id);
1872 debug ("device id2 is 0x%x\n", info->device_id2);
1873 debug ("cfi version is 0x%04x\n", info->cfi_version);
1874
wdenk2cefd152004-02-08 22:55:38 +00001875 size_ratio = info->portwidth / info->chipwidth;
wdenke65527f2004-02-12 00:47:09 +00001876 /* if the chip is x8/x16 reduce the ratio by half */
1877 if ((info->interface == FLASH_CFI_X8X16)
1878 && (info->chipwidth == FLASH_CFI_BY8)) {
1879 size_ratio >>= 1;
1880 }
wdenke65527f2004-02-12 00:47:09 +00001881 debug ("size_ratio %d port %d bits chip %d bits\n",
1882 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1883 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1884 debug ("found %d erase regions\n", num_erase_regions);
wdenk2cefd152004-02-08 22:55:38 +00001885 sect_cnt = 0;
1886 sector = base;
wdenke65527f2004-02-12 00:47:09 +00001887 for (i = 0; i < num_erase_regions; i++) {
1888 if (i > NUM_ERASE_REGIONS) {
wdenke537b3b2004-02-23 23:54:43 +00001889 printf ("%d erase regions found, only %d used\n",
1890 num_erase_regions, NUM_ERASE_REGIONS);
wdenk2cefd152004-02-08 22:55:38 +00001891 break;
1892 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001893
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001894 tmp = le32_to_cpu(qry.erase_region_info[i]);
1895 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001896
1897 erase_region_count = (tmp & 0xffff) + 1;
1898 tmp >>= 16;
wdenke65527f2004-02-12 00:47:09 +00001899 erase_region_size =
1900 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenkaeba06f2004-06-09 17:34:58 +00001901 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenke537b3b2004-02-23 23:54:43 +00001902 erase_region_count, erase_region_size);
wdenke65527f2004-02-12 00:47:09 +00001903 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001904 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen73d044d2007-12-07 23:35:02 +01001905 printf("ERROR: too many flash sectors\n");
1906 break;
1907 }
wdenk2cefd152004-02-08 22:55:38 +00001908 info->start[sect_cnt] = sector;
1909 sector += (erase_region_size * size_ratio);
wdenk26c58432005-01-09 17:12:27 +00001910
1911 /*
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001912 * Only read protection status from
1913 * supported devices (intel...)
wdenk26c58432005-01-09 17:12:27 +00001914 */
1915 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001916 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk26c58432005-01-09 17:12:27 +00001917 case CFI_CMDSET_INTEL_EXTENDED:
1918 case CFI_CMDSET_INTEL_STANDARD:
1919 info->protect[sect_cnt] =
1920 flash_isset (info, sect_cnt,
1921 FLASH_OFFSET_PROTECT,
1922 FLASH_STATUS_PROTECT);
1923 break;
1924 default:
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001925 /* default: not protected */
1926 info->protect[sect_cnt] = 0;
wdenk26c58432005-01-09 17:12:27 +00001927 }
1928
wdenk2cefd152004-02-08 22:55:38 +00001929 sect_cnt++;
1930 }
1931 }
1932
1933 info->sector_count = sect_cnt;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001934 info->size = 1 << qry.dev_size;
wdenk2cefd152004-02-08 22:55:38 +00001935 /* multiply the size by the number of chips */
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001936 info->size *= size_ratio;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001937 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1938 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001939 info->erase_blk_tout = tmp *
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001940 (1 << qry.block_erase_timeout_max);
1941 tmp = (1 << qry.buf_write_timeout_typ) *
1942 (1 << qry.buf_write_timeout_max);
1943
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001944 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001945 info->buffer_write_tout = (tmp + 999) / 1000;
1946 tmp = (1 << qry.word_write_timeout_typ) *
1947 (1 << qry.word_write_timeout_max);
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001948 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001949 info->write_tout = (tmp + 999) / 1000;
wdenk2cefd152004-02-08 22:55:38 +00001950 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001951 if ((info->interface == FLASH_CFI_X8X16) &&
1952 (info->chipwidth == FLASH_CFI_BY8)) {
1953 /* XXX - Need to test on x8/x16 in parallel. */
1954 info->portwidth >>= 1;
wdenked2ac4b2004-03-14 18:23:55 +00001955 }
Mike Frysinger59404ee2008-10-02 01:55:38 -04001956
1957 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +00001958 }
1959
wdenke65527f2004-02-12 00:47:09 +00001960 return (info->size);
wdenk2cefd152004-02-08 22:55:38 +00001961}
1962
wdenk2cefd152004-02-08 22:55:38 +00001963/*-----------------------------------------------------------------------
1964 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001965unsigned long flash_init (void)
wdenk2cefd152004-02-08 22:55:38 +00001966{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001967 unsigned long size = 0;
1968 int i;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001969#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchs50431522008-04-18 16:29:40 +02001970 struct apl_s {
1971 ulong start;
1972 ulong size;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001973 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchs50431522008-04-18 16:29:40 +02001974#endif
wdenk2cefd152004-02-08 22:55:38 +00001975
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001976#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001977 char *s = getenv("unlock");
Michael Schwingen73d044d2007-12-07 23:35:02 +01001978#endif
wdenk2cefd152004-02-08 22:55:38 +00001979
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001980#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +02001981
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001982 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001983 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001984 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk2cefd152004-02-08 22:55:38 +00001985
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +02001986 if (!flash_detect_legacy (BANK_BASE(i), i))
1987 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001988 size += flash_info[i].size;
1989 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001990#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001991 printf ("## Unknown FLASH on Bank %d "
1992 "- Size = 0x%08lx = %ld MB\n",
1993 i+1, flash_info[i].size,
1994 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001995#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001996 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001997#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001998 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1999 /*
2000 * Only the U-Boot image and it's environment
2001 * is protected, all other sectors are
2002 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002003 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002004 * and the environment variable "unlock" is
2005 * set to "yes".
2006 */
2007 if (flash_info[i].legacy_unlock) {
2008 int k;
wdenk2cefd152004-02-08 22:55:38 +00002009
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002010 /*
2011 * Disable legacy_unlock temporarily,
2012 * since flash_real_protect would
2013 * relock all other sectors again
2014 * otherwise.
2015 */
2016 flash_info[i].legacy_unlock = 0;
wdenk2cefd152004-02-08 22:55:38 +00002017
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002018 /*
2019 * Legacy unlocking (e.g. Intel J3) ->
2020 * unlock only one sector. This will
2021 * unlock all sectors.
2022 */
2023 flash_real_protect (&flash_info[i], 0, 0);
wdenk2cefd152004-02-08 22:55:38 +00002024
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002025 flash_info[i].legacy_unlock = 1;
wdenk2cefd152004-02-08 22:55:38 +00002026
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002027 /*
2028 * Manually mark other sectors as
2029 * unlocked (unprotected)
2030 */
2031 for (k = 1; k < flash_info[i].sector_count; k++)
2032 flash_info[i].protect[k] = 0;
2033 } else {
2034 /*
2035 * No legancy unlocking -> unlock all sectors
2036 */
2037 flash_protect (FLAG_PROTECT_CLEAR,
2038 flash_info[i].start[0],
2039 flash_info[i].start[0]
2040 + flash_info[i].size - 1,
2041 &flash_info[i]);
Stefan Roesec865e6c2006-02-28 15:29:58 +01002042 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002043 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002044#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002045 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002046
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002047 /* Monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002048#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002049 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002050 CONFIG_SYS_MONITOR_BASE,
2051 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2052 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002053#endif
Stefan Roesec865e6c2006-02-28 15:29:58 +01002054
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002055 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +02002056#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002057 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002058 CONFIG_ENV_ADDR,
2059 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2060 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002061#endif
Stefan Roesec865e6c2006-02-28 15:29:58 +01002062
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002063 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002064#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002065 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +02002066 CONFIG_ENV_ADDR_REDUND,
2067 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
2068 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002069#endif
Matthias Fuchs50431522008-04-18 16:29:40 +02002070
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002071#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchs50431522008-04-18 16:29:40 +02002072 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2073 debug("autoprotecting from %08x to %08x\n",
2074 apl[i].start, apl[i].start + apl[i].size - 1);
2075 flash_protect (FLAG_PROTECT_SET,
2076 apl[i].start,
2077 apl[i].start + apl[i].size - 1,
2078 flash_get_info(apl[i].start));
2079 }
2080#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002081 return (size);
wdenk2cefd152004-02-08 22:55:38 +00002082}