blob: 138501602c357ed75a83e113a6c2a21596f9cf41 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Steve Sakoman1ad21582010-06-08 13:07:46 -07002/*
3 *
Sricharan9310ff72011-11-15 09:49:55 -05004 * Common functions for OMAP4/5 based boards
Steve Sakoman1ad21582010-06-08 13:07:46 -07005 *
6 * (C) Copyright 2010
7 * Texas Instruments, <www.ti.com>
8 *
9 * Author :
10 * Aneesh V <aneesh@ti.com>
11 * Steve Sakoman <steve@sakoman.com>
Steve Sakoman1ad21582010-06-08 13:07:46 -070012 */
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +053013#include <debug_uart.h>
Simon Glassfc557362022-03-04 08:43:05 -070014#include <event.h>
Jean-Jacques Hiblot651201b2018-12-07 14:50:55 +010015#include <fdtdec.h>
Simon Glass97589732020-05-10 11:40:02 -060016#include <init.h>
Tom Rini28591df2012-08-13 12:03:19 -070017#include <spl.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070018#include <asm/arch/sys_proto.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060019#include <asm/global_data.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040020#include <linux/sizes.h>
Sricharan62a86502011-11-15 09:50:00 -050021#include <asm/emif.h>
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000022#include <asm/omap_common.h>
Lokesh Vutla28049632013-02-12 01:33:45 +000023#include <linux/compiler.h>
R Sricharan06396c12013-03-04 20:04:45 +000024#include <asm/system.h>
Jean-Jacques Hiblot651201b2018-12-07 14:50:55 +010025#include <dm/root.h>
R Sricharan06396c12013-03-04 20:04:45 +000026
Nishanth Menon4e5dd662010-11-19 11:19:40 -050027DECLARE_GLOBAL_DATA_PTR;
28
Aneesh Vf908b632011-07-21 09:10:01 -040029void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
30{
31 int i;
32 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
33
34 for (i = 0; i < size; i++, pad++)
35 writew(pad->val, base + pad->offset);
36}
37
Aneesh Vf908b632011-07-21 09:10:01 -040038static void set_mux_conf_regs(void)
39{
Sricharan9310ff72011-11-15 09:49:55 -050040 switch (omap_hw_init_context()) {
Aneesh Vf908b632011-07-21 09:10:01 -040041 case OMAP_INIT_CONTEXT_SPL:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010042 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040043 break;
44 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
Aneesh Vf908b632011-07-21 09:10:01 -040045 break;
46 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
47 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010048 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040049 break;
50 }
51}
52
Sricharan9310ff72011-11-15 09:49:55 -050053u32 cortex_rev(void)
Aneesh V162ced32011-07-21 09:10:04 -040054{
55
56 unsigned int rev;
57
58 /* Read Main ID Register (MIDR) */
59 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
60
61 return rev;
62}
63
Tom Rini01b2dd92013-05-31 10:44:23 -040064static void omap_rev_string(void)
Aneesh V162ced32011-07-21 09:10:04 -040065{
Sricharan9310ff72011-11-15 09:49:55 -050066 u32 omap_rev = omap_revision();
Lokesh Vutla43c296f2013-02-12 21:29:03 +000067 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
Sricharan9310ff72011-11-15 09:49:55 -050068 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
69 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
70 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
Aneesh V162ced32011-07-21 09:10:04 -040071
Lokesh Vutla69483e62017-12-29 11:47:51 +053072 const char *sec_s, *package = NULL;
Daniel Allredfd684b22016-05-19 19:10:52 -050073
74 switch (get_device_type()) {
75 case TST_DEVICE:
76 sec_s = "TST";
77 break;
78 case EMU_DEVICE:
79 sec_s = "EMU";
80 break;
81 case HS_DEVICE:
82 sec_s = "HS";
83 break;
84 case GP_DEVICE:
85 sec_s = "GP";
86 break;
87 default:
88 sec_s = "?";
89 }
90
Lokesh Vutla69483e62017-12-29 11:47:51 +053091#if defined(CONFIG_DRA7XX)
92 if (is_dra76x()) {
93 switch (omap_rev & 0xF) {
94 case DRA762_ABZ_PACKAGE:
95 package = "ABZ";
96 break;
97 case DRA762_ACD_PACKAGE:
98 default:
99 package = "ACD";
100 break;
101 }
102 }
103#endif
104
Lokesh Vutla43c296f2013-02-12 21:29:03 +0000105 if (soc_variant)
106 printf("OMAP");
107 else
108 printf("DRA");
Lokesh Vutla69483e62017-12-29 11:47:51 +0530109 printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
110 if (package)
111 printf(" %s package\n", package);
112 else
113 puts("\n");
Aneesh V162ced32011-07-21 09:10:04 -0400114}
115
Sricharan308fe922011-11-15 09:50:03 -0500116#ifdef CONFIG_SPL_BUILD
Tom Rinife3b0c72012-08-13 11:37:56 -0700117void spl_display_print(void)
118{
119 omap_rev_string();
120}
Sricharan308fe922011-11-15 09:50:03 -0500121#endif
122
Lokesh Vutla28049632013-02-12 01:33:45 +0000123void __weak srcomp_enable(void)
124{
SRICHARAN R4af19882013-04-24 00:41:23 +0000125}
126
Kipisz, Steven4466dfb2016-02-24 12:30:57 -0600127/**
128 * do_board_detect() - Detect board description
129 *
130 * Function to detect board description. This is expected to be
131 * overridden in the SoC family board file where desired.
132 */
133void __weak do_board_detect(void)
134{
135}
136
Keerthy35740ec2016-05-24 11:45:05 +0530137/**
138 * vcores_init() - Assign omap_vcores based on board
139 *
140 * Function to pick the vcores based on board. This is expected to be
141 * overridden in the SoC family board file where desired.
142 */
143void __weak vcores_init(void)
144{
145}
146
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530147void s_init(void)
148{
149}
150
151/**
Lokesh Vutla69483e62017-12-29 11:47:51 +0530152 * init_package_revision() - Initialize package revision
153 *
154 * Function to get the pacakage information. This is expected to be
155 * overridden in the SoC family file where desired.
156 */
157void __weak init_package_revision(void)
158{
159}
160
161/**
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530162 * early_system_init - Does Early system initialization.
163 *
164 * Does early system init of watchdog, muxing, andclocks
Aneesh Vf908b632011-07-21 09:10:01 -0400165 * Watchdog disable is done always. For the rest what gets done
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530166 * depends on the boot mode in which this function is executed when
167 * 1. SPL running from SRAM
168 * 2. U-Boot running from FLASH
169 * 3. U-Boot loaded to SDRAM by SPL
170 * 4. U-Boot loaded to SDRAM by ROM code using the
Aneesh Vf908b632011-07-21 09:10:01 -0400171 * Configuration Header feature
172 * Please have a look at the respective functions to see what gets
173 * done in each of these cases
174 * This function is called with SRAM stack.
Steve Sakoman1ad21582010-06-08 13:07:46 -0700175 */
Simon Glassb8357c12023-08-21 21:16:56 -0600176int early_system_init(void)
Steve Sakoman1ad21582010-06-08 13:07:46 -0700177{
Jean-Jacques Hiblot651201b2018-12-07 14:50:55 +0100178#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
179 int ret;
180 int rescan;
181#endif
Sricharan9310ff72011-11-15 09:49:55 -0500182 init_omap_revision();
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +0000183 hw_data_init();
Lokesh Vutla69483e62017-12-29 11:47:51 +0530184 init_package_revision();
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +0000185
Lokesh Vutlaba873772012-05-29 19:26:43 +0000186#ifdef CONFIG_SPL_BUILD
Lokesh Vutlae38b45a2016-07-12 14:47:41 +0530187 if (warm_reset())
Lokesh Vutlaba873772012-05-29 19:26:43 +0000188 force_emif_self_refresh();
189#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700190 watchdog_init();
Aneesh Vf908b632011-07-21 09:10:01 -0400191 set_mux_conf_regs();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400192#ifdef CONFIG_SPL_BUILD
Lokesh Vutla28049632013-02-12 01:33:45 +0000193 srcomp_enable();
Aneesh Vb35f7cb2011-09-08 11:05:56 -0400194 do_io_settings();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400195#endif
Kipisz, Stevenebe86dc2016-02-24 12:30:52 -0600196 setup_early_clocks();
Jean-Jacques Hiblot651201b2018-12-07 14:50:55 +0100197
Lokesh Vutlaca23da12017-06-27 13:50:56 +0530198#ifdef CONFIG_SPL_BUILD
199 /*
200 * Save the boot parameters passed from romcode.
201 * We cannot delay the saving further than this,
202 * to prevent overwrites.
203 */
204 save_omap_boot_params();
Jean-Jacques Hiblota68ca9e2017-09-15 12:57:33 +0200205 spl_early_init();
206#endif
Jean-Jacques Hiblot3a502f62018-12-07 14:50:45 +0100207 do_board_detect();
208
Jean-Jacques Hiblot651201b2018-12-07 14:50:55 +0100209#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
210 /*
211 * Board detection has been done.
212 * Let us see if another dtb wouldn't be a better match
213 * for our board
214 */
215 ret = fdtdec_resetup(&rescan);
216 if (!ret && rescan) {
217 dm_uninit();
218 dm_init_and_scan(true);
219 }
220#endif
221
Keerthy35740ec2016-05-24 11:45:05 +0530222 vcores_init();
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +0530223#ifdef CONFIG_DEBUG_UART_OMAP
224 debug_uart_init();
225#endif
Aneesh V0d2628b2011-07-21 09:10:07 -0400226 prcm_init();
Simon Glassb8357c12023-08-21 21:16:56 -0600227
228 return 0;
Simon Glass0c078ea2015-03-03 08:03:02 -0700229}
230
Aneesh Vb8e60b92011-07-21 09:10:21 -0400231#ifdef CONFIG_SPL_BUILD
Simon Glass0c078ea2015-03-03 08:03:02 -0700232void board_init_f(ulong dummy)
233{
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530234 early_system_init();
Lokesh Vutlabe86f0e2014-08-04 19:42:24 +0530235#ifdef CONFIG_BOARD_EARLY_INIT_F
236 board_early_init_f();
237#endif
Aneesh Vb8e60b92011-07-21 09:10:21 -0400238 /* For regular u-boot sdram_init() is called from dram_init() */
239 sdram_init();
Lokesh Vutlabed46ef2017-04-18 17:27:24 +0530240 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700241}
Simon Glass0c078ea2015-03-03 08:03:02 -0700242#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700243
Simon Glassb8357c12023-08-21 21:16:56 -0600244EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, early_system_init);
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530245
Steve Sakoman1ad21582010-06-08 13:07:46 -0700246/*
247 * Routine: wait_for_command_complete
248 * Description: Wait for posting to finish on watchdog
249 */
250void wait_for_command_complete(struct watchdog *wd_base)
251{
252 int pending = 1;
253 do {
254 pending = readl(&wd_base->wwps);
255 } while (pending);
256}
257
258/*
259 * Routine: watchdog_init
260 * Description: Shut down watch dogs
261 */
262void watchdog_init(void)
263{
264 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
265
266 writel(WD_UNLOCK1, &wd2_base->wspr);
267 wait_for_command_complete(wd2_base);
268 writel(WD_UNLOCK2, &wd2_base->wspr);
269}
270
Aneesh V04bd2b92010-09-12 10:32:55 +0530271
272/*
273 * This function finds the SDRAM size available in the system
274 * based on DMM section configurations
275 * This is needed because the size of memory installed may be
276 * different on different versions of the board
277 */
Sricharan9310ff72011-11-15 09:49:55 -0500278u32 omap_sdram_size(void)
Aneesh V04bd2b92010-09-12 10:32:55 +0530279{
SRICHARAN R015be792012-05-17 00:12:06 +0000280 u32 section, i, valid;
281 u64 sdram_start = 0, sdram_end = 0, addr,
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530282 size, total_size = 0, trap_size = 0, trap_start = 0;
Sricharan62a86502011-11-15 09:50:00 -0500283
Aneesh V04bd2b92010-09-12 10:32:55 +0530284 for (i = 0; i < 4; i++) {
Sricharan62a86502011-11-15 09:50:00 -0500285 section = __raw_readl(DMM_BASE + i*4);
SRICHARAN R015be792012-05-17 00:12:06 +0000286 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
287 (EMIF_SDRC_ADDRSPC_SHIFT);
Sricharan62a86502011-11-15 09:50:00 -0500288 addr = section & EMIF_SYS_ADDR_MASK;
SRICHARAN R015be792012-05-17 00:12:06 +0000289
Aneesh V04bd2b92010-09-12 10:32:55 +0530290 /* See if the address is valid */
Tom Rini72f36002014-05-16 13:02:24 -0400291 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
292 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
Sricharan62a86502011-11-15 09:50:00 -0500293 size = ((section & EMIF_SYS_SIZE_MASK) >>
294 EMIF_SYS_SIZE_SHIFT);
295 size = 1 << size;
296 size *= SZ_16M;
SRICHARAN R015be792012-05-17 00:12:06 +0000297
298 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
299 if (!sdram_start || (addr < sdram_start))
300 sdram_start = addr;
301 if (!sdram_end || ((addr + size) > sdram_end))
302 sdram_end = addr + size;
303 } else {
304 trap_size = size;
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530305 trap_start = addr;
SRICHARAN R015be792012-05-17 00:12:06 +0000306 }
Aneesh V04bd2b92010-09-12 10:32:55 +0530307 }
308 }
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530309
310 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
311 total_size = (sdram_end - sdram_start) - (trap_size);
312 else
313 total_size = sdram_end - sdram_start;
Sricharan62a86502011-11-15 09:50:00 -0500314
Aneesh V04bd2b92010-09-12 10:32:55 +0530315 return total_size;
316}
317
318
Steve Sakoman1ad21582010-06-08 13:07:46 -0700319/*
320 * Routine: dram_init
321 * Description: sets uboots idea of sdram size
322 */
323int dram_init(void)
324{
Aneesh Vcc565582011-07-21 09:10:09 -0400325 sdram_init();
Sricharan9310ff72011-11-15 09:49:55 -0500326 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700327 return 0;
328}
329
330/*
331 * Print board information
332 */
333int checkboard(void)
334{
335 puts(sysinfo.board_string);
336 return 0;
337}
338
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900339#if defined(CONFIG_DISPLAY_CPUINFO)
Sricharan9310ff72011-11-15 09:49:55 -0500340/*
341 * Print CPU information
342 */
343int print_cpuinfo(void)
Aneesh Ve3405bd2011-06-16 23:30:52 +0000344{
Andreas Müller0cda7a42012-01-04 15:26:24 +0000345 puts("CPU : ");
346 omap_rev_string();
Sricharan9310ff72011-11-15 09:49:55 -0500347
348 return 0;
349}
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900350#endif