Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 1 | menuconfig PCI |
| 2 | bool "PCI support" |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame] | 3 | depends on DM |
Bin Meng | 00a17fd | 2017-07-30 06:23:09 -0700 | [diff] [blame] | 4 | default y if PPC |
Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 5 | help |
| 6 | Enable support for PCI (Peripheral Interconnect Bus), a type of bus |
| 7 | used on some devices to allow the CPU to communicate with its |
| 8 | peripherals. |
| 9 | |
Simon Glass | 3933d29 | 2021-08-01 18:54:44 -0600 | [diff] [blame] | 10 | This subsystem requires driver model. |
Simon Glass | b94dc89 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 11 | |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame] | 12 | if PCI |
| 13 | |
Simon Glass | eca7b0d | 2015-11-26 19:51:30 -0700 | [diff] [blame] | 14 | config DM_PCI_COMPAT |
| 15 | bool "Enable compatible functions for PCI" |
Simon Glass | eca7b0d | 2015-11-26 19:51:30 -0700 | [diff] [blame] | 16 | help |
| 17 | Enable compatibility functions for PCI so that old code can be used |
Simon Glass | 3933d29 | 2021-08-01 18:54:44 -0600 | [diff] [blame] | 18 | with CONFIG_PCI enabled. This should be used as an interim |
Simon Glass | eca7b0d | 2015-11-26 19:51:30 -0700 | [diff] [blame] | 19 | measure when porting a board to use driver model for PCI. Once the |
| 20 | board is fully supported, this option should be disabled. |
| 21 | |
Wilson Ding | a6bdc86 | 2018-03-26 15:57:29 +0800 | [diff] [blame] | 22 | config PCI_AARDVARK |
| 23 | bool "Enable Aardvark PCIe driver" |
Pali Rohár | 5c6edca | 2020-08-25 10:45:04 +0200 | [diff] [blame] | 24 | depends on DM_GPIO |
Wilson Ding | a6bdc86 | 2018-03-26 15:57:29 +0800 | [diff] [blame] | 25 | depends on ARMADA_3700 |
| 26 | help |
| 27 | Say Y here if you want to enable PCIe controller support on |
| 28 | Armada37x0 SoCs. The PCIe controller on Armada37x0 is based on |
| 29 | Aardvark hardware. |
| 30 | |
Bin Meng | 2f49e2e | 2016-10-16 23:35:18 -0700 | [diff] [blame] | 31 | config PCI_PNP |
| 32 | bool "Enable Plug & Play support for PCI" |
Bin Meng | 2f49e2e | 2016-10-16 23:35:18 -0700 | [diff] [blame] | 33 | default y |
| 34 | help |
| 35 | Enable PCI memory and I/O space resource allocation and assignment. |
| 36 | |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 37 | config PCI_REGION_MULTI_ENTRY |
| 38 | bool "Enable Multiple entries of region type MEMORY in ranges for PCI" |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 39 | help |
| 40 | Enable PCI memory regions to be of multiple entry. Multiple entry |
| 41 | here refers to allow more than one count of address ranges for MEMORY |
| 42 | region type. This helps to add support for SoC's like OcteonTX/TX2 |
| 43 | where every peripheral is on the PCI bus. |
| 44 | |
Daniel Schwierzeck | f59925e | 2021-07-15 20:53:56 +0200 | [diff] [blame] | 45 | config PCI_MAP_SYSTEM_MEMORY |
| 46 | bool "Map local system memory from a virtual base address" |
Daniel Schwierzeck | f59925e | 2021-07-15 20:53:56 +0200 | [diff] [blame] | 47 | depends on MIPS |
Daniel Schwierzeck | f59925e | 2021-07-15 20:53:56 +0200 | [diff] [blame] | 48 | help |
| 49 | Say Y if base address of system memory is being used as a virtual address |
| 50 | instead of a physical address (e.g. on MIPS). The PCI core will then remap |
| 51 | the virtual memory base address to a physical address when adding the PCI |
| 52 | region of type PCI_REGION_SYS_MEMORY. |
| 53 | This should only be required on MIPS where CONFIG_SYS_SDRAM_BASE is still |
| 54 | being used as virtual address. |
| 55 | |
Suneel Garapati | 13822f7 | 2019-10-19 16:07:20 -0700 | [diff] [blame] | 56 | config PCI_SRIOV |
| 57 | bool "Enable Single Root I/O Virtualization support for PCI" |
Suneel Garapati | 13822f7 | 2019-10-19 16:07:20 -0700 | [diff] [blame] | 58 | help |
| 59 | Say Y here if you want to enable PCI Single Root I/O Virtualization |
| 60 | capability support. This helps to enumerate Virtual Function devices |
| 61 | if available on a PCI Physical Function device and probe for |
| 62 | applicable drivers. |
| 63 | |
Suneel Garapati | a99a5eb | 2019-10-23 18:40:36 -0700 | [diff] [blame] | 64 | config PCI_ARID |
| 65 | bool "Enable Alternate Routing-ID support for PCI" |
Suneel Garapati | a99a5eb | 2019-10-23 18:40:36 -0700 | [diff] [blame] | 66 | help |
| 67 | Say Y here if you want to enable Alternate Routing-ID capability |
| 68 | support on PCI devices. This helps to skip some devices in BDF |
| 69 | scan that are not present. |
| 70 | |
Tuomas Tynkkynen | a765f71 | 2017-09-19 23:18:06 +0300 | [diff] [blame] | 71 | config PCIE_ECAM_GENERIC |
| 72 | bool "Generic ECAM-based PCI host controller support" |
Tuomas Tynkkynen | a765f71 | 2017-09-19 23:18:06 +0300 | [diff] [blame] | 73 | help |
| 74 | Say Y here if you want to enable support for generic ECAM-based |
| 75 | PCIe host controllers, such as the one emulated by QEMU. |
| 76 | |
Masami Hiramatsu | 0685020 | 2021-06-04 18:44:06 +0900 | [diff] [blame] | 77 | config PCIE_ECAM_SYNQUACER |
| 78 | bool "SynQuacer ECAM-based PCI host controller support" |
Masami Hiramatsu | 0685020 | 2021-06-04 18:44:06 +0900 | [diff] [blame] | 79 | select PCI_INIT_R |
| 80 | select PCI_REGION_MULTI_ENTRY |
| 81 | help |
| 82 | Say Y here if you want to enable support for Socionext |
| 83 | SynQuacer SoC's ECAM-based PCIe host controllers. |
| 84 | Note that this must be configured when boot because Linux driver |
| 85 | expects the PCIe RC has been configured in the bootloader. |
| 86 | |
liu hao | 1c4a2c4 | 2019-10-31 07:51:08 +0000 | [diff] [blame] | 87 | config PCI_PHYTIUM |
| 88 | bool "Phytium PCIe support" |
liu hao | 1c4a2c4 | 2019-10-31 07:51:08 +0000 | [diff] [blame] | 89 | help |
| 90 | Say Y here if you want to enable PCIe controller support on |
| 91 | Phytium SoCs. |
| 92 | |
Shadi Ammouri | 3b38645 | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 93 | config PCIE_DW_MVEBU |
| 94 | bool "Enable Armada-8K PCIe driver (DesignWare core)" |
Shadi Ammouri | 3b38645 | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 95 | depends on ARMADA_8K |
| 96 | help |
| 97 | Say Y here if you want to enable PCIe controller support on |
| 98 | Armada-8K SoCs. The PCIe controller on Armada-8K is based on |
| 99 | DesignWare hardware. |
| 100 | |
Green Wan | ba5919b | 2021-05-27 06:52:10 -0700 | [diff] [blame] | 101 | config PCIE_DW_SIFIVE |
| 102 | bool "Enable SiFive FU740 PCIe" |
| 103 | depends on CLK_SIFIVE_PRCI |
| 104 | depends on RESET_SIFIVE |
| 105 | depends on SIFIVE_GPIO |
| 106 | select PCIE_DW_COMMON |
| 107 | help |
| 108 | Say Y here if you want to enable PCIe controller support on |
| 109 | FU740. |
| 110 | |
Hou Zhiqiang | 25ff98c | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 111 | config PCIE_FSL |
| 112 | bool "FSL PowerPC PCIe support" |
Hou Zhiqiang | 25ff98c | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 113 | help |
| 114 | Say Y here if you want to enable PCIe controller support on FSL |
| 115 | PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs. |
| 116 | This driver does not support SRIO_PCIE_BOOT feature. |
| 117 | |
Heiko Schocher | d647b46 | 2019-10-14 11:29:39 +0200 | [diff] [blame] | 118 | config PCI_MPC85XX |
| 119 | bool "MPC85XX PowerPC PCI support" |
Heiko Schocher | d647b46 | 2019-10-14 11:29:39 +0200 | [diff] [blame] | 120 | help |
| 121 | Say Y here if you want to enable PCI controller support on FSL |
| 122 | PowerPC MPC85xx SoC. |
| 123 | |
Marek Vasut | 5012d1e | 2018-01-18 14:35:35 +0100 | [diff] [blame] | 124 | config PCI_RCAR_GEN2 |
| 125 | bool "Renesas RCar Gen2 PCIe driver" |
Marek Vasut | 5012d1e | 2018-01-18 14:35:35 +0100 | [diff] [blame] | 126 | depends on RCAR_32 |
| 127 | help |
| 128 | Say Y here if you want to enable PCIe controller support on |
| 129 | Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is |
| 130 | also used to access EHCI USB controller on the SoC. |
| 131 | |
Marek Vasut | 879b4a3 | 2018-10-16 12:49:19 +0200 | [diff] [blame] | 132 | config PCI_RCAR_GEN3 |
| 133 | bool "Renesas RCar Gen3 PCIe driver" |
Marek Vasut | 879b4a3 | 2018-10-16 12:49:19 +0200 | [diff] [blame] | 134 | depends on RCAR_GEN3 |
| 135 | help |
| 136 | Say Y here if you want to enable PCIe controller support on |
| 137 | Renesas RCar Gen3 SoCs. |
| 138 | |
Simon Glass | 4d85755 | 2015-03-05 12:25:27 -0700 | [diff] [blame] | 139 | config PCI_SANDBOX |
| 140 | bool "Sandbox PCI support" |
Simon Glass | 3933d29 | 2021-08-01 18:54:44 -0600 | [diff] [blame] | 141 | depends on SANDBOX |
Simon Glass | 4d85755 | 2015-03-05 12:25:27 -0700 | [diff] [blame] | 142 | help |
| 143 | Support PCI on sandbox, as an emulated bus. This permits testing of |
| 144 | PCI feature such as bus scanning, device configuration and device |
| 145 | access. The available (emulated) devices are defined statically in |
| 146 | the device tree but the normal PCI scan technique is used to find |
| 147 | then. |
| 148 | |
Simon Glass | c78e327 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 149 | config PCI_TEGRA |
| 150 | bool "Tegra PCI support" |
Trevor Woerner | 513f640 | 2020-05-06 08:02:41 -0400 | [diff] [blame] | 151 | depends on ARCH_TEGRA |
Stephen Warren | 86f6a94 | 2016-08-05 16:10:34 -0600 | [diff] [blame] | 152 | depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186) |
Simon Glass | c78e327 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 153 | help |
| 154 | Enable support for the PCIe controller found on some generations of |
| 155 | Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has |
| 156 | 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports |
| 157 | with a total of 5 lanes. Some boards require this for Ethernet |
| 158 | support to work (e.g. beaver, jetson-tk1). |
| 159 | |
Suneel Garapati | 4c7d28c | 2019-10-19 17:28:01 -0700 | [diff] [blame] | 160 | config PCI_OCTEONTX |
| 161 | bool "OcteonTX PCI support" |
| 162 | depends on (ARCH_OCTEONTX || ARCH_OCTEONTX2) |
| 163 | help |
| 164 | Enable support for the OcteonTX/TX2 SoC family ECAM/PEM controllers. |
| 165 | These controllers provide PCI configuration access to all on-board |
| 166 | peripherals so it should only be disabled for testing purposes |
| 167 | |
Stefan Roese | 098c773 | 2021-04-07 08:43:35 +0200 | [diff] [blame] | 168 | config PCIE_OCTEON |
| 169 | bool "MIPS Octeon PCIe support" |
| 170 | depends on ARCH_OCTEON |
| 171 | help |
| 172 | Enable support for the MIPS Octeon SoC family PCIe controllers. |
| 173 | |
Paul Burton | c893f21 | 2016-09-08 07:47:31 +0100 | [diff] [blame] | 174 | config PCI_XILINX |
| 175 | bool "Xilinx AXI Bridge for PCI Express" |
Paul Burton | c893f21 | 2016-09-08 07:47:31 +0100 | [diff] [blame] | 176 | help |
| 177 | Enable support for the Xilinx AXI bridge for PCI express, an IP block |
| 178 | which can be used on some generations of Xilinx FPGAs. |
| 179 | |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 180 | config PCIE_LAYERSCAPE |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 181 | bool |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 182 | |
| 183 | config PCIE_LAYERSCAPE_RC |
| 184 | bool "Layerscape PCIe Root Complex mode support" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 185 | select PCIE_LAYERSCAPE |
| 186 | help |
| 187 | Enable Layerscape PCIe Root Complex mode driver support. The Layerscape |
| 188 | SoC may have one or several PCIe controllers. Each controller can be |
| 189 | configured to Root Complex mode by clearing the corresponding bit of |
| 190 | RCW[HOST_AGT_PEX]. |
| 191 | |
Laurentiu Tudor | 7fd2350 | 2020-09-10 12:42:19 +0300 | [diff] [blame] | 192 | config PCI_IOMMU_EXTRA_MAPPINGS |
| 193 | bool "Support for specifying extra IOMMU mappings for PCI" |
| 194 | depends on PCIE_LAYERSCAPE_RC |
| 195 | help |
| 196 | Enable support for specifying extra IOMMU mappings for PCI |
| 197 | controllers through a special env var called "pci_iommu_extra" or |
| 198 | through a device tree property named "pci-iommu-extra" placed in |
| 199 | the node describing the PCI controller. |
| 200 | The intent is to cover SR-IOV scenarios which need mappings for VFs |
| 201 | and PCI hot-plug scenarios. More documentation can be found under: |
| 202 | arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra |
| 203 | |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 204 | config PCIE_LAYERSCAPE_EP |
| 205 | bool "Layerscape PCIe Endpoint mode support" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 206 | select PCIE_LAYERSCAPE |
| 207 | select PCI_ENDPOINT |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 208 | help |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 209 | Enable Layerscape PCIe Endpoint mode driver support. The Layerscape |
| 210 | SoC may have one or several PCIe controllers. Each controller can be |
| 211 | configured to Endpoint mode by setting the corresponding bit of |
| 212 | RCW[HOST_AGT_PEX]. |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 213 | |
Hou Zhiqiang | e5d79c4 | 2019-04-08 10:15:46 +0000 | [diff] [blame] | 214 | config PCIE_LAYERSCAPE_GEN4 |
| 215 | bool "Layerscape Gen4 PCIe support" |
Hou Zhiqiang | e5d79c4 | 2019-04-08 10:15:46 +0000 | [diff] [blame] | 216 | help |
| 217 | Support PCIe Gen4 on NXP Layerscape SoCs, which may have one or |
| 218 | several PCIe controllers. The PCIe controller can work in RC or |
| 219 | EP mode according to RCW[HOST_AGT_PEX] setting. |
| 220 | |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 221 | config FSL_PCIE_COMPAT |
| 222 | string "PCIe compatible of Kernel DT" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 223 | depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 224 | default "fsl,ls1012a-pcie" if ARCH_LS1012A |
| 225 | default "fsl,ls1028a-pcie" if ARCH_LS1028A |
| 226 | default "fsl,ls1043a-pcie" if ARCH_LS1043A |
| 227 | default "fsl,ls1046a-pcie" if ARCH_LS1046A |
| 228 | default "fsl,ls2080a-pcie" if ARCH_LS2080A |
| 229 | default "fsl,ls1088a-pcie" if ARCH_LS1088A |
Hou Zhiqiang | a5b5663 | 2021-01-29 13:22:02 +0800 | [diff] [blame] | 230 | default "fsl,lx2160a-pcie" if ARCH_LX2160A |
| 231 | default "fsl,ls2088a-pcie" if ARCH_LX2162A |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 232 | default "fsl,ls1021a-pcie" if ARCH_LS1021A |
| 233 | help |
| 234 | This compatible is used to find pci controller node in Kernel DT |
| 235 | to complete fixup. |
| 236 | |
Pankaj Bansal | 64d85a2 | 2019-11-30 13:14:10 +0000 | [diff] [blame] | 237 | config FSL_PCIE_EP_COMPAT |
| 238 | string "PCIe EP compatible of Kernel DT" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 239 | depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 |
Hou Zhiqiang | a5b5663 | 2021-01-29 13:22:02 +0800 | [diff] [blame] | 240 | default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A |
Pankaj Bansal | 64d85a2 | 2019-11-30 13:14:10 +0000 | [diff] [blame] | 241 | default "fsl,ls-pcie-ep" |
| 242 | help |
| 243 | This compatible is used to find pci controller ep node in Kernel DT |
| 244 | to complete fixup. |
| 245 | |
Ley Foon Tan | dc05e63 | 2018-04-20 21:55:45 +0800 | [diff] [blame] | 246 | config PCIE_INTEL_FPGA |
| 247 | bool "Intel FPGA PCIe support" |
Ley Foon Tan | dc05e63 | 2018-04-20 21:55:45 +0800 | [diff] [blame] | 248 | help |
| 249 | Say Y here if you want to enable PCIe controller support on Intel |
| 250 | FPGA, example Stratix 10. |
| 251 | |
Srinath Mannam | d90ba42 | 2020-05-12 13:29:50 +0530 | [diff] [blame] | 252 | config PCIE_IPROC |
| 253 | bool "Iproc PCIe support" |
Srinath Mannam | d90ba42 | 2020-05-12 13:29:50 +0530 | [diff] [blame] | 254 | help |
| 255 | Broadcom iProc PCIe controller driver. |
| 256 | Say Y here if you want to enable Broadcom iProc PCIe controller, |
| 257 | |
Stefan Roese | 3179ec6 | 2019-01-25 11:52:43 +0100 | [diff] [blame] | 258 | config PCI_MVEBU |
| 259 | bool "Enable Armada XP/38x PCIe driver" |
| 260 | depends on ARCH_MVEBU |
Stefan Roese | 3179ec6 | 2019-01-25 11:52:43 +0100 | [diff] [blame] | 261 | select MISC |
| 262 | help |
| 263 | Say Y here if you want to enable PCIe controller support on |
| 264 | Armada XP/38x SoCs. |
| 265 | |
Neil Armstrong | b46caff | 2021-03-25 15:49:18 +0100 | [diff] [blame] | 266 | config PCIE_DW_COMMON |
| 267 | bool |
Neil Armstrong | b46caff | 2021-03-25 15:49:18 +0100 | [diff] [blame] | 268 | |
Sekhar Nori | 18db23d | 2019-08-01 19:12:57 +0530 | [diff] [blame] | 269 | config PCI_KEYSTONE |
| 270 | bool "TI Keystone PCIe controller" |
Neil Armstrong | c0c39ce | 2021-03-25 15:49:19 +0100 | [diff] [blame] | 271 | select PCIE_DW_COMMON |
Sekhar Nori | 18db23d | 2019-08-01 19:12:57 +0530 | [diff] [blame] | 272 | help |
| 273 | Say Y here if you want to enable PCI controller support on AM654 SoC. |
| 274 | |
developer | ad76773 | 2019-08-22 12:26:49 +0200 | [diff] [blame] | 275 | config PCIE_MEDIATEK |
| 276 | bool "MediaTek PCIe Gen2 controller" |
developer | ad76773 | 2019-08-22 12:26:49 +0200 | [diff] [blame] | 277 | depends on ARCH_MEDIATEK |
| 278 | help |
| 279 | Say Y here if you want to enable Gen2 PCIe controller, |
| 280 | which could be found on MT7623 SoC family. |
| 281 | |
Neil Armstrong | 06e006b | 2021-03-25 15:49:21 +0100 | [diff] [blame] | 282 | config PCIE_DW_MESON |
| 283 | bool "Amlogic Meson DesignWare based PCIe controller" |
| 284 | depends on ARCH_MESON |
| 285 | select PCIE_DW_COMMON |
| 286 | help |
| 287 | Say Y here if you want to enable DW PCIe controller support on |
| 288 | Amlogic SoCs. |
| 289 | |
Jagan Teki | 0226247 | 2020-05-09 22:26:21 +0530 | [diff] [blame] | 290 | config PCIE_ROCKCHIP |
| 291 | bool "Enable Rockchip PCIe driver" |
Michal Simek | 7f6d294 | 2020-08-19 10:44:15 +0200 | [diff] [blame] | 292 | depends on ARCH_ROCKCHIP |
Jagan Teki | 427603b | 2020-07-09 23:41:02 +0530 | [diff] [blame] | 293 | select PHY_ROCKCHIP_PCIE |
Jagan Teki | 0226247 | 2020-05-09 22:26:21 +0530 | [diff] [blame] | 294 | default y if ROCKCHIP_RK3399 |
| 295 | help |
| 296 | Say Y here if you want to enable PCIe controller support on |
| 297 | Rockchip SoCs. |
| 298 | |
Shawn Lin | c0649da | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 299 | config PCIE_DW_ROCKCHIP |
| 300 | bool "Rockchip DesignWare based PCIe controller" |
| 301 | depends on ARCH_ROCKCHIP |
Neil Armstrong | cf214c6 | 2021-03-25 15:49:20 +0100 | [diff] [blame] | 302 | select PCIE_DW_COMMON |
Shawn Lin | c0649da | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 303 | select PHY_ROCKCHIP_SNPS_PCIE3 |
| 304 | help |
| 305 | Say Y here if you want to enable DW PCIe controller support on |
| 306 | Rockchip SoCs. |
| 307 | |
Sylwester Nawrocki | 88f51f7 | 2020-05-25 13:39:58 +0200 | [diff] [blame] | 308 | config PCI_BRCMSTB |
| 309 | bool "Broadcom STB PCIe controller" |
Sylwester Nawrocki | 88f51f7 | 2020-05-25 13:39:58 +0200 | [diff] [blame] | 310 | depends on ARCH_BCM283X |
| 311 | help |
| 312 | Say Y here if you want to enable support for PCIe controller |
| 313 | on Broadcom set-top-box (STB) SoCs. |
| 314 | This driver currently supports only BCM2711 SoC and RC mode |
| 315 | of the controller. |
Kunihiko Hayashi | 741a1f9 | 2021-07-06 19:01:09 +0900 | [diff] [blame] | 316 | |
| 317 | config PCIE_UNIPHIER |
| 318 | bool "Socionext UniPhier PCIe driver" |
Kunihiko Hayashi | 741a1f9 | 2021-07-06 19:01:09 +0900 | [diff] [blame] | 319 | depends on ARCH_UNIPHIER |
| 320 | select PHY_UNIPHIER_PCIE |
| 321 | help |
| 322 | Say Y here if you want to enable PCIe controller support on |
| 323 | UniPhier SoCs. |
| 324 | |
Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 325 | endif |