Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 1 | menuconfig PCI |
| 2 | bool "PCI support" |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame^] | 3 | depends on DM |
Bin Meng | 00a17fd | 2017-07-30 06:23:09 -0700 | [diff] [blame] | 4 | default y if PPC |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame^] | 5 | select DM_PCI |
Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 6 | help |
| 7 | Enable support for PCI (Peripheral Interconnect Bus), a type of bus |
| 8 | used on some devices to allow the CPU to communicate with its |
| 9 | peripherals. |
| 10 | |
Simon Glass | b94dc89 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 11 | config DM_PCI |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame^] | 12 | bool |
Simon Glass | b94dc89 | 2015-03-05 12:25:25 -0700 | [diff] [blame] | 13 | help |
| 14 | Use driver model for PCI. Driver model is the new method for |
| 15 | orgnising devices in U-Boot. For PCI, driver model keeps track of |
| 16 | available PCI devices, allows scanning of PCI buses and provides |
| 17 | device configuration support. |
| 18 | |
Tom Rini | 5dec075 | 2021-05-14 21:34:32 -0400 | [diff] [blame^] | 19 | if PCI |
| 20 | |
Simon Glass | eca7b0d | 2015-11-26 19:51:30 -0700 | [diff] [blame] | 21 | config DM_PCI_COMPAT |
| 22 | bool "Enable compatible functions for PCI" |
| 23 | depends on DM_PCI |
| 24 | help |
| 25 | Enable compatibility functions for PCI so that old code can be used |
| 26 | with CONFIG_DM_PCI enabled. This should be used as an interim |
| 27 | measure when porting a board to use driver model for PCI. Once the |
| 28 | board is fully supported, this option should be disabled. |
| 29 | |
Wilson Ding | a6bdc86 | 2018-03-26 15:57:29 +0800 | [diff] [blame] | 30 | config PCI_AARDVARK |
| 31 | bool "Enable Aardvark PCIe driver" |
| 32 | default n |
| 33 | depends on DM_PCI |
Pali Rohár | 5c6edca | 2020-08-25 10:45:04 +0200 | [diff] [blame] | 34 | depends on DM_GPIO |
Wilson Ding | a6bdc86 | 2018-03-26 15:57:29 +0800 | [diff] [blame] | 35 | depends on ARMADA_3700 |
| 36 | help |
| 37 | Say Y here if you want to enable PCIe controller support on |
| 38 | Armada37x0 SoCs. The PCIe controller on Armada37x0 is based on |
| 39 | Aardvark hardware. |
| 40 | |
Bin Meng | 2f49e2e | 2016-10-16 23:35:18 -0700 | [diff] [blame] | 41 | config PCI_PNP |
| 42 | bool "Enable Plug & Play support for PCI" |
| 43 | depends on PCI || DM_PCI |
| 44 | default y |
| 45 | help |
| 46 | Enable PCI memory and I/O space resource allocation and assignment. |
| 47 | |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 48 | config PCI_REGION_MULTI_ENTRY |
| 49 | bool "Enable Multiple entries of region type MEMORY in ranges for PCI" |
| 50 | depends on PCI || DM_PCI |
| 51 | default n |
| 52 | help |
| 53 | Enable PCI memory regions to be of multiple entry. Multiple entry |
| 54 | here refers to allow more than one count of address ranges for MEMORY |
| 55 | region type. This helps to add support for SoC's like OcteonTX/TX2 |
| 56 | where every peripheral is on the PCI bus. |
| 57 | |
Daniel Schwierzeck | f59925e | 2021-07-15 20:53:56 +0200 | [diff] [blame] | 58 | config PCI_MAP_SYSTEM_MEMORY |
| 59 | bool "Map local system memory from a virtual base address" |
| 60 | depends on PCI || DM_PCI |
| 61 | depends on MIPS |
| 62 | default n |
| 63 | help |
| 64 | Say Y if base address of system memory is being used as a virtual address |
| 65 | instead of a physical address (e.g. on MIPS). The PCI core will then remap |
| 66 | the virtual memory base address to a physical address when adding the PCI |
| 67 | region of type PCI_REGION_SYS_MEMORY. |
| 68 | This should only be required on MIPS where CONFIG_SYS_SDRAM_BASE is still |
| 69 | being used as virtual address. |
| 70 | |
Suneel Garapati | 13822f7 | 2019-10-19 16:07:20 -0700 | [diff] [blame] | 71 | config PCI_SRIOV |
| 72 | bool "Enable Single Root I/O Virtualization support for PCI" |
| 73 | depends on PCI || DM_PCI |
| 74 | default n |
| 75 | help |
| 76 | Say Y here if you want to enable PCI Single Root I/O Virtualization |
| 77 | capability support. This helps to enumerate Virtual Function devices |
| 78 | if available on a PCI Physical Function device and probe for |
| 79 | applicable drivers. |
| 80 | |
Suneel Garapati | a99a5eb | 2019-10-23 18:40:36 -0700 | [diff] [blame] | 81 | config PCI_ARID |
| 82 | bool "Enable Alternate Routing-ID support for PCI" |
| 83 | depends on PCI || DM_PCI |
| 84 | default n |
| 85 | help |
| 86 | Say Y here if you want to enable Alternate Routing-ID capability |
| 87 | support on PCI devices. This helps to skip some devices in BDF |
| 88 | scan that are not present. |
| 89 | |
Tuomas Tynkkynen | a765f71 | 2017-09-19 23:18:06 +0300 | [diff] [blame] | 90 | config PCIE_ECAM_GENERIC |
| 91 | bool "Generic ECAM-based PCI host controller support" |
| 92 | default n |
| 93 | depends on DM_PCI |
| 94 | help |
| 95 | Say Y here if you want to enable support for generic ECAM-based |
| 96 | PCIe host controllers, such as the one emulated by QEMU. |
| 97 | |
Masami Hiramatsu | 0685020 | 2021-06-04 18:44:06 +0900 | [diff] [blame] | 98 | config PCIE_ECAM_SYNQUACER |
| 99 | bool "SynQuacer ECAM-based PCI host controller support" |
| 100 | default n |
| 101 | depends on DM_PCI |
| 102 | select PCI_INIT_R |
| 103 | select PCI_REGION_MULTI_ENTRY |
| 104 | help |
| 105 | Say Y here if you want to enable support for Socionext |
| 106 | SynQuacer SoC's ECAM-based PCIe host controllers. |
| 107 | Note that this must be configured when boot because Linux driver |
| 108 | expects the PCIe RC has been configured in the bootloader. |
| 109 | |
liu hao | 1c4a2c4 | 2019-10-31 07:51:08 +0000 | [diff] [blame] | 110 | config PCI_PHYTIUM |
| 111 | bool "Phytium PCIe support" |
| 112 | depends on DM_PCI |
| 113 | help |
| 114 | Say Y here if you want to enable PCIe controller support on |
| 115 | Phytium SoCs. |
| 116 | |
Shadi Ammouri | 3b38645 | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 117 | config PCIE_DW_MVEBU |
| 118 | bool "Enable Armada-8K PCIe driver (DesignWare core)" |
Shadi Ammouri | 3b38645 | 2016-10-27 13:29:41 +0200 | [diff] [blame] | 119 | depends on DM_PCI |
| 120 | depends on ARMADA_8K |
| 121 | help |
| 122 | Say Y here if you want to enable PCIe controller support on |
| 123 | Armada-8K SoCs. The PCIe controller on Armada-8K is based on |
| 124 | DesignWare hardware. |
| 125 | |
Green Wan | ba5919b | 2021-05-27 06:52:10 -0700 | [diff] [blame] | 126 | config PCIE_DW_SIFIVE |
| 127 | bool "Enable SiFive FU740 PCIe" |
| 128 | depends on CLK_SIFIVE_PRCI |
| 129 | depends on RESET_SIFIVE |
| 130 | depends on SIFIVE_GPIO |
| 131 | select PCIE_DW_COMMON |
| 132 | help |
| 133 | Say Y here if you want to enable PCIe controller support on |
| 134 | FU740. |
| 135 | |
Hou Zhiqiang | 25ff98c | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 136 | config PCIE_FSL |
| 137 | bool "FSL PowerPC PCIe support" |
| 138 | depends on DM_PCI |
| 139 | help |
| 140 | Say Y here if you want to enable PCIe controller support on FSL |
| 141 | PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs. |
| 142 | This driver does not support SRIO_PCIE_BOOT feature. |
| 143 | |
Heiko Schocher | d647b46 | 2019-10-14 11:29:39 +0200 | [diff] [blame] | 144 | config PCI_MPC85XX |
| 145 | bool "MPC85XX PowerPC PCI support" |
| 146 | depends on DM_PCI |
| 147 | help |
| 148 | Say Y here if you want to enable PCI controller support on FSL |
| 149 | PowerPC MPC85xx SoC. |
| 150 | |
Marek Vasut | 5012d1e | 2018-01-18 14:35:35 +0100 | [diff] [blame] | 151 | config PCI_RCAR_GEN2 |
| 152 | bool "Renesas RCar Gen2 PCIe driver" |
| 153 | depends on DM_PCI |
| 154 | depends on RCAR_32 |
| 155 | help |
| 156 | Say Y here if you want to enable PCIe controller support on |
| 157 | Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is |
| 158 | also used to access EHCI USB controller on the SoC. |
| 159 | |
Marek Vasut | 879b4a3 | 2018-10-16 12:49:19 +0200 | [diff] [blame] | 160 | config PCI_RCAR_GEN3 |
| 161 | bool "Renesas RCar Gen3 PCIe driver" |
| 162 | depends on DM_PCI |
| 163 | depends on RCAR_GEN3 |
| 164 | help |
| 165 | Say Y here if you want to enable PCIe controller support on |
| 166 | Renesas RCar Gen3 SoCs. |
| 167 | |
Simon Glass | 4d85755 | 2015-03-05 12:25:27 -0700 | [diff] [blame] | 168 | config PCI_SANDBOX |
| 169 | bool "Sandbox PCI support" |
| 170 | depends on SANDBOX && DM_PCI |
| 171 | help |
| 172 | Support PCI on sandbox, as an emulated bus. This permits testing of |
| 173 | PCI feature such as bus scanning, device configuration and device |
| 174 | access. The available (emulated) devices are defined statically in |
| 175 | the device tree but the normal PCI scan technique is used to find |
| 176 | then. |
| 177 | |
Simon Glass | c78e327 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 178 | config PCI_TEGRA |
| 179 | bool "Tegra PCI support" |
Trevor Woerner | 513f640 | 2020-05-06 08:02:41 -0400 | [diff] [blame] | 180 | depends on ARCH_TEGRA |
Stephen Warren | 86f6a94 | 2016-08-05 16:10:34 -0600 | [diff] [blame] | 181 | depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186) |
Simon Glass | c78e327 | 2015-11-19 20:26:55 -0700 | [diff] [blame] | 182 | help |
| 183 | Enable support for the PCIe controller found on some generations of |
| 184 | Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has |
| 185 | 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports |
| 186 | with a total of 5 lanes. Some boards require this for Ethernet |
| 187 | support to work (e.g. beaver, jetson-tk1). |
| 188 | |
Suneel Garapati | 4c7d28c | 2019-10-19 17:28:01 -0700 | [diff] [blame] | 189 | config PCI_OCTEONTX |
| 190 | bool "OcteonTX PCI support" |
| 191 | depends on (ARCH_OCTEONTX || ARCH_OCTEONTX2) |
| 192 | help |
| 193 | Enable support for the OcteonTX/TX2 SoC family ECAM/PEM controllers. |
| 194 | These controllers provide PCI configuration access to all on-board |
| 195 | peripherals so it should only be disabled for testing purposes |
| 196 | |
Stefan Roese | 098c773 | 2021-04-07 08:43:35 +0200 | [diff] [blame] | 197 | config PCIE_OCTEON |
| 198 | bool "MIPS Octeon PCIe support" |
| 199 | depends on ARCH_OCTEON |
| 200 | help |
| 201 | Enable support for the MIPS Octeon SoC family PCIe controllers. |
| 202 | |
Paul Burton | c893f21 | 2016-09-08 07:47:31 +0100 | [diff] [blame] | 203 | config PCI_XILINX |
| 204 | bool "Xilinx AXI Bridge for PCI Express" |
| 205 | depends on DM_PCI |
| 206 | help |
| 207 | Enable support for the Xilinx AXI bridge for PCI express, an IP block |
| 208 | which can be used on some generations of Xilinx FPGAs. |
| 209 | |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 210 | config PCIE_LAYERSCAPE |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 211 | bool |
| 212 | default n |
| 213 | |
| 214 | config PCIE_LAYERSCAPE_RC |
| 215 | bool "Layerscape PCIe Root Complex mode support" |
| 216 | depends on DM_PCI |
| 217 | select PCIE_LAYERSCAPE |
| 218 | help |
| 219 | Enable Layerscape PCIe Root Complex mode driver support. The Layerscape |
| 220 | SoC may have one or several PCIe controllers. Each controller can be |
| 221 | configured to Root Complex mode by clearing the corresponding bit of |
| 222 | RCW[HOST_AGT_PEX]. |
| 223 | |
Laurentiu Tudor | 7fd2350 | 2020-09-10 12:42:19 +0300 | [diff] [blame] | 224 | config PCI_IOMMU_EXTRA_MAPPINGS |
| 225 | bool "Support for specifying extra IOMMU mappings for PCI" |
| 226 | depends on PCIE_LAYERSCAPE_RC |
| 227 | help |
| 228 | Enable support for specifying extra IOMMU mappings for PCI |
| 229 | controllers through a special env var called "pci_iommu_extra" or |
| 230 | through a device tree property named "pci-iommu-extra" placed in |
| 231 | the node describing the PCI controller. |
| 232 | The intent is to cover SR-IOV scenarios which need mappings for VFs |
| 233 | and PCI hot-plug scenarios. More documentation can be found under: |
| 234 | arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra |
| 235 | |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 236 | config PCIE_LAYERSCAPE_EP |
| 237 | bool "Layerscape PCIe Endpoint mode support" |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 238 | depends on DM_PCI |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 239 | select PCIE_LAYERSCAPE |
| 240 | select PCI_ENDPOINT |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 241 | help |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 242 | Enable Layerscape PCIe Endpoint mode driver support. The Layerscape |
| 243 | SoC may have one or several PCIe controllers. Each controller can be |
| 244 | configured to Endpoint mode by setting the corresponding bit of |
| 245 | RCW[HOST_AGT_PEX]. |
Minghuan Lian | c106784 | 2016-12-13 14:54:17 +0800 | [diff] [blame] | 246 | |
Hou Zhiqiang | e5d79c4 | 2019-04-08 10:15:46 +0000 | [diff] [blame] | 247 | config PCIE_LAYERSCAPE_GEN4 |
| 248 | bool "Layerscape Gen4 PCIe support" |
| 249 | depends on DM_PCI |
| 250 | help |
| 251 | Support PCIe Gen4 on NXP Layerscape SoCs, which may have one or |
| 252 | several PCIe controllers. The PCIe controller can work in RC or |
| 253 | EP mode according to RCW[HOST_AGT_PEX] setting. |
| 254 | |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 255 | config FSL_PCIE_COMPAT |
| 256 | string "PCIe compatible of Kernel DT" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 257 | depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 258 | default "fsl,ls1012a-pcie" if ARCH_LS1012A |
| 259 | default "fsl,ls1028a-pcie" if ARCH_LS1028A |
| 260 | default "fsl,ls1043a-pcie" if ARCH_LS1043A |
| 261 | default "fsl,ls1046a-pcie" if ARCH_LS1046A |
| 262 | default "fsl,ls2080a-pcie" if ARCH_LS2080A |
| 263 | default "fsl,ls1088a-pcie" if ARCH_LS1088A |
Hou Zhiqiang | a5b5663 | 2021-01-29 13:22:02 +0800 | [diff] [blame] | 264 | default "fsl,lx2160a-pcie" if ARCH_LX2160A |
| 265 | default "fsl,ls2088a-pcie" if ARCH_LX2162A |
Pankaj Bansal | 4c65678 | 2019-11-30 13:14:00 +0000 | [diff] [blame] | 266 | default "fsl,ls1021a-pcie" if ARCH_LS1021A |
| 267 | help |
| 268 | This compatible is used to find pci controller node in Kernel DT |
| 269 | to complete fixup. |
| 270 | |
Pankaj Bansal | 64d85a2 | 2019-11-30 13:14:10 +0000 | [diff] [blame] | 271 | config FSL_PCIE_EP_COMPAT |
| 272 | string "PCIe EP compatible of Kernel DT" |
Hou Zhiqiang | 02f1f06 | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 273 | depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4 |
Hou Zhiqiang | a5b5663 | 2021-01-29 13:22:02 +0800 | [diff] [blame] | 274 | default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A |
Pankaj Bansal | 64d85a2 | 2019-11-30 13:14:10 +0000 | [diff] [blame] | 275 | default "fsl,ls-pcie-ep" |
| 276 | help |
| 277 | This compatible is used to find pci controller ep node in Kernel DT |
| 278 | to complete fixup. |
| 279 | |
Ley Foon Tan | dc05e63 | 2018-04-20 21:55:45 +0800 | [diff] [blame] | 280 | config PCIE_INTEL_FPGA |
| 281 | bool "Intel FPGA PCIe support" |
| 282 | depends on DM_PCI |
| 283 | help |
| 284 | Say Y here if you want to enable PCIe controller support on Intel |
| 285 | FPGA, example Stratix 10. |
| 286 | |
Srinath Mannam | d90ba42 | 2020-05-12 13:29:50 +0530 | [diff] [blame] | 287 | config PCIE_IPROC |
| 288 | bool "Iproc PCIe support" |
| 289 | depends on DM_PCI |
| 290 | help |
| 291 | Broadcom iProc PCIe controller driver. |
| 292 | Say Y here if you want to enable Broadcom iProc PCIe controller, |
| 293 | |
Stefan Roese | 3179ec6 | 2019-01-25 11:52:43 +0100 | [diff] [blame] | 294 | config PCI_MVEBU |
| 295 | bool "Enable Armada XP/38x PCIe driver" |
| 296 | depends on ARCH_MVEBU |
| 297 | select DM_PCI |
| 298 | select MISC |
| 299 | help |
| 300 | Say Y here if you want to enable PCIe controller support on |
| 301 | Armada XP/38x SoCs. |
| 302 | |
Neil Armstrong | b46caff | 2021-03-25 15:49:18 +0100 | [diff] [blame] | 303 | config PCIE_DW_COMMON |
| 304 | bool |
| 305 | select DM_PCI |
| 306 | |
Sekhar Nori | 18db23d | 2019-08-01 19:12:57 +0530 | [diff] [blame] | 307 | config PCI_KEYSTONE |
| 308 | bool "TI Keystone PCIe controller" |
Neil Armstrong | c0c39ce | 2021-03-25 15:49:19 +0100 | [diff] [blame] | 309 | select PCIE_DW_COMMON |
Sekhar Nori | 18db23d | 2019-08-01 19:12:57 +0530 | [diff] [blame] | 310 | help |
| 311 | Say Y here if you want to enable PCI controller support on AM654 SoC. |
| 312 | |
developer | ad76773 | 2019-08-22 12:26:49 +0200 | [diff] [blame] | 313 | config PCIE_MEDIATEK |
| 314 | bool "MediaTek PCIe Gen2 controller" |
| 315 | depends on DM_PCI |
| 316 | depends on ARCH_MEDIATEK |
| 317 | help |
| 318 | Say Y here if you want to enable Gen2 PCIe controller, |
| 319 | which could be found on MT7623 SoC family. |
| 320 | |
Neil Armstrong | 06e006b | 2021-03-25 15:49:21 +0100 | [diff] [blame] | 321 | config PCIE_DW_MESON |
| 322 | bool "Amlogic Meson DesignWare based PCIe controller" |
| 323 | depends on ARCH_MESON |
| 324 | select PCIE_DW_COMMON |
| 325 | help |
| 326 | Say Y here if you want to enable DW PCIe controller support on |
| 327 | Amlogic SoCs. |
| 328 | |
Jagan Teki | 0226247 | 2020-05-09 22:26:21 +0530 | [diff] [blame] | 329 | config PCIE_ROCKCHIP |
| 330 | bool "Enable Rockchip PCIe driver" |
Michal Simek | 7f6d294 | 2020-08-19 10:44:15 +0200 | [diff] [blame] | 331 | depends on ARCH_ROCKCHIP |
Jagan Teki | 0226247 | 2020-05-09 22:26:21 +0530 | [diff] [blame] | 332 | select DM_PCI |
Jagan Teki | 427603b | 2020-07-09 23:41:02 +0530 | [diff] [blame] | 333 | select PHY_ROCKCHIP_PCIE |
Jagan Teki | 0226247 | 2020-05-09 22:26:21 +0530 | [diff] [blame] | 334 | default y if ROCKCHIP_RK3399 |
| 335 | help |
| 336 | Say Y here if you want to enable PCIe controller support on |
| 337 | Rockchip SoCs. |
| 338 | |
Shawn Lin | c0649da | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 339 | config PCIE_DW_ROCKCHIP |
| 340 | bool "Rockchip DesignWare based PCIe controller" |
| 341 | depends on ARCH_ROCKCHIP |
Neil Armstrong | cf214c6 | 2021-03-25 15:49:20 +0100 | [diff] [blame] | 342 | select PCIE_DW_COMMON |
Shawn Lin | c0649da | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 343 | select PHY_ROCKCHIP_SNPS_PCIE3 |
| 344 | help |
| 345 | Say Y here if you want to enable DW PCIe controller support on |
| 346 | Rockchip SoCs. |
| 347 | |
Sylwester Nawrocki | 88f51f7 | 2020-05-25 13:39:58 +0200 | [diff] [blame] | 348 | config PCI_BRCMSTB |
| 349 | bool "Broadcom STB PCIe controller" |
| 350 | depends on DM_PCI |
| 351 | depends on ARCH_BCM283X |
| 352 | help |
| 353 | Say Y here if you want to enable support for PCIe controller |
| 354 | on Broadcom set-top-box (STB) SoCs. |
| 355 | This driver currently supports only BCM2711 SoC and RC mode |
| 356 | of the controller. |
Kunihiko Hayashi | 741a1f9 | 2021-07-06 19:01:09 +0900 | [diff] [blame] | 357 | |
| 358 | config PCIE_UNIPHIER |
| 359 | bool "Socionext UniPhier PCIe driver" |
| 360 | depends on DM_PCI |
| 361 | depends on ARCH_UNIPHIER |
| 362 | select PHY_UNIPHIER_PCIE |
| 363 | help |
| 364 | Say Y here if you want to enable PCIe controller support on |
| 365 | UniPhier SoCs. |
| 366 | |
Tom Rini | f48e025 | 2016-10-26 17:15:37 -0400 | [diff] [blame] | 367 | endif |