blob: ccc2080d8c244f34e486005ba0c83b724e1a36ff [file] [log] [blame]
Ian Campbelld8e69e02014-10-24 21:20:44 +01001if ARCH_SUNXI
2
3choice
4 prompt "Sunxi SoC Variant"
5
Ian Campbell4a24a1c2014-10-24 21:20:45 +01006config MACH_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +01007 bool "sun4i (Allwinner A10)"
8 select CPU_V7
9 select SUPPORT_SPL
10
Ian Campbell4a24a1c2014-10-24 21:20:45 +010011config MACH_SUN5I
Ian Campbelld8e69e02014-10-24 21:20:44 +010012 bool "sun5i (Allwinner A13)"
13 select CPU_V7
14 select SUPPORT_SPL
15
Ian Campbell4a24a1c2014-10-24 21:20:45 +010016config MACH_SUN6I
Ian Campbelld8e69e02014-10-24 21:20:44 +010017 bool "sun6i (Allwinner A31)"
18 select CPU_V7
Hans de Goedea5403b92014-10-25 20:18:10 +020019 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010020
Ian Campbell4a24a1c2014-10-24 21:20:45 +010021config MACH_SUN7I
Ian Campbelld8e69e02014-10-24 21:20:44 +010022 bool "sun7i (Allwinner A20)"
23 select CPU_V7
Hans de Goede85437352014-11-14 09:34:30 +010024 select CPU_V7_HAS_NONSEC
25 select CPU_V7_HAS_VIRT
Ian Campbelld8e69e02014-10-24 21:20:44 +010026 select SUPPORT_SPL
Hans de Goedea5636382014-10-24 20:12:04 +020027 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbelld8e69e02014-10-24 21:20:44 +010028
Ian Campbell4a24a1c2014-10-24 21:20:45 +010029config MACH_SUN8I
Ian Campbelld8e69e02014-10-24 21:20:44 +010030 bool "sun8i (Allwinner A23)"
31 select CPU_V7
Hans de Goede966d2392014-12-07 14:34:27 +010032 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010033
34endchoice
Maxime Ripard2c519412014-10-03 20:16:29 +080035
Hans de Goede3aeaa282014-11-15 19:46:39 +010036config DRAM_CLK
Hans de Goede59d9fc72015-01-17 14:24:55 +010037 int "sunxi dram clock speed"
38 default 312 if MACH_SUN6I || MACH_SUN8I
39 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010040 ---help---
41 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goede06ddc452015-01-25 11:29:27 +010042 of 24.
Hans de Goede3aeaa282014-11-15 19:46:39 +010043
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020044if MACH_SUN5I || MACH_SUN7I
45config DRAM_MBUS_CLK
46 int "sunxi mbus clock speed"
47 default 300
48 ---help---
49 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
50
51endif
52
Hans de Goede3aeaa282014-11-15 19:46:39 +010053config DRAM_ZQ
Hans de Goede59d9fc72015-01-17 14:24:55 +010054 int "sunxi dram zq value"
55 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
56 default 127 if MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010057 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010058 Set the dram zq value.
Hans de Goede3aeaa282014-11-15 19:46:39 +010059
Hans de Goede59d9fc72015-01-17 14:24:55 +010060if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
61config DRAM_EMR1
62 int "sunxi dram emr1 value"
63 default 0 if MACH_SUN4I
64 default 4 if MACH_SUN5I || MACH_SUN7I
65 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010066 Set the dram controller emr1 value.
Siarhei Siamashka9900db12015-02-01 00:27:05 +020067
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020068config DRAM_ODT_EN
69 int "sunxi dram odt_en value"
70 default 0
71 ---help---
72 Set the dram controller odt_en parameter. This can be used to
73 enable/disable the ODT feature.
74
75config DRAM_TPR3
76 hex "sunxi dram tpr3 value"
77 default 0
78 ---help---
79 Set the dram controller tpr3 parameter. This parameter configures
80 the delay on the command lane and also phase shifts, which are
81 applied for sampling incoming read data. The default value 0
82 means that no phase/delay adjustments are necessary. Properly
83 configuring this parameter increases reliability at high DRAM
84 clock speeds.
85
86config DRAM_DQS_GATING_DELAY
87 hex "sunxi dram dqs_gating_delay value"
88 default 0
89 ---help---
90 Set the dram controller dqs_gating_delay parmeter. Each byte
91 encodes the DQS gating delay for each byte lane. The delay
92 granularity is 1/4 cycle. For example, the value 0x05060606
93 means that the delay is 5 quarter-cycles for one lane (1.25
94 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
95 The default value 0 means autodetection. The results of hardware
96 autodetection are not very reliable and depend on the chip
97 temperature (sometimes producing different results on cold start
98 and warm reboot). But the accuracy of hardware autodetection
99 is usually good enough, unless running at really high DRAM
100 clocks speeds (up to 600MHz). If unsure, keep as 0.
101
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200102choice
103 prompt "sunxi dram timings"
104 default DRAM_TIMINGS_VENDOR_MAGIC
105 ---help---
106 Select the timings of the DDR3 chips.
107
108config DRAM_TIMINGS_VENDOR_MAGIC
109 bool "Magic vendor timings from Android"
110 ---help---
111 The same DRAM timings as in the Allwinner boot0 bootloader.
112
113config DRAM_TIMINGS_DDR3_1066F_1333H
114 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
115 ---help---
116 Use the timings of the standard JEDEC DDR3-1066F speed bin for
117 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
118 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
119 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
120 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
121 that down binning to DDR3-1066F is supported (because DDR3-1066F
122 uses a bit faster timings than DDR3-1333H).
123
124config DRAM_TIMINGS_DDR3_800E_1066G_1333J
125 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
126 ---help---
127 Use the timings of the slowest possible JEDEC speed bin for the
128 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
129 DDR3-800E, DDR3-1066G or DDR3-1333J.
130
131endchoice
132
Hans de Goede3aeaa282014-11-15 19:46:39 +0100133endif
134
Iain Paton630df142015-03-28 10:26:38 +0000135config SYS_CLK_FREQ
136 default 912000000 if MACH_SUN7I
137 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
138
Maxime Ripard2c519412014-10-03 20:16:29 +0800139config SYS_CONFIG_NAME
Ian Campbell4a24a1c2014-10-24 21:20:45 +0100140 default "sun4i" if MACH_SUN4I
141 default "sun5i" if MACH_SUN5I
142 default "sun6i" if MACH_SUN6I
143 default "sun7i" if MACH_SUN7I
144 default "sun8i" if MACH_SUN8I
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900145
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900146config SYS_BOARD
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900147 default "sunxi"
148
149config SYS_SOC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900150 default "sunxi"
151
Ian Campbell8ad104b2014-10-24 21:20:46 +0100152config SPL_FEL
153 bool "SPL/FEL mode support"
154 depends on SPL
155 default n
Simon Glass5debe1f2015-02-07 10:47:30 -0700156 help
157 This enables support for Fast Early Loader (FEL) mode. This
158 allows U-Boot to be loaded to the board over USB by the on-chip
159 boot rom. U-Boot should be sent in two parts: SPL first, with
160 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
161 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
162 shrinks the amount of SRAM available to SPL, so only enable it if
163 you need FEL. Note that enabling this option only allows FEL to be
164 used; it is still possible to boot U-Boot from boot media. U-Boot
165 SPL detects when it is being loaded using FEL.
Ian Campbell8ad104b2014-10-24 21:20:46 +0100166
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200167config UART0_PORT_F
168 bool "UART0 on MicroSD breakout board"
169 depends on SPL_FEL
170 default n
171 ---help---
172 Repurpose the SD card slot for getting access to the UART0 serial
173 console. Primarily useful only for low level u-boot debugging on
174 tablets, where normal UART0 is difficult to access and requires
175 device disassembly and/or soldering. As the SD card can't be used
176 at the same time, the system can be only booted in the FEL mode.
177 Only enable this if you really know what you are doing.
178
Ian Campbell9536fc42014-08-31 13:13:43 +0100179config FDTFILE
180 string "Default fdtfile env setting for this board"
Hans de Goede2f60c312014-08-01 09:37:58 +0200181
Hans de Goede05e5bcb2014-10-22 14:56:36 +0200182config OLD_SUNXI_KERNEL_COMPAT
183 boolean "Enable workarounds for booting old kernels"
184 default n
185 ---help---
186 Set this to enable various workarounds for old kernels, this results in
187 sub-optimal settings for newer kernels, only enable if needed.
188
Hans de Goede7412ef82014-10-02 20:29:26 +0200189config MMC0_CD_PIN
190 string "Card detect pin for mmc0"
191 default ""
192 ---help---
193 Set the card detect pin for mmc0, leave empty to not use cd. This
194 takes a string in the format understood by sunxi_name_to_gpio, e.g.
195 PH1 for pin 1 of port H.
196
197config MMC1_CD_PIN
198 string "Card detect pin for mmc1"
199 default ""
200 ---help---
201 See MMC0_CD_PIN help text.
202
203config MMC2_CD_PIN
204 string "Card detect pin for mmc2"
205 default ""
206 ---help---
207 See MMC0_CD_PIN help text.
208
209config MMC3_CD_PIN
210 string "Card detect pin for mmc3"
211 default ""
212 ---help---
213 See MMC0_CD_PIN help text.
214
Paul Kocialkowskid390d8c2015-03-22 18:12:23 +0100215config MMC1_PINS
216 string "Pins for mmc1"
217 default ""
218 ---help---
219 Set the pins used for mmc1, when applicable. This takes a string in the
220 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
221
222config MMC2_PINS
223 string "Pins for mmc2"
224 default ""
225 ---help---
226 See MMC1_PINS help text.
227
228config MMC3_PINS
229 string "Pins for mmc3"
230 default ""
231 ---help---
232 See MMC1_PINS help text.
233
Hans de Goedeaf593e42014-10-02 20:43:50 +0200234config MMC_SUNXI_SLOT_EXTRA
235 int "mmc extra slot number"
236 default -1
237 ---help---
238 sunxi builds always enable mmc0, some boards also have a second sdcard
239 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
240 support for this.
241
Hans de Goedee7b852a2015-01-07 15:26:06 +0100242config USB0_VBUS_PIN
243 string "Vbus enable pin for usb0 (otg)"
244 default ""
245 ---help---
246 Set the Vbus enable pin for usb0 (otg). This takes a string in the
247 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
248
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100249config USB0_VBUS_DET
250 string "Vbus detect pin for usb0 (otg)"
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100251 default ""
252 ---help---
253 Set the Vbus detect pin for usb0 (otg). This takes a string in the
254 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
255
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100256config USB1_VBUS_PIN
257 string "Vbus enable pin for usb1 (ehci0)"
258 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100259 default "PH27" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100260 ---help---
261 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
262 a string in the format understood by sunxi_name_to_gpio, e.g.
263 PH1 for pin 1 of port H.
264
265config USB2_VBUS_PIN
266 string "Vbus enable pin for usb2 (ehci1)"
267 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100268 default "PH24" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100269 ---help---
270 See USB1_VBUS_PIN help text.
271
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200272config VIDEO
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100273 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200274 default y
275 ---help---
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100276 Say Y here to add support for using a cfb console on the HDMI, LCD
277 or VGA output found on most sunxi devices. See doc/README.video for
278 info on how to select the video output and mode.
279
Hans de Goedee9544592014-12-23 23:04:35 +0100280config VIDEO_HDMI
281 boolean "HDMI output support"
282 depends on VIDEO && !MACH_SUN8I
283 default y
284 ---help---
285 Say Y here to add support for outputting video over HDMI.
286
Hans de Goede260f5202014-12-25 13:58:06 +0100287config VIDEO_VGA
288 boolean "VGA output support"
289 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
290 default n
291 ---help---
292 Say Y here to add support for outputting video over VGA.
293
Hans de Goedeac1633c2014-12-24 12:17:07 +0100294config VIDEO_VGA_VIA_LCD
295 boolean "VGA via LCD controller support"
Chen-Yu Tsai39ca4c12015-01-12 18:02:10 +0800296 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedeac1633c2014-12-24 12:17:07 +0100297 default n
298 ---help---
299 Say Y here to add support for external DACs connected to the parallel
300 LCD interface driving a VGA connector, such as found on the
301 Olimex A13 boards.
302
Hans de Goede18366f72015-01-25 15:33:07 +0100303config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
304 boolean "Force sync active high for VGA via LCD controller support"
305 depends on VIDEO_VGA_VIA_LCD
306 default n
307 ---help---
308 Say Y here if you've a board which uses opendrain drivers for the vga
309 hsync and vsync signals. Opendrain drivers cannot generate steep enough
310 positive edges for a stable video output, so on boards with opendrain
311 drivers the sync signals must always be active high.
312
Chen-Yu Tsai9ed19522015-01-12 18:02:11 +0800313config VIDEO_VGA_EXTERNAL_DAC_EN
314 string "LCD panel power enable pin"
315 depends on VIDEO_VGA_VIA_LCD
316 default ""
317 ---help---
318 Set the enable pin for the external VGA DAC. This takes a string in the
319 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
320
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100321config VIDEO_LCD_MODE
322 string "LCD panel timing details"
323 depends on VIDEO
324 default ""
325 ---help---
326 LCD panel timing details string, leave empty if there is no LCD panel.
327 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
328 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
329
Hans de Goede481b6642015-01-13 13:21:46 +0100330config VIDEO_LCD_DCLK_PHASE
331 int "LCD panel display clock phase"
332 depends on VIDEO
333 default 1
334 ---help---
335 Select LCD panel display clock phase shift, range 0-3.
336
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100337config VIDEO_LCD_POWER
338 string "LCD panel power enable pin"
339 depends on VIDEO
340 default ""
341 ---help---
342 Set the power enable pin for the LCD panel. This takes a string in the
343 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
344
Hans de Goedece9e3322015-02-16 17:26:41 +0100345config VIDEO_LCD_RESET
346 string "LCD panel reset pin"
347 depends on VIDEO
348 default ""
349 ---help---
350 Set the reset pin for the LCD panel. This takes a string in the format
351 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
352
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100353config VIDEO_LCD_BL_EN
354 string "LCD panel backlight enable pin"
355 depends on VIDEO
356 default ""
357 ---help---
358 Set the backlight enable pin for the LCD panel. This takes a string in the
359 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
360 port H.
361
362config VIDEO_LCD_BL_PWM
363 string "LCD panel backlight pwm pin"
364 depends on VIDEO
365 default ""
366 ---help---
367 Set the backlight pwm pin for the LCD panel. This takes a string in the
368 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200369
Hans de Goede2d5d3022015-01-22 21:02:42 +0100370config VIDEO_LCD_BL_PWM_ACTIVE_LOW
371 bool "LCD panel backlight pwm is inverted"
372 depends on VIDEO
373 default y
374 ---help---
375 Set this if the backlight pwm output is active low.
376
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100377config VIDEO_LCD_PANEL_I2C
378 bool "LCD panel needs to be configured via i2c"
379 depends on VIDEO
Hans de Goede6de9f762015-03-07 12:00:02 +0100380 default n
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100381 ---help---
382 Say y here if the LCD panel needs to be configured via i2c. This
383 will add a bitbang i2c controller using gpios to talk to the LCD.
384
385config VIDEO_LCD_PANEL_I2C_SDA
386 string "LCD panel i2c interface SDA pin"
387 depends on VIDEO_LCD_PANEL_I2C
388 default "PG12"
389 ---help---
390 Set the SDA pin for the LCD i2c interface. This takes a string in the
391 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
392
393config VIDEO_LCD_PANEL_I2C_SCL
394 string "LCD panel i2c interface SCL pin"
395 depends on VIDEO_LCD_PANEL_I2C
396 default "PG10"
397 ---help---
398 Set the SCL pin for the LCD i2c interface. This takes a string in the
399 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
400
Hans de Goede797a0f52015-01-01 22:04:34 +0100401
402# Note only one of these may be selected at a time! But hidden choices are
403# not supported by Kconfig
404config VIDEO_LCD_IF_PARALLEL
405 bool
406
407config VIDEO_LCD_IF_LVDS
408 bool
409
410
411choice
412 prompt "LCD panel support"
413 depends on VIDEO
414 ---help---
415 Select which type of LCD panel to support.
416
417config VIDEO_LCD_PANEL_PARALLEL
418 bool "Generic parallel interface LCD panel"
419 select VIDEO_LCD_IF_PARALLEL
420
421config VIDEO_LCD_PANEL_LVDS
422 bool "Generic lvds interface LCD panel"
423 select VIDEO_LCD_IF_LVDS
424
Siarhei Siamashkac02f0522015-01-19 05:23:33 +0200425config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
426 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
427 select VIDEO_LCD_SSD2828
428 select VIDEO_LCD_IF_PARALLEL
429 ---help---
430 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
431
Hans de Goede743fb9552015-01-20 09:23:36 +0100432config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
433 bool "Hitachi tx18d42vm LCD panel"
434 select VIDEO_LCD_HITACHI_TX18D42VM
435 select VIDEO_LCD_IF_LVDS
436 ---help---
437 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
438
Hans de Goede613dade2015-02-16 17:49:47 +0100439config VIDEO_LCD_TL059WV5C0
440 bool "tl059wv5c0 LCD panel"
441 select VIDEO_LCD_PANEL_I2C
442 select VIDEO_LCD_IF_PARALLEL
443 ---help---
444 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
445 Aigo M60/M608/M606 tablets.
446
Hans de Goede797a0f52015-01-01 22:04:34 +0100447endchoice
448
449
Hans de Goedef494cad2015-01-11 17:17:00 +0100450config USB_MUSB_SUNXI
451 bool "Enable sunxi OTG / DRC USB controller in host mode"
452 default n
453 ---help---
454 Say y here to enable support for the sunxi OTG / DRC USB controller
455 used on almost all sunxi boards. Note currently u-boot can only have
456 one usb host controller enabled at a time, so enabling this on boards
457 which also use the ehci host controller will result in build errors.
458
Hans de Goede16030822014-09-18 21:03:34 +0200459config USB_KEYBOARD
460 boolean "Enable USB keyboard support"
461 default y
462 ---help---
463 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100464 in combination with a graphical console).
Hans de Goede16030822014-09-18 21:03:34 +0200465
Hans de Goedebf880fe2015-01-25 12:10:48 +0100466config GMAC_TX_DELAY
467 int "GMAC Transmit Clock Delay Chain"
468 default 0
469 ---help---
470 Set the GMAC Transmit Clock Delay Chain value.
471
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900472endif