blob: 98228e87ff739e433cf1f3714307d77b44117629 [file] [log] [blame]
Ian Campbelld8e69e02014-10-24 21:20:44 +01001if ARCH_SUNXI
2
3choice
4 prompt "Sunxi SoC Variant"
5
Ian Campbell4a24a1c2014-10-24 21:20:45 +01006config MACH_SUN4I
Ian Campbelld8e69e02014-10-24 21:20:44 +01007 bool "sun4i (Allwinner A10)"
8 select CPU_V7
9 select SUPPORT_SPL
10
Ian Campbell4a24a1c2014-10-24 21:20:45 +010011config MACH_SUN5I
Ian Campbelld8e69e02014-10-24 21:20:44 +010012 bool "sun5i (Allwinner A13)"
13 select CPU_V7
14 select SUPPORT_SPL
15
Ian Campbell4a24a1c2014-10-24 21:20:45 +010016config MACH_SUN6I
Ian Campbelld8e69e02014-10-24 21:20:44 +010017 bool "sun6i (Allwinner A31)"
18 select CPU_V7
Hans de Goedea5403b92014-10-25 20:18:10 +020019 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010020
Ian Campbell4a24a1c2014-10-24 21:20:45 +010021config MACH_SUN7I
Ian Campbelld8e69e02014-10-24 21:20:44 +010022 bool "sun7i (Allwinner A20)"
23 select CPU_V7
Hans de Goede85437352014-11-14 09:34:30 +010024 select CPU_V7_HAS_NONSEC
25 select CPU_V7_HAS_VIRT
Ian Campbelld8e69e02014-10-24 21:20:44 +010026 select SUPPORT_SPL
Hans de Goedea5636382014-10-24 20:12:04 +020027 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbelld8e69e02014-10-24 21:20:44 +010028
Ian Campbell4a24a1c2014-10-24 21:20:45 +010029config MACH_SUN8I
Ian Campbelld8e69e02014-10-24 21:20:44 +010030 bool "sun8i (Allwinner A23)"
31 select CPU_V7
Hans de Goede966d2392014-12-07 14:34:27 +010032 select SUPPORT_SPL
Ian Campbelld8e69e02014-10-24 21:20:44 +010033
34endchoice
Maxime Ripard2c519412014-10-03 20:16:29 +080035
Hans de Goede3aeaa282014-11-15 19:46:39 +010036config DRAM_CLK
Hans de Goede59d9fc72015-01-17 14:24:55 +010037 int "sunxi dram clock speed"
38 default 312 if MACH_SUN6I || MACH_SUN8I
39 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010040 ---help---
41 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goede06ddc452015-01-25 11:29:27 +010042 of 24.
Hans de Goede3aeaa282014-11-15 19:46:39 +010043
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020044if MACH_SUN5I || MACH_SUN7I
45config DRAM_MBUS_CLK
46 int "sunxi mbus clock speed"
47 default 300
48 ---help---
49 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
50
51endif
52
Hans de Goede3aeaa282014-11-15 19:46:39 +010053config DRAM_ZQ
Hans de Goede59d9fc72015-01-17 14:24:55 +010054 int "sunxi dram zq value"
55 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
56 default 127 if MACH_SUN7I
Hans de Goede3aeaa282014-11-15 19:46:39 +010057 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010058 Set the dram zq value.
Hans de Goede3aeaa282014-11-15 19:46:39 +010059
Hans de Goede59d9fc72015-01-17 14:24:55 +010060if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
61config DRAM_EMR1
62 int "sunxi dram emr1 value"
63 default 0 if MACH_SUN4I
64 default 4 if MACH_SUN5I || MACH_SUN7I
65 ---help---
Hans de Goede06ddc452015-01-25 11:29:27 +010066 Set the dram controller emr1 value.
Siarhei Siamashka9900db12015-02-01 00:27:05 +020067
Siarhei Siamashka47359bb2015-02-01 00:27:06 +020068config DRAM_ODT_EN
69 int "sunxi dram odt_en value"
70 default 0
71 ---help---
72 Set the dram controller odt_en parameter. This can be used to
73 enable/disable the ODT feature.
74
75config DRAM_TPR3
76 hex "sunxi dram tpr3 value"
77 default 0
78 ---help---
79 Set the dram controller tpr3 parameter. This parameter configures
80 the delay on the command lane and also phase shifts, which are
81 applied for sampling incoming read data. The default value 0
82 means that no phase/delay adjustments are necessary. Properly
83 configuring this parameter increases reliability at high DRAM
84 clock speeds.
85
86config DRAM_DQS_GATING_DELAY
87 hex "sunxi dram dqs_gating_delay value"
88 default 0
89 ---help---
90 Set the dram controller dqs_gating_delay parmeter. Each byte
91 encodes the DQS gating delay for each byte lane. The delay
92 granularity is 1/4 cycle. For example, the value 0x05060606
93 means that the delay is 5 quarter-cycles for one lane (1.25
94 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
95 The default value 0 means autodetection. The results of hardware
96 autodetection are not very reliable and depend on the chip
97 temperature (sometimes producing different results on cold start
98 and warm reboot). But the accuracy of hardware autodetection
99 is usually good enough, unless running at really high DRAM
100 clocks speeds (up to 600MHz). If unsure, keep as 0.
101
Siarhei Siamashka9900db12015-02-01 00:27:05 +0200102choice
103 prompt "sunxi dram timings"
104 default DRAM_TIMINGS_VENDOR_MAGIC
105 ---help---
106 Select the timings of the DDR3 chips.
107
108config DRAM_TIMINGS_VENDOR_MAGIC
109 bool "Magic vendor timings from Android"
110 ---help---
111 The same DRAM timings as in the Allwinner boot0 bootloader.
112
113config DRAM_TIMINGS_DDR3_1066F_1333H
114 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
115 ---help---
116 Use the timings of the standard JEDEC DDR3-1066F speed bin for
117 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
118 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
119 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
120 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
121 that down binning to DDR3-1066F is supported (because DDR3-1066F
122 uses a bit faster timings than DDR3-1333H).
123
124config DRAM_TIMINGS_DDR3_800E_1066G_1333J
125 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
126 ---help---
127 Use the timings of the slowest possible JEDEC speed bin for the
128 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
129 DDR3-800E, DDR3-1066G or DDR3-1333J.
130
131endchoice
132
Hans de Goede3aeaa282014-11-15 19:46:39 +0100133endif
134
Iain Paton630df142015-03-28 10:26:38 +0000135config SYS_CLK_FREQ
136 default 912000000 if MACH_SUN7I
137 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
138
Maxime Ripard2c519412014-10-03 20:16:29 +0800139config SYS_CONFIG_NAME
Ian Campbell4a24a1c2014-10-24 21:20:45 +0100140 default "sun4i" if MACH_SUN4I
141 default "sun5i" if MACH_SUN5I
142 default "sun6i" if MACH_SUN6I
143 default "sun7i" if MACH_SUN7I
144 default "sun8i" if MACH_SUN8I
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900145
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900146config SYS_BOARD
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900147 default "sunxi"
148
149config SYS_SOC
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900150 default "sunxi"
151
Ian Campbell8ad104b2014-10-24 21:20:46 +0100152config SPL_FEL
153 bool "SPL/FEL mode support"
154 depends on SPL
155 default n
Simon Glass5debe1f2015-02-07 10:47:30 -0700156 help
157 This enables support for Fast Early Loader (FEL) mode. This
158 allows U-Boot to be loaded to the board over USB by the on-chip
159 boot rom. U-Boot should be sent in two parts: SPL first, with
160 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
161 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
162 shrinks the amount of SRAM available to SPL, so only enable it if
163 you need FEL. Note that enabling this option only allows FEL to be
164 used; it is still possible to boot U-Boot from boot media. U-Boot
165 SPL detects when it is being loaded using FEL.
Ian Campbell8ad104b2014-10-24 21:20:46 +0100166
Siarhei Siamashka121161f2014-12-25 02:34:47 +0200167config UART0_PORT_F
168 bool "UART0 on MicroSD breakout board"
169 depends on SPL_FEL
170 default n
171 ---help---
172 Repurpose the SD card slot for getting access to the UART0 serial
173 console. Primarily useful only for low level u-boot debugging on
174 tablets, where normal UART0 is difficult to access and requires
175 device disassembly and/or soldering. As the SD card can't be used
176 at the same time, the system can be only booted in the FEL mode.
177 Only enable this if you really know what you are doing.
178
Ian Campbell9536fc42014-08-31 13:13:43 +0100179config FDTFILE
180 string "Default fdtfile env setting for this board"
Hans de Goede2f60c312014-08-01 09:37:58 +0200181
Hans de Goede05e5bcb2014-10-22 14:56:36 +0200182config OLD_SUNXI_KERNEL_COMPAT
183 boolean "Enable workarounds for booting old kernels"
184 default n
185 ---help---
186 Set this to enable various workarounds for old kernels, this results in
187 sub-optimal settings for newer kernels, only enable if needed.
188
Hans de Goede7412ef82014-10-02 20:29:26 +0200189config MMC0_CD_PIN
190 string "Card detect pin for mmc0"
191 default ""
192 ---help---
193 Set the card detect pin for mmc0, leave empty to not use cd. This
194 takes a string in the format understood by sunxi_name_to_gpio, e.g.
195 PH1 for pin 1 of port H.
196
197config MMC1_CD_PIN
198 string "Card detect pin for mmc1"
199 default ""
200 ---help---
201 See MMC0_CD_PIN help text.
202
203config MMC2_CD_PIN
204 string "Card detect pin for mmc2"
205 default ""
206 ---help---
207 See MMC0_CD_PIN help text.
208
209config MMC3_CD_PIN
210 string "Card detect pin for mmc3"
211 default ""
212 ---help---
213 See MMC0_CD_PIN help text.
214
Hans de Goedeaf593e42014-10-02 20:43:50 +0200215config MMC_SUNXI_SLOT_EXTRA
216 int "mmc extra slot number"
217 default -1
218 ---help---
219 sunxi builds always enable mmc0, some boards also have a second sdcard
220 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
221 support for this.
222
Hans de Goedee7b852a2015-01-07 15:26:06 +0100223config USB0_VBUS_PIN
224 string "Vbus enable pin for usb0 (otg)"
225 default ""
226 ---help---
227 Set the Vbus enable pin for usb0 (otg). This takes a string in the
228 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
229
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100230config USB0_VBUS_DET
231 string "Vbus detect pin for usb0 (otg)"
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100232 default ""
233 ---help---
234 Set the Vbus detect pin for usb0 (otg). This takes a string in the
235 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
236
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100237config USB1_VBUS_PIN
238 string "Vbus enable pin for usb1 (ehci0)"
239 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100240 default "PH27" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100241 ---help---
242 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
243 a string in the format understood by sunxi_name_to_gpio, e.g.
244 PH1 for pin 1 of port H.
245
246config USB2_VBUS_PIN
247 string "Vbus enable pin for usb2 (ehci1)"
248 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goedeb5ab8ce2014-11-07 14:51:12 +0100249 default "PH24" if MACH_SUN6I
Hans de Goedeaf4273b2014-11-07 16:09:00 +0100250 ---help---
251 See USB1_VBUS_PIN help text.
252
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200253config VIDEO
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100254 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200255 default y
256 ---help---
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100257 Say Y here to add support for using a cfb console on the HDMI, LCD
258 or VGA output found on most sunxi devices. See doc/README.video for
259 info on how to select the video output and mode.
260
Hans de Goedee9544592014-12-23 23:04:35 +0100261config VIDEO_HDMI
262 boolean "HDMI output support"
263 depends on VIDEO && !MACH_SUN8I
264 default y
265 ---help---
266 Say Y here to add support for outputting video over HDMI.
267
Hans de Goede260f5202014-12-25 13:58:06 +0100268config VIDEO_VGA
269 boolean "VGA output support"
270 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
271 default n
272 ---help---
273 Say Y here to add support for outputting video over VGA.
274
Hans de Goedeac1633c2014-12-24 12:17:07 +0100275config VIDEO_VGA_VIA_LCD
276 boolean "VGA via LCD controller support"
Chen-Yu Tsai39ca4c12015-01-12 18:02:10 +0800277 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedeac1633c2014-12-24 12:17:07 +0100278 default n
279 ---help---
280 Say Y here to add support for external DACs connected to the parallel
281 LCD interface driving a VGA connector, such as found on the
282 Olimex A13 boards.
283
Hans de Goede18366f72015-01-25 15:33:07 +0100284config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
285 boolean "Force sync active high for VGA via LCD controller support"
286 depends on VIDEO_VGA_VIA_LCD
287 default n
288 ---help---
289 Say Y here if you've a board which uses opendrain drivers for the vga
290 hsync and vsync signals. Opendrain drivers cannot generate steep enough
291 positive edges for a stable video output, so on boards with opendrain
292 drivers the sync signals must always be active high.
293
Chen-Yu Tsai9ed19522015-01-12 18:02:11 +0800294config VIDEO_VGA_EXTERNAL_DAC_EN
295 string "LCD panel power enable pin"
296 depends on VIDEO_VGA_VIA_LCD
297 default ""
298 ---help---
299 Set the enable pin for the external VGA DAC. This takes a string in the
300 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
301
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100302config VIDEO_LCD_MODE
303 string "LCD panel timing details"
304 depends on VIDEO
305 default ""
306 ---help---
307 LCD panel timing details string, leave empty if there is no LCD panel.
308 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
309 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
310
Hans de Goede481b6642015-01-13 13:21:46 +0100311config VIDEO_LCD_DCLK_PHASE
312 int "LCD panel display clock phase"
313 depends on VIDEO
314 default 1
315 ---help---
316 Select LCD panel display clock phase shift, range 0-3.
317
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100318config VIDEO_LCD_POWER
319 string "LCD panel power enable pin"
320 depends on VIDEO
321 default ""
322 ---help---
323 Set the power enable pin for the LCD panel. This takes a string in the
324 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
325
Hans de Goedece9e3322015-02-16 17:26:41 +0100326config VIDEO_LCD_RESET
327 string "LCD panel reset pin"
328 depends on VIDEO
329 default ""
330 ---help---
331 Set the reset pin for the LCD panel. This takes a string in the format
332 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
333
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100334config VIDEO_LCD_BL_EN
335 string "LCD panel backlight enable pin"
336 depends on VIDEO
337 default ""
338 ---help---
339 Set the backlight enable pin for the LCD panel. This takes a string in the
340 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
341 port H.
342
343config VIDEO_LCD_BL_PWM
344 string "LCD panel backlight pwm pin"
345 depends on VIDEO
346 default ""
347 ---help---
348 Set the backlight pwm pin for the LCD panel. This takes a string in the
349 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200350
Hans de Goede2d5d3022015-01-22 21:02:42 +0100351config VIDEO_LCD_BL_PWM_ACTIVE_LOW
352 bool "LCD panel backlight pwm is inverted"
353 depends on VIDEO
354 default y
355 ---help---
356 Set this if the backlight pwm output is active low.
357
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100358config VIDEO_LCD_PANEL_I2C
359 bool "LCD panel needs to be configured via i2c"
360 depends on VIDEO
Hans de Goede6de9f762015-03-07 12:00:02 +0100361 default n
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100362 ---help---
363 Say y here if the LCD panel needs to be configured via i2c. This
364 will add a bitbang i2c controller using gpios to talk to the LCD.
365
366config VIDEO_LCD_PANEL_I2C_SDA
367 string "LCD panel i2c interface SDA pin"
368 depends on VIDEO_LCD_PANEL_I2C
369 default "PG12"
370 ---help---
371 Set the SDA pin for the LCD i2c interface. This takes a string in the
372 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
373
374config VIDEO_LCD_PANEL_I2C_SCL
375 string "LCD panel i2c interface SCL pin"
376 depends on VIDEO_LCD_PANEL_I2C
377 default "PG10"
378 ---help---
379 Set the SCL pin for the LCD i2c interface. This takes a string in the
380 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
381
Hans de Goede797a0f52015-01-01 22:04:34 +0100382
383# Note only one of these may be selected at a time! But hidden choices are
384# not supported by Kconfig
385config VIDEO_LCD_IF_PARALLEL
386 bool
387
388config VIDEO_LCD_IF_LVDS
389 bool
390
391
392choice
393 prompt "LCD panel support"
394 depends on VIDEO
395 ---help---
396 Select which type of LCD panel to support.
397
398config VIDEO_LCD_PANEL_PARALLEL
399 bool "Generic parallel interface LCD panel"
400 select VIDEO_LCD_IF_PARALLEL
401
402config VIDEO_LCD_PANEL_LVDS
403 bool "Generic lvds interface LCD panel"
404 select VIDEO_LCD_IF_LVDS
405
Siarhei Siamashkac02f0522015-01-19 05:23:33 +0200406config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
407 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
408 select VIDEO_LCD_SSD2828
409 select VIDEO_LCD_IF_PARALLEL
410 ---help---
411 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
412
Hans de Goede743fb9552015-01-20 09:23:36 +0100413config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
414 bool "Hitachi tx18d42vm LCD panel"
415 select VIDEO_LCD_HITACHI_TX18D42VM
416 select VIDEO_LCD_IF_LVDS
417 ---help---
418 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
419
Hans de Goede613dade2015-02-16 17:49:47 +0100420config VIDEO_LCD_TL059WV5C0
421 bool "tl059wv5c0 LCD panel"
422 select VIDEO_LCD_PANEL_I2C
423 select VIDEO_LCD_IF_PARALLEL
424 ---help---
425 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
426 Aigo M60/M608/M606 tablets.
427
Hans de Goede797a0f52015-01-01 22:04:34 +0100428endchoice
429
430
Hans de Goedef494cad2015-01-11 17:17:00 +0100431config USB_MUSB_SUNXI
432 bool "Enable sunxi OTG / DRC USB controller in host mode"
433 default n
434 ---help---
435 Say y here to enable support for the sunxi OTG / DRC USB controller
436 used on almost all sunxi boards. Note currently u-boot can only have
437 one usb host controller enabled at a time, so enabling this on boards
438 which also use the ehci host controller will result in build errors.
439
Hans de Goede16030822014-09-18 21:03:34 +0200440config USB_KEYBOARD
441 boolean "Enable USB keyboard support"
442 default y
443 ---help---
444 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede7e68a1b2014-12-21 16:28:32 +0100445 in combination with a graphical console).
Hans de Goede16030822014-09-18 21:03:34 +0200446
Hans de Goedebf880fe2015-01-25 12:10:48 +0100447config GMAC_TX_DELAY
448 int "GMAC Transmit Clock Delay Chain"
449 default 0
450 ---help---
451 Set the GMAC Transmit Clock Delay Chain value.
452
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900453endif