Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 1 | if ARCH_SUNXI |
| 2 | |
| 3 | choice |
| 4 | prompt "Sunxi SoC Variant" |
| 5 | |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 6 | config MACH_SUN4I |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 7 | bool "sun4i (Allwinner A10)" |
| 8 | select CPU_V7 |
| 9 | select SUPPORT_SPL |
| 10 | |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 11 | config MACH_SUN5I |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 12 | bool "sun5i (Allwinner A13)" |
| 13 | select CPU_V7 |
| 14 | select SUPPORT_SPL |
| 15 | |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 16 | config MACH_SUN6I |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 17 | bool "sun6i (Allwinner A31)" |
| 18 | select CPU_V7 |
Hans de Goede | a5403b9 | 2014-10-25 20:18:10 +0200 | [diff] [blame] | 19 | select SUPPORT_SPL |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 20 | |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 21 | config MACH_SUN7I |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 22 | bool "sun7i (Allwinner A20)" |
| 23 | select CPU_V7 |
Hans de Goede | 8543735 | 2014-11-14 09:34:30 +0100 | [diff] [blame] | 24 | select CPU_V7_HAS_NONSEC |
| 25 | select CPU_V7_HAS_VIRT |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 26 | select SUPPORT_SPL |
Hans de Goede | a563638 | 2014-10-24 20:12:04 +0200 | [diff] [blame] | 27 | select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 28 | |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 29 | config MACH_SUN8I |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 30 | bool "sun8i (Allwinner A23)" |
| 31 | select CPU_V7 |
Hans de Goede | 966d239 | 2014-12-07 14:34:27 +0100 | [diff] [blame] | 32 | select SUPPORT_SPL |
Ian Campbell | d8e69e0 | 2014-10-24 21:20:44 +0100 | [diff] [blame] | 33 | |
| 34 | endchoice |
Maxime Ripard | 2c51941 | 2014-10-03 20:16:29 +0800 | [diff] [blame] | 35 | |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 36 | config DRAM_CLK |
Hans de Goede | 59d9fc7 | 2015-01-17 14:24:55 +0100 | [diff] [blame] | 37 | int "sunxi dram clock speed" |
| 38 | default 312 if MACH_SUN6I || MACH_SUN8I |
| 39 | default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 40 | ---help--- |
| 41 | Set the dram clock speed, valid range 240 - 480, must be a multiple |
Hans de Goede | 06ddc45 | 2015-01-25 11:29:27 +0100 | [diff] [blame] | 42 | of 24. |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 43 | |
| 44 | config DRAM_ZQ |
Hans de Goede | 59d9fc7 | 2015-01-17 14:24:55 +0100 | [diff] [blame] | 45 | int "sunxi dram zq value" |
| 46 | default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I |
| 47 | default 127 if MACH_SUN7I |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 48 | ---help--- |
Hans de Goede | 06ddc45 | 2015-01-25 11:29:27 +0100 | [diff] [blame] | 49 | Set the dram zq value. |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 50 | |
Hans de Goede | 59d9fc7 | 2015-01-17 14:24:55 +0100 | [diff] [blame] | 51 | if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
| 52 | config DRAM_EMR1 |
| 53 | int "sunxi dram emr1 value" |
| 54 | default 0 if MACH_SUN4I |
| 55 | default 4 if MACH_SUN5I || MACH_SUN7I |
| 56 | ---help--- |
Hans de Goede | 06ddc45 | 2015-01-25 11:29:27 +0100 | [diff] [blame] | 57 | Set the dram controller emr1 value. |
Siarhei Siamashka | 9900db1 | 2015-02-01 00:27:05 +0200 | [diff] [blame^] | 58 | |
| 59 | choice |
| 60 | prompt "sunxi dram timings" |
| 61 | default DRAM_TIMINGS_VENDOR_MAGIC |
| 62 | ---help--- |
| 63 | Select the timings of the DDR3 chips. |
| 64 | |
| 65 | config DRAM_TIMINGS_VENDOR_MAGIC |
| 66 | bool "Magic vendor timings from Android" |
| 67 | ---help--- |
| 68 | The same DRAM timings as in the Allwinner boot0 bootloader. |
| 69 | |
| 70 | config DRAM_TIMINGS_DDR3_1066F_1333H |
| 71 | bool "JEDEC DDR3-1333H with down binning to DDR3-1066F" |
| 72 | ---help--- |
| 73 | Use the timings of the standard JEDEC DDR3-1066F speed bin for |
| 74 | DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin |
| 75 | for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips |
| 76 | used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333 |
| 77 | or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm |
| 78 | that down binning to DDR3-1066F is supported (because DDR3-1066F |
| 79 | uses a bit faster timings than DDR3-1333H). |
| 80 | |
| 81 | config DRAM_TIMINGS_DDR3_800E_1066G_1333J |
| 82 | bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J" |
| 83 | ---help--- |
| 84 | Use the timings of the slowest possible JEDEC speed bin for the |
| 85 | selected DRAM_CLK. Depending on the DRAM_CLK value, it may be |
| 86 | DDR3-800E, DDR3-1066G or DDR3-1333J. |
| 87 | |
| 88 | endchoice |
| 89 | |
Hans de Goede | 3aeaa28 | 2014-11-15 19:46:39 +0100 | [diff] [blame] | 90 | endif |
| 91 | |
Maxime Ripard | 2c51941 | 2014-10-03 20:16:29 +0800 | [diff] [blame] | 92 | config SYS_CONFIG_NAME |
Ian Campbell | 4a24a1c | 2014-10-24 21:20:45 +0100 | [diff] [blame] | 93 | default "sun4i" if MACH_SUN4I |
| 94 | default "sun5i" if MACH_SUN5I |
| 95 | default "sun6i" if MACH_SUN6I |
| 96 | default "sun7i" if MACH_SUN7I |
| 97 | default "sun8i" if MACH_SUN8I |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 98 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 99 | config SYS_BOARD |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 100 | default "sunxi" |
| 101 | |
| 102 | config SYS_SOC |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 103 | default "sunxi" |
| 104 | |
Ian Campbell | 8ad104b | 2014-10-24 21:20:46 +0100 | [diff] [blame] | 105 | config SPL_FEL |
| 106 | bool "SPL/FEL mode support" |
| 107 | depends on SPL |
| 108 | default n |
| 109 | |
Siarhei Siamashka | 121161f | 2014-12-25 02:34:47 +0200 | [diff] [blame] | 110 | config UART0_PORT_F |
| 111 | bool "UART0 on MicroSD breakout board" |
| 112 | depends on SPL_FEL |
| 113 | default n |
| 114 | ---help--- |
| 115 | Repurpose the SD card slot for getting access to the UART0 serial |
| 116 | console. Primarily useful only for low level u-boot debugging on |
| 117 | tablets, where normal UART0 is difficult to access and requires |
| 118 | device disassembly and/or soldering. As the SD card can't be used |
| 119 | at the same time, the system can be only booted in the FEL mode. |
| 120 | Only enable this if you really know what you are doing. |
| 121 | |
Ian Campbell | 9536fc4 | 2014-08-31 13:13:43 +0100 | [diff] [blame] | 122 | config FDTFILE |
| 123 | string "Default fdtfile env setting for this board" |
Hans de Goede | 2f60c31 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 124 | |
Hans de Goede | 05e5bcb | 2014-10-22 14:56:36 +0200 | [diff] [blame] | 125 | config OLD_SUNXI_KERNEL_COMPAT |
| 126 | boolean "Enable workarounds for booting old kernels" |
| 127 | default n |
| 128 | ---help--- |
| 129 | Set this to enable various workarounds for old kernels, this results in |
| 130 | sub-optimal settings for newer kernels, only enable if needed. |
| 131 | |
Hans de Goede | 7412ef8 | 2014-10-02 20:29:26 +0200 | [diff] [blame] | 132 | config MMC0_CD_PIN |
| 133 | string "Card detect pin for mmc0" |
| 134 | default "" |
| 135 | ---help--- |
| 136 | Set the card detect pin for mmc0, leave empty to not use cd. This |
| 137 | takes a string in the format understood by sunxi_name_to_gpio, e.g. |
| 138 | PH1 for pin 1 of port H. |
| 139 | |
| 140 | config MMC1_CD_PIN |
| 141 | string "Card detect pin for mmc1" |
| 142 | default "" |
| 143 | ---help--- |
| 144 | See MMC0_CD_PIN help text. |
| 145 | |
| 146 | config MMC2_CD_PIN |
| 147 | string "Card detect pin for mmc2" |
| 148 | default "" |
| 149 | ---help--- |
| 150 | See MMC0_CD_PIN help text. |
| 151 | |
| 152 | config MMC3_CD_PIN |
| 153 | string "Card detect pin for mmc3" |
| 154 | default "" |
| 155 | ---help--- |
| 156 | See MMC0_CD_PIN help text. |
| 157 | |
Hans de Goede | af593e4 | 2014-10-02 20:43:50 +0200 | [diff] [blame] | 158 | config MMC_SUNXI_SLOT_EXTRA |
| 159 | int "mmc extra slot number" |
| 160 | default -1 |
| 161 | ---help--- |
| 162 | sunxi builds always enable mmc0, some boards also have a second sdcard |
| 163 | slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable |
| 164 | support for this. |
| 165 | |
Hans de Goede | e7b852a | 2015-01-07 15:26:06 +0100 | [diff] [blame] | 166 | config USB0_VBUS_PIN |
| 167 | string "Vbus enable pin for usb0 (otg)" |
| 168 | default "" |
| 169 | ---help--- |
| 170 | Set the Vbus enable pin for usb0 (otg). This takes a string in the |
| 171 | format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. |
| 172 | |
Hans de Goede | af4273b | 2014-11-07 16:09:00 +0100 | [diff] [blame] | 173 | config USB1_VBUS_PIN |
| 174 | string "Vbus enable pin for usb1 (ehci0)" |
| 175 | default "PH6" if MACH_SUN4I || MACH_SUN7I |
Hans de Goede | b5ab8ce | 2014-11-07 14:51:12 +0100 | [diff] [blame] | 176 | default "PH27" if MACH_SUN6I |
Hans de Goede | af4273b | 2014-11-07 16:09:00 +0100 | [diff] [blame] | 177 | ---help--- |
| 178 | Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes |
| 179 | a string in the format understood by sunxi_name_to_gpio, e.g. |
| 180 | PH1 for pin 1 of port H. |
| 181 | |
| 182 | config USB2_VBUS_PIN |
| 183 | string "Vbus enable pin for usb2 (ehci1)" |
| 184 | default "PH3" if MACH_SUN4I || MACH_SUN7I |
Hans de Goede | b5ab8ce | 2014-11-07 14:51:12 +0100 | [diff] [blame] | 185 | default "PH24" if MACH_SUN6I |
Hans de Goede | af4273b | 2014-11-07 16:09:00 +0100 | [diff] [blame] | 186 | ---help--- |
| 187 | See USB1_VBUS_PIN help text. |
| 188 | |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 189 | config VIDEO |
Hans de Goede | 7e68a1b | 2014-12-21 16:28:32 +0100 | [diff] [blame] | 190 | boolean "Enable graphical uboot console on HDMI, LCD or VGA" |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 191 | default y |
| 192 | ---help--- |
Hans de Goede | 7e68a1b | 2014-12-21 16:28:32 +0100 | [diff] [blame] | 193 | Say Y here to add support for using a cfb console on the HDMI, LCD |
| 194 | or VGA output found on most sunxi devices. See doc/README.video for |
| 195 | info on how to select the video output and mode. |
| 196 | |
Hans de Goede | e954459 | 2014-12-23 23:04:35 +0100 | [diff] [blame] | 197 | config VIDEO_HDMI |
| 198 | boolean "HDMI output support" |
| 199 | depends on VIDEO && !MACH_SUN8I |
| 200 | default y |
| 201 | ---help--- |
| 202 | Say Y here to add support for outputting video over HDMI. |
| 203 | |
Hans de Goede | 260f520 | 2014-12-25 13:58:06 +0100 | [diff] [blame] | 204 | config VIDEO_VGA |
| 205 | boolean "VGA output support" |
| 206 | depends on VIDEO && (MACH_SUN4I || MACH_SUN7I) |
| 207 | default n |
| 208 | ---help--- |
| 209 | Say Y here to add support for outputting video over VGA. |
| 210 | |
Hans de Goede | ac1633c | 2014-12-24 12:17:07 +0100 | [diff] [blame] | 211 | config VIDEO_VGA_VIA_LCD |
| 212 | boolean "VGA via LCD controller support" |
Chen-Yu Tsai | 39ca4c1 | 2015-01-12 18:02:10 +0800 | [diff] [blame] | 213 | depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I) |
Hans de Goede | ac1633c | 2014-12-24 12:17:07 +0100 | [diff] [blame] | 214 | default n |
| 215 | ---help--- |
| 216 | Say Y here to add support for external DACs connected to the parallel |
| 217 | LCD interface driving a VGA connector, such as found on the |
| 218 | Olimex A13 boards. |
| 219 | |
Hans de Goede | 18366f7 | 2015-01-25 15:33:07 +0100 | [diff] [blame] | 220 | config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH |
| 221 | boolean "Force sync active high for VGA via LCD controller support" |
| 222 | depends on VIDEO_VGA_VIA_LCD |
| 223 | default n |
| 224 | ---help--- |
| 225 | Say Y here if you've a board which uses opendrain drivers for the vga |
| 226 | hsync and vsync signals. Opendrain drivers cannot generate steep enough |
| 227 | positive edges for a stable video output, so on boards with opendrain |
| 228 | drivers the sync signals must always be active high. |
| 229 | |
Chen-Yu Tsai | 9ed1952 | 2015-01-12 18:02:11 +0800 | [diff] [blame] | 230 | config VIDEO_VGA_EXTERNAL_DAC_EN |
| 231 | string "LCD panel power enable pin" |
| 232 | depends on VIDEO_VGA_VIA_LCD |
| 233 | default "" |
| 234 | ---help--- |
| 235 | Set the enable pin for the external VGA DAC. This takes a string in the |
| 236 | format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. |
| 237 | |
Hans de Goede | 7e68a1b | 2014-12-21 16:28:32 +0100 | [diff] [blame] | 238 | config VIDEO_LCD_MODE |
| 239 | string "LCD panel timing details" |
| 240 | depends on VIDEO |
| 241 | default "" |
| 242 | ---help--- |
| 243 | LCD panel timing details string, leave empty if there is no LCD panel. |
| 244 | This is in drivers/video/videomodes.c: video_get_params() format, e.g. |
| 245 | x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 |
| 246 | |
Hans de Goede | 481b664 | 2015-01-13 13:21:46 +0100 | [diff] [blame] | 247 | config VIDEO_LCD_DCLK_PHASE |
| 248 | int "LCD panel display clock phase" |
| 249 | depends on VIDEO |
| 250 | default 1 |
| 251 | ---help--- |
| 252 | Select LCD panel display clock phase shift, range 0-3. |
| 253 | |
Hans de Goede | 7e68a1b | 2014-12-21 16:28:32 +0100 | [diff] [blame] | 254 | config VIDEO_LCD_POWER |
| 255 | string "LCD panel power enable pin" |
| 256 | depends on VIDEO |
| 257 | default "" |
| 258 | ---help--- |
| 259 | Set the power enable pin for the LCD panel. This takes a string in the |
| 260 | format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. |
| 261 | |
| 262 | config VIDEO_LCD_BL_EN |
| 263 | string "LCD panel backlight enable pin" |
| 264 | depends on VIDEO |
| 265 | default "" |
| 266 | ---help--- |
| 267 | Set the backlight enable pin for the LCD panel. This takes a string in the |
| 268 | the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of |
| 269 | port H. |
| 270 | |
| 271 | config VIDEO_LCD_BL_PWM |
| 272 | string "LCD panel backlight pwm pin" |
| 273 | depends on VIDEO |
| 274 | default "" |
| 275 | ---help--- |
| 276 | Set the backlight pwm pin for the LCD panel. This takes a string in the |
| 277 | format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 278 | |
Hans de Goede | 2d5d302 | 2015-01-22 21:02:42 +0100 | [diff] [blame] | 279 | config VIDEO_LCD_BL_PWM_ACTIVE_LOW |
| 280 | bool "LCD panel backlight pwm is inverted" |
| 281 | depends on VIDEO |
| 282 | default y |
| 283 | ---help--- |
| 284 | Set this if the backlight pwm output is active low. |
| 285 | |
Hans de Goede | 797a0f5 | 2015-01-01 22:04:34 +0100 | [diff] [blame] | 286 | |
| 287 | # Note only one of these may be selected at a time! But hidden choices are |
| 288 | # not supported by Kconfig |
| 289 | config VIDEO_LCD_IF_PARALLEL |
| 290 | bool |
| 291 | |
| 292 | config VIDEO_LCD_IF_LVDS |
| 293 | bool |
| 294 | |
| 295 | |
| 296 | choice |
| 297 | prompt "LCD panel support" |
| 298 | depends on VIDEO |
| 299 | ---help--- |
| 300 | Select which type of LCD panel to support. |
| 301 | |
| 302 | config VIDEO_LCD_PANEL_PARALLEL |
| 303 | bool "Generic parallel interface LCD panel" |
| 304 | select VIDEO_LCD_IF_PARALLEL |
| 305 | |
| 306 | config VIDEO_LCD_PANEL_LVDS |
| 307 | bool "Generic lvds interface LCD panel" |
| 308 | select VIDEO_LCD_IF_LVDS |
| 309 | |
Siarhei Siamashka | c02f052 | 2015-01-19 05:23:33 +0200 | [diff] [blame] | 310 | config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828 |
| 311 | bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip" |
| 312 | select VIDEO_LCD_SSD2828 |
| 313 | select VIDEO_LCD_IF_PARALLEL |
| 314 | ---help--- |
| 315 | 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0 |
| 316 | |
Hans de Goede | 743fb955 | 2015-01-20 09:23:36 +0100 | [diff] [blame] | 317 | config VIDEO_LCD_PANEL_HITACHI_TX18D42VM |
| 318 | bool "Hitachi tx18d42vm LCD panel" |
| 319 | select VIDEO_LCD_HITACHI_TX18D42VM |
| 320 | select VIDEO_LCD_IF_LVDS |
| 321 | ---help--- |
| 322 | 7.85" 1024x768 Hitachi tx18d42vm LCD panel support |
| 323 | |
Hans de Goede | 797a0f5 | 2015-01-01 22:04:34 +0100 | [diff] [blame] | 324 | endchoice |
| 325 | |
| 326 | |
Hans de Goede | f494cad | 2015-01-11 17:17:00 +0100 | [diff] [blame] | 327 | config USB_MUSB_SUNXI |
| 328 | bool "Enable sunxi OTG / DRC USB controller in host mode" |
| 329 | default n |
| 330 | ---help--- |
| 331 | Say y here to enable support for the sunxi OTG / DRC USB controller |
| 332 | used on almost all sunxi boards. Note currently u-boot can only have |
| 333 | one usb host controller enabled at a time, so enabling this on boards |
| 334 | which also use the ehci host controller will result in build errors. |
| 335 | |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 336 | config USB_KEYBOARD |
| 337 | boolean "Enable USB keyboard support" |
| 338 | default y |
| 339 | ---help--- |
| 340 | Say Y here to add support for using a USB keyboard (typically used |
Hans de Goede | 7e68a1b | 2014-12-21 16:28:32 +0100 | [diff] [blame] | 341 | in combination with a graphical console). |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 342 | |
Hans de Goede | bf880fe | 2015-01-25 12:10:48 +0100 | [diff] [blame] | 343 | config GMAC_TX_DELAY |
| 344 | int "GMAC Transmit Clock Delay Chain" |
| 345 | default 0 |
| 346 | ---help--- |
| 347 | Set the GMAC Transmit Clock Delay Chain value. |
| 348 | |
Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 349 | endif |