Blame - include/configs/malta.h - filogic/uboot

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Tom Rini	10e4779	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0 */
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	2	/*
				3	* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	4	*/
				5
Paul Burton	10a74b5	2013-11-09 10:22:08 +0000	[diff] [blame]	6	#ifndef _MALTA_CONFIG_H
				7	#define _MALTA_CONFIG_H
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	8
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	9	/*
				10	* System configuration
				11	*/
Paul Burton	10a74b5	2013-11-09 10:22:08 +0000	[diff] [blame]	12	#define CONFIG_MALTA
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	13
Gabor Juhos	5e19515	2013-10-24 14:32:00 +0200	[diff] [blame]	14	#define CONFIG_MEMSIZE_IN_BYTES
				15
Gabor Juhos	652ccee	2013-05-22 03:57:42 +0000	[diff] [blame]	16	#define CONFIG_PCI_GT64120
Paul Burton	234882c	2013-11-08 11:18:50 +0000	[diff] [blame]	17	#define CONFIG_PCI_MSC01
Gabor Juhos	439c50c	2013-05-22 03:57:44 +0000	[diff] [blame]	18	#define CONFIG_PCNET
Paul Burton	f38eea6	2013-11-08 11:18:52 +0000	[diff] [blame]	19	#define CONFIG_PCNET_79C973
				20	#define PCNET_HAS_PROM
Gabor Juhos	652ccee	2013-05-22 03:57:42 +0000	[diff] [blame]	21
Paul Burton	c028f9b	2013-11-08 11:18:55 +0000	[diff] [blame]	22	#define CONFIG_MISC_INIT_R
				23	#define CONFIG_RTC_MC146818
				24	#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
				25
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	26	/*
				27	* CPU Configuration
				28	*/
				29	#define CONFIG_SYS_MHZ 250 /* arbitrary value */
				30	#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	31
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	32	/*
				33	* Memory map
				34	*/
Gabor Juhos	c1df370	2013-11-12 16:47:32 +0100	[diff] [blame]	35	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	36
Paul Burton	825cfbd	2016-05-26 14:49:36 +0100	[diff] [blame]	37	#ifdef CONFIG_64BIT
				38	# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
				39	#else
				40	# define CONFIG_SYS_SDRAM_BASE 0x80000000
				41	#endif
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	42	#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
				43
				44	#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
				45
Paul Burton	825cfbd	2016-05-26 14:49:36 +0100	[diff] [blame]	46	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
				47	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
				48	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	49
				50	#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
				51	#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton	657b935	2013-11-26 17:45:28 +0000	[diff] [blame]	52	#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	53
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	54	/*
				55	* Serial driver
				56	*/
Paul Burton	58ce2cc	2016-05-17 07:43:27 +0100	[diff] [blame]	57	#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	58
				59	/*
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	60	* Flash configuration
				61	*/
Paul Burton	825cfbd	2016-05-26 14:49:36 +0100	[diff] [blame]	62	#ifdef CONFIG_64BIT
				63	# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
				64	#else
				65	# define CONFIG_SYS_FLASH_BASE 0xbe000000
				66	#endif
Gabor Juhos	2c43477	2013-05-22 03:57:39 +0000	[diff] [blame]	67	#define CONFIG_SYS_MAX_FLASH_BANKS 1
				68	#define CONFIG_SYS_MAX_FLASH_SECT 128
				69	#define CONFIG_SYS_FLASH_CFI
				70	#define CONFIG_FLASH_CFI_DRIVER
				71	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	72
				73	/*
Paul Burton	6046522	2013-11-08 11:18:56 +0000	[diff] [blame]	74	* Environment
				75	*/
Paul Burton	6046522	2013-11-08 11:18:56 +0000	[diff] [blame]	76	#define CONFIG_ENV_SECT_SIZE 0x20000
				77	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
				78	#define CONFIG_ENV_ADDR \
				79	(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
				80
				81	/*
Paul Burton	c6c3853	2015-01-29 10:38:20 +0000	[diff] [blame]	82	* IDE/ATA
				83	*/
				84	#define CONFIG_SYS_IDE_MAXBUS 1
				85	#define CONFIG_SYS_IDE_MAXDEVICE 2
				86	#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
				87	#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
				88	#define CONFIG_SYS_ATA_DATA_OFFSET 0
				89	#define CONFIG_SYS_ATA_REG_OFFSET 0
				90
				91	/*
Gabor Juhos	02c754a	2013-05-22 03:57:37 +0000	[diff] [blame]	92	* Commands
				93	*/
Gabor Juhos	652ccee	2013-05-22 03:57:42 +0000	[diff] [blame]	94
Paul Burton	10a74b5	2013-11-09 10:22:08 +0000	[diff] [blame]	95	#endif /* _MALTA_CONFIG_H */