Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2010-2011 Freescale Semiconductor, Inc. |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __FSL_SECURE_BOOT_H |
| 7 | #define __FSL_SECURE_BOOT_H |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 8 | #include <asm/config_mpc85xx.h> |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 9 | |
Udit Agarwal | d2dd2f7 | 2019-11-07 16:11:39 +0000 | [diff] [blame] | 10 | #ifdef CONFIG_NXP_ESBC |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 11 | #if defined(CONFIG_FSL_CORENET) |
| 12 | #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 |
York Sun | 4620e1f | 2016-11-15 18:32:50 -0800 | [diff] [blame] | 13 | #elif defined(CONFIG_TARGET_BSC9132QDS) |
Aneesh Bansal | bf955b2 | 2014-03-12 00:07:27 +0530 | [diff] [blame] | 14 | #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 |
York Sun | c6c51ae | 2016-11-16 11:51:24 -0800 | [diff] [blame] | 15 | #elif defined(CONFIG_TARGET_C29XPCIE) |
Aneesh Bansal | 11421b4 | 2014-12-12 15:35:04 +0530 | [diff] [blame] | 16 | #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 |
Ruchika Gupta | 8ca8d82 | 2010-12-15 17:02:08 +0000 | [diff] [blame] | 17 | #else |
| 18 | #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 |
| 19 | #endif |
| 20 | #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 |
| 21 | |
York Sun | 2dfafc6 | 2016-11-18 11:47:35 -0800 | [diff] [blame] | 22 | #if defined(CONFIG_TARGET_B4860QDS) || \ |
| 23 | defined(CONFIG_TARGET_B4420QDS) || \ |
York Sun | a74e923 | 2016-11-21 13:19:14 -0800 | [diff] [blame] | 24 | defined(CONFIG_TARGET_T4160QDS) || \ |
York Sun | ba04cb4 | 2016-11-21 13:22:08 -0800 | [diff] [blame] | 25 | defined(CONFIG_TARGET_T4240QDS) || \ |
York Sun | c68b12d | 2016-12-28 08:43:36 -0800 | [diff] [blame] | 26 | defined(CONFIG_TARGET_T2080QDS) || \ |
York Sun | a05baa4 | 2016-12-28 08:43:37 -0800 | [diff] [blame] | 27 | defined(CONFIG_TARGET_T2080RDB) || \ |
York Sun | 8853a2c | 2016-12-28 08:43:35 -0800 | [diff] [blame] | 28 | defined(CONFIG_TARGET_T1040QDS) || \ |
York Sun | 097aa60 | 2016-11-21 11:25:26 -0800 | [diff] [blame] | 29 | defined(CONFIG_TARGET_T1040RDB) || \ |
| 30 | defined(CONFIG_TARGET_T1040D4RDB) || \ |
| 31 | defined(CONFIG_TARGET_T1042RDB) || \ |
| 32 | defined(CONFIG_TARGET_T1042D4RDB) || \ |
| 33 | defined(CONFIG_TARGET_T1042RDB_PI) || \ |
York Sun | bcee92e | 2016-11-18 12:35:47 -0800 | [diff] [blame] | 34 | defined(CONFIG_ARCH_T1023) || \ |
York Sun | 7d29dd6 | 2016-11-18 13:01:34 -0800 | [diff] [blame] | 35 | defined(CONFIG_ARCH_T1024) |
Sumit Garg | afaca2a | 2016-07-14 12:27:52 -0400 | [diff] [blame] | 36 | #ifndef CONFIG_SYS_RAMBOOT |
Aneesh Bansal | 8bcbc27 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 37 | #define CONFIG_SYS_CPC_REINIT_F |
Sumit Garg | afaca2a | 2016-07-14 12:27:52 -0400 | [diff] [blame] | 38 | #endif |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 39 | #define CONFIG_KEY_REVOCATION |
Aneesh Bansal | 8bcbc27 | 2014-03-18 23:40:26 +0530 | [diff] [blame] | 40 | #undef CONFIG_SYS_INIT_L3_ADDR |
| 41 | #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 |
| 42 | #endif |
| 43 | |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 44 | #if defined(CONFIG_RAMBOOT_PBL) |
| 45 | #undef CONFIG_SYS_INIT_L3_ADDR |
Sumit Garg | afaca2a | 2016-07-14 12:27:52 -0400 | [diff] [blame] | 46 | #ifdef CONFIG_SYS_INIT_L3_VADDR |
| 47 | #define CONFIG_SYS_INIT_L3_ADDR \ |
| 48 | (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \ |
| 49 | 0xbff00000 |
| 50 | #else |
| 51 | #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 |
| 52 | #endif |
Aneesh Bansal | e0f5015 | 2015-06-16 10:36:00 +0530 | [diff] [blame] | 53 | #endif |
| 54 | |
York Sun | c6c51ae | 2016-11-16 11:51:24 -0800 | [diff] [blame] | 55 | #if defined(CONFIG_TARGET_C29XPCIE) |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 56 | #define CONFIG_KEY_REVOCATION |
| 57 | #endif |
| 58 | |
York Sun | df70d06 | 2016-11-18 11:20:40 -0800 | [diff] [blame] | 59 | #if defined(CONFIG_ARCH_P3041) || \ |
York Sun | 84be8a9 | 2016-11-18 11:24:40 -0800 | [diff] [blame] | 60 | defined(CONFIG_ARCH_P4080) || \ |
York Sun | 2ed73f4 | 2016-11-18 11:30:56 -0800 | [diff] [blame] | 61 | defined(CONFIG_ARCH_P5020) || \ |
York Sun | a3c5b66 | 2016-11-18 11:39:36 -0800 | [diff] [blame] | 62 | defined(CONFIG_ARCH_P5040) || \ |
York Sun | 5786fca | 2016-11-18 11:15:21 -0800 | [diff] [blame] | 63 | defined(CONFIG_ARCH_P2041) |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 64 | #define CONFIG_FSL_TRUST_ARCH_v1 |
| 65 | #endif |
| 66 | |
Aneesh Bansal | d31bb3e | 2015-07-31 14:10:03 +0530 | [diff] [blame] | 67 | #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 68 | /* The key used for verification of next level images |
| 69 | * is picked up from an Extension Table which has |
| 70 | * been verified by the ISBC (Internal Secure boot Code) |
Aneesh Bansal | d31bb3e | 2015-07-31 14:10:03 +0530 | [diff] [blame] | 71 | * in boot ROM of the SoC. |
| 72 | * The feature is only applicable in case of NOR boot and is |
| 73 | * not applicable in case of RAMBOOT (NAND, SD, SPI). |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 74 | */ |
| 75 | #define CONFIG_FSL_ISBC_KEY_EXT |
| 76 | #endif |
Udit Agarwal | d2dd2f7 | 2019-11-07 16:11:39 +0000 | [diff] [blame] | 77 | #endif /* #ifdef CONFIG_NXP_ESBC */ |
gaurav rana | 8b5ea65 | 2015-02-27 09:46:17 +0530 | [diff] [blame] | 78 | |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 79 | #ifdef CONFIG_CHAIN_OF_TRUST |
Simon Glass | 3aa6612 | 2016-09-12 23:18:23 -0600 | [diff] [blame] | 80 | #ifdef CONFIG_SPL_BUILD |
Sumit Garg | f6d96cb | 2016-07-14 12:27:51 -0400 | [diff] [blame] | 81 | /* |
| 82 | * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init |
| 83 | * due to space crunch on CPC and thus malloc will not work. |
| 84 | */ |
| 85 | #define CONFIG_SPL_PPAACT_ADDR 0x2e000000 |
| 86 | #define CONFIG_SPL_SPAACT_ADDR 0x2f000000 |
| 87 | #define CONFIG_SPL_JR0_LIODN_S 454 |
| 88 | #define CONFIG_SPL_JR0_LIODN_NS 458 |
| 89 | /* |
| 90 | * Define the key hash for U-Boot here if public/private key pair used to |
| 91 | * sign U-boot are different from the SRK hash put in the fuse |
| 92 | * Example of defining KEY_HASH is |
| 93 | * #define CONFIG_SPL_UBOOT_KEY_HASH \ |
| 94 | * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" |
| 95 | * else leave it defined as NULL |
| 96 | */ |
| 97 | |
| 98 | #define CONFIG_SPL_UBOOT_KEY_HASH NULL |
| 99 | #endif /* ifdef CONFIG_SPL_BUILD */ |
| 100 | |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 101 | #define CONFIG_FSL_SEC_MON |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 102 | |
Sumit Garg | f6d96cb | 2016-07-14 12:27:51 -0400 | [diff] [blame] | 103 | #ifndef CONFIG_SPL_BUILD |
| 104 | /* |
| 105 | * fsl_setenv_chain_of_trust() must be called from |
Aneesh Bansal | c624909 | 2016-01-22 16:37:27 +0530 | [diff] [blame] | 106 | * board_late_init() |
| 107 | */ |
Aneesh Bansal | c624909 | 2016-01-22 16:37:27 +0530 | [diff] [blame] | 108 | |
Aneesh Bansal | b69061d | 2015-06-16 10:36:43 +0530 | [diff] [blame] | 109 | /* If Boot Script is not on NOR and is required to be copied on RAM */ |
| 110 | #ifdef CONFIG_BOOTSCRIPT_COPY_RAM |
| 111 | #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 |
Sumit Garg | 4564283 | 2016-06-14 13:52:39 -0400 | [diff] [blame] | 112 | #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 |
Aneesh Bansal | b69061d | 2015-06-16 10:36:43 +0530 | [diff] [blame] | 113 | #define CONFIG_BS_HDR_SIZE 0x00002000 |
| 114 | #define CONFIG_BS_ADDR_RAM 0x00012000 |
Sumit Garg | 4564283 | 2016-06-14 13:52:39 -0400 | [diff] [blame] | 115 | #define CONFIG_BS_ADDR_DEVICE 0x00802000 |
Aneesh Bansal | b69061d | 2015-06-16 10:36:43 +0530 | [diff] [blame] | 116 | #define CONFIG_BS_SIZE 0x00001000 |
| 117 | |
| 118 | #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM |
| 119 | #else |
| 120 | |
gaurav rana | f79323c | 2015-03-10 14:08:50 +0530 | [diff] [blame] | 121 | /* The bootscript header address is different for B4860 because the NOR |
| 122 | * mapping is different on B4 due to reduced NOR size. |
| 123 | */ |
York Sun | 2dfafc6 | 2016-11-18 11:47:35 -0800 | [diff] [blame] | 124 | #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS) |
gaurav rana | f79323c | 2015-03-10 14:08:50 +0530 | [diff] [blame] | 125 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 |
| 126 | #elif defined(CONFIG_FSL_CORENET) |
| 127 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000 |
York Sun | 4620e1f | 2016-11-15 18:32:50 -0800 | [diff] [blame] | 128 | #elif defined(CONFIG_TARGET_BSC9132QDS) |
gaurav rana | f79323c | 2015-03-10 14:08:50 +0530 | [diff] [blame] | 129 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000 |
York Sun | c6c51ae | 2016-11-16 11:51:24 -0800 | [diff] [blame] | 130 | #elif defined(CONFIG_TARGET_C29XPCIE) |
gaurav rana | f79323c | 2015-03-10 14:08:50 +0530 | [diff] [blame] | 131 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000 |
| 132 | #else |
| 133 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 |
| 134 | #endif |
| 135 | |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 136 | #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ |
gaurav rana | f79323c | 2015-03-10 14:08:50 +0530 | [diff] [blame] | 137 | |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 138 | #include <config_fsl_chain_trust.h> |
Sumit Garg | f6d96cb | 2016-07-14 12:27:51 -0400 | [diff] [blame] | 139 | #endif /* #ifndef CONFIG_SPL_BUILD */ |
Aneesh Bansal | 4310470 | 2016-01-22 16:37:24 +0530 | [diff] [blame] | 140 | #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ |
Po Liu | d103009 | 2013-08-21 14:20:21 +0800 | [diff] [blame] | 141 | #endif |