Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 2 | /* |
3 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 4 | */ |
5 | |||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 6 | #ifndef _MALTA_CONFIG_H |
7 | #define _MALTA_CONFIG_H | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 8 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | /* |
10 | * System configuration | ||||
11 | */ | ||||
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 12 | #define CONFIG_MALTA |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 13 | |
Gabor Juhos | 5e19515 | 2013-10-24 14:32:00 +0200 | [diff] [blame] | 14 | #define CONFIG_MEMSIZE_IN_BYTES |
15 | |||||
Paul Burton | c028f9b | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 16 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 |
17 | |||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 18 | /* |
19 | * CPU Configuration | ||||
20 | */ | ||||
21 | #define CONFIG_SYS_MHZ 250 /* arbitrary value */ | ||||
22 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 23 | |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 24 | /* |
25 | * Memory map | ||||
26 | */ | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 27 | |
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 28 | #ifdef CONFIG_64BIT |
29 | # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 | ||||
30 | #else | ||||
31 | # define CONFIG_SYS_SDRAM_BASE 0x80000000 | ||||
32 | #endif | ||||
Tom Rini | b64ed1c | 2022-07-23 13:04:57 -0400 | [diff] [blame^] | 33 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 34 | |
35 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 | ||||
36 | |||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 37 | /* |
38 | * Serial driver | ||||
39 | */ | ||||
Paul Burton | 58ce2cc | 2016-05-17 07:43:27 +0100 | [diff] [blame] | 40 | #define CONFIG_SYS_NS16550_PORT_MAPPED |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 41 | |
42 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 43 | * Flash configuration |
44 | */ | ||||
Paul Burton | 825cfbd | 2016-05-26 14:49:36 +0100 | [diff] [blame] | 45 | #ifdef CONFIG_64BIT |
46 | # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 | ||||
47 | #else | ||||
48 | # define CONFIG_SYS_FLASH_BASE 0xbe000000 | ||||
49 | #endif | ||||
Gabor Juhos | 2c43477 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 50 | #define CONFIG_SYS_MAX_FLASH_SECT 128 |
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 51 | |
52 | /* | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 53 | * Environment |
54 | */ | ||||
Paul Burton | 6046522 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 55 | |
56 | /* | ||||
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 57 | * IDE/ATA |
58 | */ | ||||
Paul Burton | c6c3853 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 59 | |
60 | /* | ||||
Gabor Juhos | 02c754a | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 61 | * Commands |
62 | */ | ||||
Gabor Juhos | 652ccee | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 63 | |
Paul Burton | 10a74b5 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 64 | #endif /* _MALTA_CONFIG_H */ |